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src/libgloss ChangeLog mips/crt0.S mips/mti32. ...

CVSROOT:	/cvs/src
Module name:	src
Changes by:	corinna@sourceware.org	2014-11-28 08:51:03

Modified files:
	libgloss       : ChangeLog 
	libgloss/mips  : crt0.S mti32.ld mti64.ld mti64_64.ld 
	                 mti64_n32.ld regs.S 
Added files:
	libgloss/mips  : abiflags.S 

Log message:
	* mips/crt0.S: Configure processor based on .MIPS.abiflags.
	Remove FPU availability check, just use the pre-processor flags
	to indicicate what the user wanted.
	* mips/abiflags.S: New file.
	* mips/regs.S (SR_MSA): Define macro.
	* mips/mti32.ld: Place .MIPS.abiflags and wrap in marker symbols.
	* mips/mti64.ld: Likewise.
	* mips/mti64_64.ld: Likewise.
	* mips/mti64_n32.ld: Likewise.

Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/libgloss/ChangeLog.diff?cvsroot=src&r1=1.417&r2=1.418
http://sourceware.org/cgi-bin/cvsweb.cgi/src/libgloss/mips/abiflags.S.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/libgloss/mips/crt0.S.diff?cvsroot=src&r1=1.12&r2=1.13
http://sourceware.org/cgi-bin/cvsweb.cgi/src/libgloss/mips/mti32.ld.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/libgloss/mips/mti64.ld.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/libgloss/mips/mti64_64.ld.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/libgloss/mips/mti64_n32.ld.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/libgloss/mips/regs.S.diff?cvsroot=src&r1=1.4&r2=1.5
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