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Re: [PATCH 1/3] aarch64: Optimized memset specific to AmpereComputing emag


On 18/12/2018 10:03, Feng Xue wrote:
> This version uses general register based memory store instead of
> vector register based, for the former is faster than the latter
> in emag.
> 
> The fact that DC ZVA size in emag is 64-byte, is used by IFUNC
> dispatch to select this memset, so that cost of runtime-check on
> DC ZVA size can be saved.
> 
>     * sysdeps/aarch64/multiarch/Makefile (sysdep_routines):
>     Add memset_emag.
>     * sysdeps/aarch64/multiarch/ifunc-impl-list.c
>     (__libc_ifunc_impl_list): Add __memset_emag to memset ifunc.
>     * sysdeps/aarch64/multiarch/memset.c (libc_ifunc):
>     Add IS_EMAG check for ifunc dispatch.
>     * sysdeps/aarch64/multiarch/memset_base64.S: New file.
>     * sysdeps/aarch64/multiarch/memset_emag.S: New file.

OK to commit.

note, that i plan to change the memset code later:
at least rename the functions like

memset_falkor -> memset_zva64_simd
memset_emag -> memset_zva64_nosimd
memset_generic

or similar and then new cpus choose one of these instead
of adding their own (and likely change the default to
memset_zva64_simd for all zva==64 cores), but there might
be code changes as well.


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