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Re: [PATCH][AArch64] Adjust writeback in non-zero memset

From: Siddhesh Poyarekar <siddhesh at gotplt dot org>
To: Wilco Dijkstra <Wilco dot Dijkstra at arm dot com>, 'GNU C Library' <libc-alpha at sourceware dot org>, Szabolcs Nagy <Szabolcs dot Nagy at arm dot com>
Cc: nd <nd at arm dot com>
Date: Fri, 16 Nov 2018 20:54:38 +0530
Subject: Re: [PATCH][AArch64] Adjust writeback in non-zero memset
References: <DB5PR08MB103042C88641FD9D3A04C3F983C40@DB5PR08MB1030.eurprd08.prod.outlook.com> <DB5PR08MB103082464EB664B31AFC5C5783C30@DB5PR08MB1030.eurprd08.prod.outlook.com>

On 14/11/18 8:15 PM, Wilco Dijkstra wrote:

v2: Also bias dst in the zva_other code to avoid issues with zva sizes >= 256.

This fixes an ineffiency in the non-zero memset.  Delaying the writeback
until the end of the loop is slightly faster on some cores - this shows
~5% performance gain on Cortex-A53 when doing large non-zero memsets.

Tested against the GLIBC testsuite, OK for commit?


Can you please also summarize the performance results for other processors?

Thanks,
Siddhesh

Follow-Ups:
- Re: [PATCH][AArch64] Adjust writeback in non-zero memset
  - From: Wilco Dijkstra

References:
- [PATCH][AArch64] Adjust writeback in non-zero memset
  - From: Wilco Dijkstra
- Re: [PATCH][AArch64] Adjust writeback in non-zero memset
  - From: Wilco Dijkstra

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