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Re: [PATCH] powerpc: fix sysconf support for cache geometries
- From: Adhemerval Zanella <adhemerval dot zanella at linaro dot org>
- To: libc-alpha at sourceware dot org
- Date: Thu, 15 Jun 2017 17:55:33 -0300
- Subject: Re: [PATCH] powerpc: fix sysconf support for cache geometries
- Authentication-results: sourceware.org; auth=none
- References: <3a5ed534-95d2-4d66-533e-aaed56134344@us.ibm.com>
On 15/06/2017 17:45, Paul Clarke wrote:
> Commit cdfbe5037f2f67bf5f560b73732b69d0fabe2314 added sysconf support
> for cache geometries on powerpc, but mishandled errno. For valid input
> parameters, sysconf() should not set errno.
Do we have a testcase for it? If not I think we should add it.
>
> 2017-06-15 Paul A. Clarke <pc@us.ibm.com>
>
> * sysdeps/unix/sysv/linux/powerpc/sysconf.c: Remove references
> to errno, and simplify remaining related code.
> ---
> sysdeps/unix/sysv/linux/powerpc/sysconf.c | 37 +++++++------------------------
> 1 file changed, 8 insertions(+), 29 deletions(-)
>
> diff --git a/sysdeps/unix/sysv/linux/powerpc/sysconf.c b/sysdeps/unix/sysv/linux/powerpc/sysconf.c
> index 10c4aa0..7bed701 100644
> --- a/sysdeps/unix/sysv/linux/powerpc/sysconf.c
> +++ b/sysdeps/unix/sysv/linux/powerpc/sysconf.c
> @@ -22,37 +22,16 @@
>
> static long linux_sysconf (int name);
>
> -static long
> -auxv2sysconf (unsigned long type)
> -{
> - long rc;
> - rc = __getauxval (type);
> - if (rc == 0)
> - {
> - __set_errno (EINVAL);
> - rc = -1;
> - }
> - return rc;
> -}
> -
> -static long
> +static inline long
> auxv2sysconf_cache_associativity (unsigned long type)
> {
> - long rc;
> - rc = auxv2sysconf (type);
> - if (rc != -1)
> - rc = (rc & 0xffff0000) >> 16;
> - return rc;
> + return (__getauxval (type) & 0xffff0000) >> 16;
> }
>
> -static long
> +static inline long
> auxv2sysconf_cache_linesize (unsigned long type)
> {
> - long rc;
> - rc = auxv2sysconf (type);
> - if (rc != -1)
> - rc = rc & 0xffff;
> - return rc;
> + return __getauxval (type) & 0xffff;
> }
>
> /* Get the value of the system variable NAME. */
> @@ -62,25 +41,25 @@ __sysconf (int name)
> switch (name)
> {
> case _SC_LEVEL1_ICACHE_SIZE:
> - return auxv2sysconf (AT_L1I_CACHESIZE);
> + return __getauxval (AT_L1I_CACHESIZE);
> case _SC_LEVEL1_ICACHE_ASSOC:
> return auxv2sysconf_cache_associativity (AT_L1I_CACHEGEOMETRY);
> case _SC_LEVEL1_ICACHE_LINESIZE:
> return auxv2sysconf_cache_linesize (AT_L1I_CACHEGEOMETRY);
> case _SC_LEVEL1_DCACHE_SIZE:
> - return auxv2sysconf (AT_L1D_CACHESIZE);
> + return __getauxval (AT_L1D_CACHESIZE);
> case _SC_LEVEL1_DCACHE_ASSOC:
> return auxv2sysconf_cache_associativity (AT_L1D_CACHEGEOMETRY);
> case _SC_LEVEL1_DCACHE_LINESIZE:
> return auxv2sysconf_cache_linesize (AT_L1D_CACHEGEOMETRY);
> case _SC_LEVEL2_CACHE_SIZE:
> - return auxv2sysconf (AT_L2_CACHESIZE);
> + return __getauxval (AT_L2_CACHESIZE);
> case _SC_LEVEL2_CACHE_ASSOC:
> return auxv2sysconf_cache_associativity (AT_L2_CACHEGEOMETRY);
> case _SC_LEVEL2_CACHE_LINESIZE:
> return auxv2sysconf_cache_linesize (AT_L2_CACHEGEOMETRY);
> case _SC_LEVEL3_CACHE_SIZE:
> - return auxv2sysconf (AT_L3_CACHESIZE);
> + return __getauxval (AT_L3_CACHESIZE);
> case _SC_LEVEL3_CACHE_ASSOC:
> return auxv2sysconf_cache_associativity (AT_L3_CACHEGEOMETRY);
> case _SC_LEVEL3_CACHE_LINESIZE:
>