This is the mail archive of the libc-alpha@sourceware.org mailing list for the glibc project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [PATCH] X86-64: Add _dl_runtime_resolve_avx[512]_opt [BZ #20508]



On 04/10/2016 16:18, Florian Weimer wrote:
> On 10/04/2016 08:13 PM, Adhemerval Zanella wrote:
>> I think 2.24 it is ok since it contains the BZ#20139 fix already.  For 2.23,
>> although it was not really explicit in NEWS, AVX512 is suppose to be supported
>> in a set of different implementation (memmove/memcpy/libmvec).  However my
>> understanding of this issue is limited to be a performance one, so I do not
>> see a pressing matter to change a release requirements for such change.
> 
> As far as I understand it, the issue is that the trampoline writes to the SSE/AVX/AVX2 registers, which clears the AVX-512F bits (which are not saved by the trampoline).
> 
> Intel introduced AVX512F in such a manner that you have to upgrade kernel and userspace in lock-step, which is of course unrealistic.
> 
> Florian

Reading the patch and its description leads to see that it tries to
fix a AVX-SEE transition described by this Intel documentation [1].

A more experienced arch developer could correct me, but my understanding
is hardware itself would save/restore the upper AVX 256 and 512 bits 
when SSE/AVX instruction are mixed together.  Am I missing something
here?

[1] https://software.intel.com/sites/default/files/m/d/4/1/d/8/11MC12_Avoiding_2BAVX-SSE_2BTransition_2BPenalties_2Brh_2Bfinal.pdf


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]