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Re: [PATCH] Add x86-64 memmove with unaligned load/store and rep movsb


On 03/29/2016 02:04 PM, H.J. Lu wrote:
> On Tue, Mar 29, 2016 at 10:41 AM, Carlos O'Donell <carlos@redhat.com> wrote:
>> On 03/29/2016 12:58 PM, H.J. Lu wrote:
>>> The goal of this patch is to replace SSE2 memcpy.S,
>>> memcpy-avx-unaligned.S and memmove-avx-unaligned.S as well as
>>> provide SSE2 memmove with faster alternatives.  bench-memcpy and
>>> bench-memmove data on various Intel and AMD processors are at
>>>
>>> https://sourceware.org/bugzilla/show_bug.cgi?id=19776
>>>
>>> Any comments, feedbacks?
>>
>> I assume this is a WIP? I don't see how this code replaces the memcpy@GLIBC_2.14
>> IFUNC we're currently using, or redirects the IFUNC to use your new functions
>> under certain conditions.
>>
>> For memcpy:
>>
>> * On ivybridge the new code regresses 9% mean performance versus AVX usage?
> 
> Ivy Bridge currently uses__memcpy_sse2_unaligned.  The new one
> will be __memcpy_sse2_unaligned_erms, not __memcpy_avx_unaligned_erms.

OK.

>> * On penryn the new code regresses 18% mean performance versus SSE2 usage?
> 
> Penryn will sick with __memcpy_ssse3_back.

OK.

>> * On bulldozer the new code regresses 18% mean performance versus AVX usage,
>>   and 3% versus SSE2 usage?
> 
> Bulldozer will stick with __memcpy_ssse3.

OK.
 
> As I said, the new one will replace the old one.  That is the new SSE2/AVX
> replaces the old SSE2/AVX.  It won't change the choice of SSE2, SSSE3
> nor AVX for a given processor.

Perfect. Thanks for clarifying. In that case, as long as the ifunc choices
are as above, then it looks good to me.

I've responded again with a more detailed review.

-- 
Cheers,
Carlos.


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