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Re: [RFC x86_64] patch for improving selection order for string and memory routines.
- From: "H.J. Lu" <hjl dot tools at gmail dot com>
- To: "Pawar, Amit" <Amit dot Pawar at amd dot com>
- Cc: "libc-alpha at sourceware dot org" <libc-alpha at sourceware dot org>, "Carlos O'Donell" <carlos at redhat dot com>
- Date: Fri, 5 Feb 2016 09:20:44 -0800
- Subject: Re: [RFC x86_64] patch for improving selection order for string and memory routines.
- Authentication-results: sourceware.org; auth=none
- References: <SN1PR12MB073314D5BCCAB0499D69ACCA97D20 at SN1PR12MB0733 dot namprd12 dot prod dot outlook dot com>
On Fri, Feb 5, 2016 at 9:11 AM, Pawar, Amit <Amit.Pawar@amd.com> wrote:
> Hi ,
> This is a RFC patch to improve selection logic for string and memory routines for x86_64 arch.
> Why required (Selection logic means selection order defined in IFUNC function of string and memory routines in GLIBC) ?
> 1) Current selection logic for few routines does not select faster version incase of AMD CPU's though it supports.
> 2) Does not allow to choose fast implementations for both old and new generation CPU's.
> 3) Updating selection order for newer CPU's may require lot of testing to verify the new order for older CPU's. Otherwise
> new selection order will lead to performance degradation or slower versions are selected though faster one supported.
Please open a bug report with detailed descriptions and examples.