This is the mail archive of the libc-alpha@sourceware.org mailing list for the glibc project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

PATCH: Use register macros in memcmp-sse4.S


Hi,

__x86_64_data_cache_size_half and __x86_64_data_cache_size_half are
longs.  This uses R8_LP to load them.  Tested on Linux/x86-64.  OK to
install?

Thanks.


H.J.
	* sysdeps/x86_64/multiarch/memcmp-sse4.S: Use R8_LP.
 
 2011-11-21  H.J. Lu  <hongjiu.lu@intel.com>
diff --git a/sysdeps/x86_64/multiarch/memcmp-sse4.S b/sysdeps/x86_64/multiarch/memcmp-sse4.S
index 530bf8e..2c87865 100644
--- a/sysdeps/x86_64/multiarch/memcmp-sse4.S
+++ b/sysdeps/x86_64/multiarch/memcmp-sse4.S
@@ -319,9 +319,9 @@ L(less32bytesin256):
 	ALIGN (4)
 L(512bytesormore):
 # ifdef DATA_CACHE_SIZE_HALF
-	mov	$DATA_CACHE_SIZE_HALF, %r8
+	mov	$DATA_CACHE_SIZE_HALF, %R8_LP
 # else
-	mov	__x86_64_data_cache_size_half(%rip), %r8
+	mov	__x86_64_data_cache_size_half(%rip), %R8_LP
 # endif
 	mov	%r8, %r9
 	shr	$1, %r8
@@ -635,9 +635,9 @@ L(less32bytesin256in2alinged):
 	ALIGN (4)
 L(512bytesormorein2aligned):
 # ifdef DATA_CACHE_SIZE_HALF
-	mov	$DATA_CACHE_SIZE_HALF, %r8
+	mov	$DATA_CACHE_SIZE_HALF, %R8_LP
 # else
-	mov	__x86_64_data_cache_size_half(%rip), %r8
+	mov	__x86_64_data_cache_size_half(%rip), %R8_LP
 # endif
 	mov	%r8, %r9
 	shr	$1, %r8
-- 
1.7.6.5


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]