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Re: [PATCH] ppc32 dl-machine.c


Geoff Keating wrote:
> 
> Segher Boessenkool <segher@koffie.nl> writes:
> 
> > Anton Blanchard wrote:
> > > Looks good, except we should have a sync between dcbst and icbi. This
> > > patch applies on top of the last.
> > >
> >
> > You need a sync between icbi and isync, too.  See for example the MPC7410
> > user manual, 2.3.4.3.4.
> 
> It's not necessary according to the architecture docs.  If the MPC7410
> really needs it, it's broken.

Well, I read that doc as "this is a *typical* code sequence for *uni-processor*
systems."

Also, from the specification of the sync and isync instructions, it's clear
that the sync is needed.

> 
> > Even this won't work on all (multiprocessor) machines; dcbf or similar is
> > necessary there.
> 
> I believe no-one has made a chip that requires this.  I hope no-one
> ever does, because of the additional performance hit of going to main
> memory instead of L2 cache.

I believe 750 multi processor needs it -- if those systems exist, even.

> 
> > Oh, and I don't want to think about the races when
> > the kernel decides to schedule in the middle of this sequence, and the
> > next time this process is run, it runs on a different cpu...
> 
> The processors in a multiprocessor system broadcast these operations
> on the bus, and the kernel is responsible for waiting long enough when
> migrating a process to ensure that broadcasts have completed (it gets
> this free since it needs to lock its own data structures anyway).  The
> only operation here that doesn't get broadcast is 'isync'.

icbi isn't broadcast on all systems, either...


Segher


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