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[glibc/release/2.28/master] [AArch64] Add ifunc support for Ares
- From: Wilco Dijkstra <wilco at sourceware dot org>
- To: glibc-cvs at sourceware dot org
- Date: 6 Sep 2019 18:21:55 -0000
- Subject: [glibc/release/2.28/master] [AArch64] Add ifunc support for Ares
https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=1533274d5fd6eec6fd5972bc2f5c643261349c17
commit 1533274d5fd6eec6fd5972bc2f5c643261349c17
Author: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
Date: Wed Dec 19 18:28:24 2018 +0000
[AArch64] Add ifunc support for Ares
Add Ares to the midr_el0 list and support ifunc dispatch. Since Ares
supports 2 128-bit loads/stores, use Neon registers for memcpy by
selecting __memcpy_falkor by default (we should rename this to
__memcpy_simd or similar).
* manual/tunables.texi (glibc.cpu.name): Add ares tunable.
* sysdeps/aarch64/multiarch/memcpy.c (__libc_memcpy): Use
__memcpy_falkor for ares.
* sysdeps/unix/sysv/linux/aarch64/cpu-features.h (IS_ARES):
Add new define.
* sysdeps/unix/sysv/linux/aarch64/cpu-features.c (cpu_list):
Add ares cpu.
(cherry picked from commit 02f440c1ef5d5d79552a524065aa3e2fabe469b9)
Diff:
---
ChangeLog | 10 ++++++++++
manual/tunables.texi | 2 +-
sysdeps/aarch64/multiarch/memcpy.c | 2 +-
sysdeps/unix/sysv/linux/aarch64/cpu-features.c | 1 +
sysdeps/unix/sysv/linux/aarch64/cpu-features.h | 2 ++
5 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/ChangeLog b/ChangeLog
index 93f9e6e..cb52249 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,13 @@
+2019-09-06 Wilco Dijkstra <wdijkstr@arm.com>
+
+ * manual/tunables.texi (glibc.cpu.name): Add ares tunable.
+ * sysdeps/aarch64/multiarch/memcpy.c (__libc_memcpy): Use
+ __memcpy_falkor for ares.
+ * sysdeps/unix/sysv/linux/aarch64/cpu-features.h (IS_ARES):
+ Add new define.
+ * sysdeps/unix/sysv/linux/aarch64/cpu-features.c (cpu_list):
+ Add ares cpu.
+
2019-07-12 Adhemerval Zanella <adhemerval.zanella@linaro.org>
[BZ #24699]
diff --git a/manual/tunables.texi b/manual/tunables.texi
index 9dccf2e..d8c22dd 100644
--- a/manual/tunables.texi
+++ b/manual/tunables.texi
@@ -333,7 +333,7 @@ This tunable is specific to powerpc, powerpc64 and powerpc64le.
The @code{glibc.tune.cpu=xxx} tunable allows the user to tell @theglibc{} to
assume that the CPU is @code{xxx} where xxx may have one of these values:
@code{generic}, @code{falkor}, @code{thunderxt88}, @code{thunderx2t99},
-@code{thunderx2t99p1}.
+@code{thunderx2t99p1}, @code{ares}.
This tunable is specific to aarch64.
@end deftp
diff --git a/sysdeps/aarch64/multiarch/memcpy.c b/sysdeps/aarch64/multiarch/memcpy.c
index 4a04a63..8f5d4e7 100644
--- a/sysdeps/aarch64/multiarch/memcpy.c
+++ b/sysdeps/aarch64/multiarch/memcpy.c
@@ -36,7 +36,7 @@ extern __typeof (__redirect_memcpy) __memcpy_falkor attribute_hidden;
libc_ifunc (__libc_memcpy,
(IS_THUNDERX (midr)
? __memcpy_thunderx
- : (IS_FALKOR (midr) || IS_PHECDA (midr)
+ : (IS_FALKOR (midr) || IS_PHECDA (midr) || IS_ARES (midr)
? __memcpy_falkor
: (IS_THUNDERX2 (midr) || IS_THUNDERX2PA (midr)
? __memcpy_thunderx2
diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c
index 39eba01..5607684 100644
--- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c
+++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c
@@ -36,6 +36,7 @@ static struct cpu_list cpu_list[] = {
{"thunderx2t99", 0x431F0AF0},
{"thunderx2t99p1", 0x420F5160},
{"phecda", 0x680F0000},
+ {"ares", 0x411FD0C0},
{"generic", 0x0}
};
diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h
index eb35adf..153d258 100644
--- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h
+++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h
@@ -51,6 +51,8 @@
#define IS_PHECDA(midr) (MIDR_IMPLEMENTOR(midr) == 'h' \
&& MIDR_PARTNUM(midr) == 0x000)
+#define IS_ARES(midr) (MIDR_IMPLEMENTOR(midr) == 'A' \
+ && MIDR_PARTNUM(midr) == 0xd0c)
struct cpu_features
{