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GNU C Library master sources branch azanella/ifunc-c-sparc-m7 created. glibc-2.26.9000-667-gcd029a4
- From: azanella at sourceware dot org
- To: glibc-cvs at sourceware dot org
- Date: 26 Oct 2017 19:28:31 -0000
- Subject: GNU C Library master sources branch azanella/ifunc-c-sparc-m7 created. glibc-2.26.9000-667-gcd029a4
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http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=cd029a4c8470b6619f35e8cad315ce10c1e7d920
commit cd029a4c8470b6619f35e8cad315ce10c1e7d920
Author: Jose E. Marchesi <jose.marchesi@oracle.com>
Date: Fri Oct 20 20:29:06 2017 -0200
sparc: M7 optimized memset/bzero
Tested in sparcv9-*-* and sparc64-*-* targets in both multi and
non-multi arch configurations.
Support added to identify Sparc M7/T7/S7/M8/T8 processor capability.
Usual "make check" correctness tests run with no regressions.
Performance tests run on Sparc S7 using new code and old niagara4 code.
Optimizations for memset also apply to bzero as they share code.
For memset/bzero, performance comparison with niagara4 code:
For memset nonzero data,
256-1023 bytes - 60-90% gain (in cache); 5% gain (out of cache)
1K+ bytes - 80-260% gain (in cache); 40-80% gain (out of cache)
For memset zero data (and bzero),
256-1023 bytes - 80-120% gain (in cache), 0% gain (out of cache)
1024+ bytes - 2-4x gain (in cache), 10-35% gain (out of cache)
Jose E. Marchesi <jose.marchesi@oracle.com>
Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
(sysdeps_routines): Add memset-niagara7.
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdes_rotuines):
Likewise.
* sysdeps/sparc/sparc32/sparcv9/multiarch/memset-niagara7.S: New
file.
* sysdeps/sparc/sparc64/multiarch/memset-niagara7.S: Likewise.
* sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c
(__libc_ifunc_impl_list): Add __bzero_niagara7 and __memset_niagara7.
* sysdeps/sparc/sparc64/multiarch/ifunc-memset.h (IFUNC_SELECTOR):
Add niagara7 option.
diff --git a/ChangeLog b/ChangeLog
index b77a9e5..a3f8a8f 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -2,6 +2,18 @@
Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
+ (sysdeps_routines): Add memset-niagara7.
+ * sysdeps/sparc/sparc64/multiarch/Makefile (sysdes_rotuines):
+ Likewise.
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/memset-niagara7.S: New
+ file.
+ * sysdeps/sparc/sparc64/multiarch/memset-niagara7.S: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c
+ (__libc_ifunc_impl_list): Add __bzero_niagara7 and __memset_niagara7.
+ * sysdeps/sparc/sparc64/multiarch/ifunc-memset.h (IFUNC_SELECTOR):
+ Add niagara7 option.
+
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
(sysdeps_routines): Add memcpy-memmove-niagara7 and memmove-ultra1.
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdeps_routines):
Likewise.
diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
index 869f063..a6d08f3 100644
--- a/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
+++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
@@ -10,5 +10,5 @@ ifeq ($(subdir),string)
sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \
memset-niagara1 memcpy-niagara4 memset-niagara4 \
memcpy-ultra1 memset-ultra1 memcpy-memmove-niagara7 \
- memmove-ultra1
+ memmove-ultra1 memset-niagara7
endif
diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/memset-niagara7.S b/sysdeps/sparc/sparc32/sparcv9/multiarch/memset-niagara7.S
new file mode 100644
index 0000000..de91aa4
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/memset-niagara7.S
@@ -0,0 +1,2 @@
+#define XCC icc
+#include <sparc64/multiarch/memset-niagara7.S>
diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile
index 69292ca..eaf758e 100644
--- a/sysdeps/sparc/sparc64/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/multiarch/Makefile
@@ -10,7 +10,7 @@ ifeq ($(subdir),string)
sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \
memset-niagara1 memcpy-niagara4 memset-niagara4 \
memcpy-ultra1 memset-ultra1 memcpy-memmove-niagara7 \
- memmove-ultra1
+ memmove-ultra1 memset-niagara7
endif
ifeq ($(subdir),stdlib)
diff --git a/sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c b/sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c
index a803392..cce78f0 100644
--- a/sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c
+++ b/sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c
@@ -62,6 +62,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
IFUNC_IMPL_ADD (array, i, mempcpy, 1, __mempcpy_ultra1));
IFUNC_IMPL (i, name, bzero,
+ IFUNC_IMPL_ADD (array, i, bzero, hwcap & HWCAP_SPARC_ADP,
+ __bzero_niagara7)
IFUNC_IMPL_ADD (array, i, bzero, hwcap & HWCAP_SPARC_CRYPTO,
__bzero_niagara4)
IFUNC_IMPL_ADD (array, i, bzero, hwcap & HWCAP_SPARC_BLKINIT,
@@ -69,6 +71,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
IFUNC_IMPL_ADD (array, i, bzero, 1, __bzero_ultra1));
IFUNC_IMPL (i, name, memset,
+ IFUNC_IMPL_ADD (array, i, memset, hwcap & HWCAP_SPARC_ADP,
+ __memset_niagara7)
IFUNC_IMPL_ADD (array, i, memset, hwcap & HWCAP_SPARC_CRYPTO,
__memset_niagara4)
IFUNC_IMPL_ADD (array, i, memset, hwcap & HWCAP_SPARC_BLKINIT,
diff --git a/sysdeps/sparc/sparc64/multiarch/ifunc-memset.h b/sysdeps/sparc/sparc64/multiarch/ifunc-memset.h
index f3b9293..bc273d6 100644
--- a/sysdeps/sparc/sparc64/multiarch/ifunc-memset.h
+++ b/sysdeps/sparc/sparc64/multiarch/ifunc-memset.h
@@ -19,6 +19,7 @@
#include <ifunc-init.h>
+extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara7) attribute_hidden;
extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara4) attribute_hidden;
extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara1) attribute_hidden;
extern __typeof (REDIRECT_NAME) OPTIMIZE (ultra1) attribute_hidden;
@@ -26,6 +27,8 @@ extern __typeof (REDIRECT_NAME) OPTIMIZE (ultra1) attribute_hidden;
static inline void *
IFUNC_SELECTOR (int hwcap)
{
+ if (hwcap & HWCAP_SPARC_ADP)
+ return OPTIMIZE (niagara7);
if (hwcap & HWCAP_SPARC_CRYPTO)
return OPTIMIZE (niagara4);
if (hwcap & HWCAP_SPARC_BLKINIT)
diff --git a/sysdeps/sparc/sparc64/multiarch/memset-niagara7.S b/sysdeps/sparc/sparc64/multiarch/memset-niagara7.S
new file mode 100644
index 0000000..bfe107e
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/memset-niagara7.S
@@ -0,0 +1,334 @@
+/* Set a block of memory to some byte value. For SUN4V M7.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+
+#ifndef XCC
+# define XCC xcc
+#endif
+ .register %g2, #scratch
+ .register %g3, #scratch
+
+/* The algorithm is as follows :
+ *
+ * For small 7 or fewer bytes stores, bytes will be stored.
+ *
+ * For less than 32 bytes stores, align the address on 4 byte boundary.
+ * Then store as many 4-byte chunks, followed by trailing bytes.
+ *
+ * For sizes greater than 32 bytes, align the address on 8 byte boundary.
+ * if (count >= 64) {
+ * store 8-bytes chunks to align the address on 64 byte boundary
+ * if (value to be set is zero && count >= MIN_ZERO) {
+ * Using BIS stores, set the first long word of each
+ * 64-byte cache line to zero which will also clear the
+ * other seven long words of the cache line.
+ * }
+ * else if (count >= MIN_LOOP) {
+ * Using BIS stores, set the first long word of each of
+ * ST_CHUNK cache lines (64 bytes each) before the main
+ * loop is entered.
+ * In the main loop, continue pre-setting the first long
+ * word of each cache line ST_CHUNK lines in advance while
+ * setting the other seven long words (56 bytes) of each
+ * cache line until fewer than ST_CHUNK*64 bytes remain.
+ * Then set the remaining seven long words of each cache
+ * line that has already had its first long word set.
+ * }
+ * store remaining data in 64-byte chunks until less than
+ * 64 bytes remain.
+ * }
+ * Store as many 8-byte chunks, followed by trailing bytes.
+ *
+ *
+ * BIS = Block Init Store
+ * Doing the advance store of the first element of the cache line
+ * initiates the displacement of a cache line while only using a single
+ * instruction in the pipeline. That avoids various pipeline delays,
+ * such as filling the miss buffer. The performance effect is
+ * similar to prefetching for normal stores.
+ * The special case for zero fills runs faster and uses fewer instruction
+ * cycles than the normal memset loop.
+ *
+ * We only use BIS for memset of greater than MIN_LOOP bytes because a sequence
+ * BIS stores must be followed by a membar #StoreStore. The benefit of
+ * the BIS store must be balanced against the cost of the membar operation.
+ */
+
+/*
+ * ASI_STBI_P marks the cache line as "least recently used"
+ * which means if many threads are active, it has a high chance
+ * of being pushed out of the cache between the first initializing
+ * store and the final stores.
+ * Thus, we use ASI_STBIMRU_P which marks the cache line as
+ * "most recently used" for all but the last store to the cache line.
+ */
+
+#define ASI_BLK_INIT_QUAD_LDD_P 0xe2
+#define ASI_ST_BLK_INIT_MRU_P 0xf2
+
+#define ASI_STBI_P ASI_BLK_INIT_QUAD_LDD_P
+#define ASI_STBIMRU_P ASI_ST_BLK_INIT_MRU_P
+
+#define ST_CHUNK 24 /* multiple of 4 due to loop unrolling */
+#define MIN_LOOP (ST_CHUNK)*64
+#define MIN_ZERO 256
+
+#define EX_ST(x) x
+#define EX_RETVAL(x) x
+#define STORE_ASI(src,addr) stxa src, [addr] ASI_STBIMRU_P
+#define STORE_INIT(src,addr) stxa src, [addr] ASI_STBI_P
+
+#if IS_IN (libc)
+
+ .text
+ .align 32
+
+ENTRY(__bzero_niagara7)
+ /* bzero (dst, size) */
+ mov %o1, %o2
+ mov 0, %o1
+ /* fall through into memset code */
+END(__bzero_niagara7)
+
+ENTRY(__memset_niagara7)
+ /* memset (src, c, size) */
+ mov %o0, %o5 /* copy sp1 before using it */
+ cmp %o2, 7 /* if small counts, just write bytes */
+ bleu,pn %XCC, .Lwrchar
+ and %o1, 0xff, %o1 /* o1 is (char)c */
+
+ sll %o1, 8, %o3
+ or %o1, %o3, %o1 /* now o1 has 2 bytes of c */
+ sll %o1, 16, %o3
+ cmp %o2, 32
+ blu,pn %XCC, .Lwdalign
+ or %o1, %o3, %o1 /* now o1 has 4 bytes of c */
+
+ sllx %o1, 32, %o3
+ or %o1, %o3, %o1 /* now o1 has 8 bytes of c */
+
+.Ldbalign:
+ andcc %o5, 7, %o3 /* is sp1 aligned on a 8 byte bound? */
+ bz,pt %XCC, .Lblkalign /* already long word aligned */
+ sub %o3, 8, %o3 /* -(bytes till long word aligned) */
+
+ add %o2, %o3, %o2 /* update o2 with new count */
+ /* Set -(%o3) bytes till sp1 long word aligned */
+1: stb %o1, [%o5] /* there is at least 1 byte to set */
+ inccc %o3 /* byte clearing loop */
+ bl,pt %XCC, 1b
+ inc %o5
+
+ /* Now sp1 is long word aligned (sp1 is found in %o5) */
+.Lblkalign:
+ cmp %o2, 64 /* check if there are 64 bytes to set */
+ blu,pn %XCC, .Lwrshort
+ mov %o2, %o3
+
+ andcc %o5, 63, %o3 /* is sp1 block aligned? */
+ bz,pt %XCC, .Lblkwr /* now block aligned */
+ sub %o3, 64, %o3 /* o3 is -(bytes till block aligned) */
+ add %o2, %o3, %o2 /* o2 is the remainder */
+
+ /* Store -(%o3) bytes till dst is block (64 byte) aligned. */
+ /* Use long word stores. */
+ /* Recall that dst is already long word aligned */
+1:
+ addcc %o3, 8, %o3
+ stx %o1, [%o5]
+ bl,pt %XCC, 1b
+ add %o5, 8, %o5
+
+ /* Now sp1 is block aligned */
+.Lblkwr:
+ andn %o2, 63, %o4 /* calculate size of blocks in bytes */
+ brz,pn %o1, .Lwrzero /* special case if c == 0 */
+ and %o2, 63, %o3 /* %o3 = bytes left after blk stores */
+
+ cmp %o4, MIN_LOOP /* check for enough bytes to set */
+ blu,pn %XCC, .Lshort_set /* to justify cost of membar */
+ nop /* must be > pre-cleared lines */
+
+ /* initial cache-clearing stores */
+ /* get store pipeline moving */
+
+/* Primary memset loop for large memsets */
+.Lwr_loop:
+ mov ST_CHUNK, %g1
+.Lwr_loop_start:
+ subcc %g1, 4, %g1
+ EX_ST(STORE_ASI(%o1,%o5))
+ add %o5, 64, %o5
+ EX_ST(STORE_ASI(%o1,%o5))
+ add %o5, 64, %o5
+ EX_ST(STORE_ASI(%o1,%o5))
+ add %o5, 64, %o5
+ EX_ST(STORE_ASI(%o1,%o5))
+ bgu %XCC, .Lwr_loop_start
+ add %o5, 64, %o5
+
+ sub %o5, ST_CHUNK*64, %o5 /* reset %o5 */
+ mov ST_CHUNK, %g1
+ sub %o5, 8, %o5 /* adjust %o5 for ASI store */
+
+.Lwr_loop_rest:
+ stx %o1,[%o5+8+8]
+ sub %o4, 64, %o4
+ stx %o1,[%o5+16+8]
+ subcc %g1, 1, %g1
+ stx %o1,[%o5+24+8]
+ stx %o1,[%o5+32+8]
+ stx %o1,[%o5+40+8]
+ add %o5, 64, %o5
+ stx %o1,[%o5-8]
+ bgu %XCC, .Lwr_loop_rest
+ EX_ST(STORE_INIT(%o1,%o5))
+
+ add %o5, 8, %o5 /* restore %o5 offset */
+
+ /* If more than ST_CHUNK*64 bytes remain to set, continue */
+ /* setting the first long word of each cache line in advance */
+ /* to keep the store pipeline moving. */
+
+ cmp %o4, ST_CHUNK*64
+ bge,pt %XCC, .Lwr_loop_start
+ mov ST_CHUNK, %g1
+
+ brz,a,pn %o4, .Lasi_done
+ nop
+
+ sub %o5, 8, %o5 /* adjust %o5 for ASI store */
+.Lwr_loop_small:
+ add %o5, 8, %o5 /* adjust %o5 for ASI store */
+ EX_ST(STORE_ASI(%o1,%o5))
+ stx %o1,[%o5+8]
+ stx %o1,[%o5+16]
+ stx %o1,[%o5+24]
+ stx %o1,[%o5+32]
+ subcc %o4, 64, %o4
+ stx %o1,[%o5+40]
+ add %o5, 56, %o5
+ stx %o1,[%o5-8]
+ bgu,pt %XCC, .Lwr_loop_small
+ EX_ST(STORE_INIT(%o1,%o5))
+
+ ba .Lasi_done
+ add %o5, 8, %o5 /* restore %o5 offset */
+
+/* Special case loop for zero fill memsets */
+/* For each 64 byte cache line, single STBI to first element */
+/* clears line */
+.Lwrzero:
+ cmp %o4, MIN_ZERO /* check if enough bytes to set */
+ /* to pay %asi + membar cost */
+ blu %XCC, .Lshort_set
+ nop
+ sub %o4, 256, %o4
+
+.Lwrzero_loop:
+ mov 64, %g3
+ EX_ST(STORE_INIT(%o1,%o5))
+ subcc %o4, 256, %o4
+ EX_ST(STORE_INIT(%o1,%o5+%g3))
+ add %o5, 256, %o5
+ sub %g3, 192, %g3
+ EX_ST(STORE_INIT(%o1,%o5+%g3))
+ add %g3, 64, %g3
+ bge,pt %XCC, .Lwrzero_loop
+ EX_ST(STORE_INIT(%o1,%o5+%g3))
+ add %o4, 256, %o4
+
+ brz,pn %o4, .Lbsi_done
+ nop
+.Lwrzero_small:
+ EX_ST(STORE_INIT(%o1,%o5))
+ subcc %o4, 64, %o4
+ bgu,pt %XCC, .Lwrzero_small
+ add %o5, 64, %o5
+
+.Lasi_done:
+.Lbsi_done:
+ membar #StoreStore /* required by use of BSI */
+
+.Lshort_set:
+ cmp %o4, 64 /* check if 64 bytes to set */
+ blu %XCC, 5f
+ nop
+4: /* set final blocks of 64 bytes */
+ stx %o1, [%o5]
+ stx %o1, [%o5+8]
+ stx %o1, [%o5+16]
+ stx %o1, [%o5+24]
+ subcc %o4, 64, %o4
+ stx %o1, [%o5+32]
+ stx %o1, [%o5+40]
+ add %o5, 64, %o5
+ stx %o1, [%o5-16]
+ bgu,pt %XCC, 4b
+ stx %o1, [%o5-8]
+
+5:
+ /* Set the remaining long words */
+.Lwrshort:
+ subcc %o3, 8, %o3 /* Can we store any long words? */
+ blu,pn %XCC, .Lwrchars
+ and %o2, 7, %o2 /* calc bytes left after long words */
+6:
+ subcc %o3, 8, %o3
+ stx %o1, [%o5] /* store the long words */
+ bgeu,pt %XCC, 6b
+ add %o5, 8, %o5
+
+.Lwrchars: /* check for extra chars */
+ brnz %o2, .Lwrfin
+ nop
+ retl
+ nop
+
+.Lwdalign:
+ andcc %o5, 3, %o3 /* is sp1 aligned on a word boundary */
+ bz,pn %XCC, .Lwrword
+ andn %o2, 3, %o3 /* create word sized count in %o3 */
+
+ dec %o2 /* decrement count */
+ stb %o1, [%o5] /* clear a byte */
+ b .Lwdalign
+ inc %o5 /* next byte */
+
+.Lwrword:
+ subcc %o3, 4, %o3
+ st %o1, [%o5] /* 4-byte writing loop */
+ bnz,pt %XCC, .Lwrword
+ add %o5, 4, %o5
+ and %o2, 3, %o2 /* leftover count, if any */
+
+.Lwrchar:
+ /* Set the remaining bytes, if any */
+ brz %o2, .Lexit
+ nop
+.Lwrfin:
+ deccc %o2
+ stb %o1, [%o5]
+ bgu,pt %XCC, .Lwrfin
+ inc %o5
+.Lexit:
+ retl /* %o0 was preserved */
+ nop
+END(__memset_niagara7)
+#endif
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=d3199b6640e94eaed71e89a985bf0388e2f4d30b
commit d3199b6640e94eaed71e89a985bf0388e2f4d30b
Author: Jose E. Marchesi <jose.marchesi@oracle.com>
Date: Fri Oct 20 20:21:56 2017 -0200
sparc: M7 optimized memcpy/mempcpy/memmove
Tested in sparcv9-*-* and sparc64-*-* targets in both multi and
non-multi arch configurations.
Support added to identify Sparc M7/T7/S7/M8/T8 processor capability.
Usual "make check" correctness tests run with no regressions.
Performance tests run on Sparc S7 using new code and old niagara4 code.
Optimizations for memcpy also apply to mempcpy and memmove
where they share code. Optimizations for memset also apply
to bzero as they share code.
For memcpy/mempcpy/memmove, performance comparison with niagara4 code:
Long word aligned data
0-127 bytes - minimal changes
128-1023 bytes - 7-30% gain
1024+ bytes - 1-7% gain (in cache); 30-100% gain (out of cache)
Word aligned data
0-127 bytes - 50%+ gain
128-1023 bytes - 10-200% gain
1024+ bytes - 0-15% gain (in cache); 5-50% gain (out of cache)
Unaligned data
0-127 bytes - 0-70%+ gain
128-447 bytes - 40-80%+ gain
448-511 bytes - 1-3% loss
512-4096 bytes - 2-3% gain (in cache); 0-20% gain (out of cache)
4096+ bytes - ± 3% (in cache); 20-50% gain (out of cache)
Jose E. Marchesi <jose.marchesi@oracle.com>
Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
(sysdeps_routines): Add memcpy-memmove-niagara7 and memmove-ultra1.
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdeps_routines):
Likewise.
* sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-memmove-niagara7.S:
New file.
* sysdeps/sparc/sparc32/sparcv9/multiarch/memmove-ultra1.S: Likewise.
* sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-memmove.c: Likewise.
* sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c
(__libc_ifunc_impl_list): Add __memcpy_niagara7, __mempcpy_niagara7,
and __memmove_niagara7.
* sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h (IFUNC_SELECTOR):
Add niagara7 option.
* sysdeps/sparc/sparc64/multiarch/ifunc-memmove.c: New file.
* sysdeps/sparc/sparc64/multiarch/ifunc-memmove.h: Likewise.
* sysdeps/sparc/sparc64/multiarch/memcpy-memmove-niagara7.S: Likewise.
* sysdeps/sparc/sparc64/multiarch/memmove-ultra1.S: Likewise.
* sysdeps/sparc/sparc64/multiarch/rtld-memmove.c: Likewise.
diff --git a/ChangeLog b/ChangeLog
index cae2e34..b77a9e5 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,4 +1,26 @@
2017-10-23 Jose E. Marchesi <jose.marchesi@oracle.com>
+ Adhemerval Zanella <adhemerval.zanella@linaro.org>
+
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
+ (sysdeps_routines): Add memcpy-memmove-niagara7 and memmove-ultra1.
+ * sysdeps/sparc/sparc64/multiarch/Makefile (sysdeps_routines):
+ Likewise.
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-memmove-niagara7.S:
+ New file.
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/memmove-ultra1.S: Likewise.
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-memmove.c: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c
+ (__libc_ifunc_impl_list): Add __memcpy_niagara7, __mempcpy_niagara7,
+ and __memmove_niagara7.
+ * sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h (IFUNC_SELECTOR):
+ Add niagara7 option.
+ * sysdeps/sparc/sparc64/multiarch/ifunc-memmove.c: New file.
+ * sysdeps/sparc/sparc64/multiarch/ifunc-memmove.h: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/memcpy-memmove-niagara7.S: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/memmove-ultra1.S: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/rtld-memmove.c: Likewise.
+
+2017-10-23 Jose E. Marchesi <jose.marchesi@oracle.com>
* sysdeps/sparc/sparc32/sparcv9/memmove.S: New file.
* sysdeps/sparc/sparc32/sparcv9/rtld-memmove.c: Likewise.
diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
index e12636b..869f063 100644
--- a/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
+++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
@@ -9,5 +9,6 @@ endif
ifeq ($(subdir),string)
sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \
memset-niagara1 memcpy-niagara4 memset-niagara4 \
- memcpy-ultra1 memset-ultra1
+ memcpy-ultra1 memset-ultra1 memcpy-memmove-niagara7 \
+ memmove-ultra1
endif
diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-memmove-niagara7.S b/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-memmove-niagara7.S
new file mode 100644
index 0000000..16da150
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-memmove-niagara7.S
@@ -0,0 +1,2 @@
+#define XCC icc
+#include <sparc64/multiarch/memcpy-memmove-niagara7.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/memmove-ultra1.S b/sysdeps/sparc/sparc32/sparcv9/multiarch/memmove-ultra1.S
new file mode 100644
index 0000000..35ba76b
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/memmove-ultra1.S
@@ -0,0 +1,4 @@
+#undef libc_hidden_builtin_def
+#define libc_hidden_builtin_def(name)
+#define memmove __memmove_ultra1
+#include <sysdeps/sparc/sparc32/sparcv9/memmove.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-memmove.c b/sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-memmove.c
new file mode 100644
index 0000000..2c88061
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-memmove.c
@@ -0,0 +1 @@
+#include <sparc64/multiarch/rtld-memmove.c>
diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile
index ba8ede1..69292ca 100644
--- a/sysdeps/sparc/sparc64/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/multiarch/Makefile
@@ -9,7 +9,8 @@ endif
ifeq ($(subdir),string)
sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \
memset-niagara1 memcpy-niagara4 memset-niagara4 \
- memcpy-ultra1 memset-ultra1
+ memcpy-ultra1 memset-ultra1 memcpy-memmove-niagara7 \
+ memmove-ultra1
endif
ifeq ($(subdir),stdlib)
diff --git a/sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c b/sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c
index a97bc45..a803392 100644
--- a/sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c
+++ b/sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c
@@ -36,6 +36,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
hwcap = GLRO(dl_hwcap);
IFUNC_IMPL (i, name, memcpy,
+ IFUNC_IMPL_ADD (array, i, memcpy, hwcap & HWCAP_SPARC_ADP,
+ __memcpy_niagara7)
IFUNC_IMPL_ADD (array, i, memcpy, hwcap & HWCAP_SPARC_CRYPTO,
__memcpy_niagara4)
IFUNC_IMPL_ADD (array, i, memcpy, hwcap & HWCAP_SPARC_N2,
@@ -47,6 +49,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_ultra1));
IFUNC_IMPL (i, name, mempcpy,
+ IFUNC_IMPL_ADD (array, i, mempcpy, hwcap & HWCAP_SPARC_ADP,
+ __mempcpy_niagara7)
IFUNC_IMPL_ADD (array, i, mempcpy, hwcap & HWCAP_SPARC_CRYPTO,
__mempcpy_niagara4)
IFUNC_IMPL_ADD (array, i, mempcpy, hwcap & HWCAP_SPARC_N2,
@@ -71,5 +75,10 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
__memset_niagara1)
IFUNC_IMPL_ADD (array, i, memset, 1, __memset_ultra1));
+ IFUNC_IMPL (i, name, memmove,
+ IFUNC_IMPL_ADD (array, i, memmove, hwcap & HWCAP_SPARC_ADP,
+ __memmove_niagara7)
+ IFUNC_IMPL_ADD (array, i, memmove, 1, __memmove_ultra1));
+
return i;
}
diff --git a/sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h b/sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h
index 46f3795..dbdad2d 100644
--- a/sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h
+++ b/sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h
@@ -19,6 +19,7 @@
#include <ifunc-init.h>
+extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara7) attribute_hidden;
extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara4) attribute_hidden;
extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara2) attribute_hidden;
extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara1) attribute_hidden;
@@ -28,6 +29,8 @@ extern __typeof (REDIRECT_NAME) OPTIMIZE (ultra1) attribute_hidden;
static inline void *
IFUNC_SELECTOR (int hwcap)
{
+ if (hwcap & HWCAP_SPARC_ADP)
+ return OPTIMIZE (niagara7);
if (hwcap & HWCAP_SPARC_CRYPTO)
return OPTIMIZE (niagara4);
if (hwcap & HWCAP_SPARC_N2)
diff --git a/sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h b/sysdeps/sparc/sparc64/multiarch/ifunc-memmove.c
similarity index 52%
copy from sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h
copy to sysdeps/sparc/sparc64/multiarch/ifunc-memmove.c
index 46f3795..6aa01e1 100644
--- a/sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h
+++ b/sysdeps/sparc/sparc64/multiarch/ifunc-memmove.c
@@ -1,4 +1,4 @@
-/* Common definition for memcpy and mempcpy implementation.
+/* Multiple versions of memmove.
All versions must be listed in ifunc-impl-list.c.
Copyright (C) 2017 Free Software Foundation, Inc.
This file is part of the GNU C Library.
@@ -17,24 +17,16 @@
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
-#include <ifunc-init.h>
-
-extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara4) attribute_hidden;
-extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara2) attribute_hidden;
-extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara1) attribute_hidden;
-extern __typeof (REDIRECT_NAME) OPTIMIZE (ultra3) attribute_hidden;
-extern __typeof (REDIRECT_NAME) OPTIMIZE (ultra1) attribute_hidden;
-
-static inline void *
-IFUNC_SELECTOR (int hwcap)
-{
- if (hwcap & HWCAP_SPARC_CRYPTO)
- return OPTIMIZE (niagara4);
- if (hwcap & HWCAP_SPARC_N2)
- return OPTIMIZE (niagara2);
- if (hwcap & HWCAP_SPARC_BLKINIT)
- return OPTIMIZE (niagara1);
- if (hwcap & HWCAP_SPARC_ULTRA3)
- return OPTIMIZE (ultra3);
- return OPTIMIZE (ultra1);
-}
+#if IS_IN (libc)
+# define memmove __redirect_memmove
+# include <string.h>
+# undef memmove
+
+# include <sparc-ifunc.h>
+
+# define SYMBOL_NAME memmove
+# include "ifunc-memmove.h"
+
+sparc_libc_ifunc_redirected (__redirect_memmove, memmove, IFUNC_SELECTOR);
+
+sparc_ifunc_redirected_hidden_def (__redirect_memmove, memmove)
diff --git a/sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h b/sysdeps/sparc/sparc64/multiarch/ifunc-memmove.h
similarity index 63%
copy from sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h
copy to sysdeps/sparc/sparc64/multiarch/ifunc-memmove.h
index 46f3795..35ca614 100644
--- a/sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h
+++ b/sysdeps/sparc/sparc64/multiarch/ifunc-memmove.h
@@ -1,4 +1,4 @@
-/* Common definition for memcpy and mempcpy implementation.
+/* Common definition for memmove implementation.
All versions must be listed in ifunc-impl-list.c.
Copyright (C) 2017 Free Software Foundation, Inc.
This file is part of the GNU C Library.
@@ -19,22 +19,13 @@
#include <ifunc-init.h>
-extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara4) attribute_hidden;
-extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara2) attribute_hidden;
-extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara1) attribute_hidden;
-extern __typeof (REDIRECT_NAME) OPTIMIZE (ultra3) attribute_hidden;
+extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara7) attribute_hidden;
extern __typeof (REDIRECT_NAME) OPTIMIZE (ultra1) attribute_hidden;
static inline void *
IFUNC_SELECTOR (int hwcap)
{
- if (hwcap & HWCAP_SPARC_CRYPTO)
- return OPTIMIZE (niagara4);
- if (hwcap & HWCAP_SPARC_N2)
- return OPTIMIZE (niagara2);
- if (hwcap & HWCAP_SPARC_BLKINIT)
- return OPTIMIZE (niagara1);
- if (hwcap & HWCAP_SPARC_ULTRA3)
- return OPTIMIZE (ultra3);
+ if (hwcap & HWCAP_SPARC_ADP)
+ return OPTIMIZE (niagara7);
return OPTIMIZE (ultra1);
}
diff --git a/sysdeps/sparc/sparc64/multiarch/memcpy-memmove-niagara7.S b/sysdeps/sparc/sparc64/multiarch/memcpy-memmove-niagara7.S
new file mode 100644
index 0000000..8c31e93
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/memcpy-memmove-niagara7.S
@@ -0,0 +1,980 @@
+/* Copy SIZE bytes from SRC to DEST. For SUN4V M7.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+
+#ifndef XCC
+# define XCC xcc
+#endif
+ .register %g2,#scratch
+ .register %g3,#scratch
+ .register %g6,#scratch
+
+#define FPRS_FEF 0x04
+
+/*
+ * ASI_STBI_P marks the cache line as "least recently used"
+ * which means if many threads are active, it has a high chance
+ * of being pushed out of the cache between the first initializing
+ * store and the final stores.
+ * Thus, in this algorithm we use ASI_STBIMRU_P which marks the
+ * cache line as "most recently used" for all but the last cache
+ * line.
+ */
+
+#define ASI_BLK_INIT_QUAD_LDD_P 0xe2
+#define ASI_ST_BLK_INIT_MRU_P 0xf2
+
+#define ASI_STBI_P ASI_BLK_INIT_QUAD_LDD_P
+#define ASI_STBIMRU_P ASI_ST_BLK_INIT_MRU_P
+
+#define BLOCK_SIZE 64 /* L2 data cache line size */
+#define SHORTCOPY 3
+#define SHORTCHECK 14
+#define SHORT_LONG 64 /* max copy for short longword-aligned case */
+ /* must be at least 64 */
+#define SMALL_MAX 255 /* max small copy for word/long aligned */
+#define SMALL_UMAX 128 /* max small copy for unaligned case */
+#define MED_WMAX 1023 /* max copy for medium word-aligned case */
+#define MED_MAX 511 /* max copy for medium longword-aligned case */
+#define ST_CHUNK 20 /* ST_CHUNK - block of values for BIS Store */
+/* on T4, prefetch 20 is a strong read prefetch to L1 and L2 data cache
+ * prefetch 20 can cause inst pipeline to delay if data is in memory
+ * prefetch 21 is a strong read prefetch to L2 data cache, not L1 data cache */
+#define ALIGN_PRE 20 /* distance for aligned prefetch loop */
+
+#define EX_ST(x) x
+#define EX_RETVAL(x) x
+#define STORE_ASI(src,addr) stxa src, [addr] ASI_STBIMRU_P
+#define STORE_INIT(src,addr) stxa src, [addr] ASI_STBI_P
+
+#if IS_IN (libc)
+
+ .text
+
+ENTRY(__memmove_niagara7)
+ /* %o0=dst, %o1=src, %o2=len */
+ cmp %o1, %o0 /* if from address is >= to use forward copy */
+ bgeu,pn %XCC, .Lforcpy /* else use backward if ... */
+ sub %o0, %o1, %o4 /* get difference of two addresses */
+ cmp %o2, %o4 /* compare size and difference of addresses */
+ bleu,pn %XCC, .Lforcpy /* if size is bigger, do overlapped copy */
+ add %o1, %o2, %o5 /* get to end of source space */
+
+/* an overlapped copy that must be done "backwards" */
+.Lchksize:
+ cmp %o2, 8 /* less than 8 byte do byte copy */
+ blu,pn %XCC, 2f /* else continue */
+
+/* Now size is bigger than 8 */
+.Ldbalign:
+ add %o0, %o2, %g1 /* get to end of dest space */
+ andcc %g1, 7, %o3 /* %o3 has cnt til dst 8 byte align */
+ bz,a,pn %XCC, .Ldbbck /* skip if dst is 8 byte aligned */
+ andn %o2, 7, %o3 /* force %o3 cnt to multiple of 8 */
+ sub %o2, %o3, %o2 /* update o2 with new count */
+
+1: dec %o5 /* decrement source */
+ ldub [%o5], %g1 /* load one byte */
+ deccc %o3 /* decrement count */
+ bgu,pt %XCC, 1b /* if not done keep copying */
+ stb %g1, [%o5+%o4] /* store one byte into dest */
+ andncc %o2, 7, %o3 /* force %o3 cnt to multiple of 8 */
+ bz,pn %XCC, 2f /* if size < 8, move to byte copy */
+
+/* Now Destination is 8 byte aligned */
+.Ldbbck:
+ andcc %o5, 7, %o0 /* %o0 has src offset */
+ bz,a,pn %XCC, .Ldbcopybc /* if src is aligned do fast memmove */
+ sub %o2, %o3, %o2 /* Residue bytes in %o2 */
+
+.Lcpy_dbwdbc: /* alignment of src is needed */
+ sub %o2, 8, %o2 /* set size one loop ahead */
+ sll %o0, 3, %g1 /* %g1 is left shift */
+ mov 64, %g5 /* init %g5 to be 64 */
+ sub %g5, %g1, %g5 /* %g5 rightshift = (64 - leftshift) */
+ sub %o5, %o0, %o5 /* align the src at 8 bytes. */
+ add %o4, %o0, %o4 /* increase diff between src & dst */
+ ldx [%o5], %o1 /* load first 8 bytes */
+ srlx %o1, %g5, %o1
+1: sub %o5, 8, %o5 /* subtract 8 from src */
+ ldx [%o5], %o0 /* load 8 byte */
+ sllx %o0, %g1, %o3 /* shift loaded val left to tmp reg */
+ or %o1, %o3, %o3 /* align data */
+ stx %o3, [%o5+%o4] /* store 8 byte */
+ subcc %o2, 8, %o2 /* subtract 8 byte from size */
+ bg,pt %XCC, 1b /* if size > 0 continue */
+ srlx %o0, %g5, %o1 /* move extra byte for the next use */
+
+ srl %g1, 3, %o0 /* restore %o0 value for alignment */
+ add %o5, %o0, %o5 /* restore src alignment */
+ sub %o4, %o0, %o4 /* restore diff between src & dest */
+
+ ba 2f /* branch to the trailing byte copy */
+ add %o2, 8, %o2 /* restore size value */
+
+.Ldbcopybc: /* alignment of src is not needed */
+1: sub %o5, 8, %o5 /* subtract from src */
+ ldx [%o5], %g1 /* load 8 bytes */
+ subcc %o3, 8, %o3 /* subtract from size */
+ bgu,pt %XCC, 1b /* if size is bigger 0 continue */
+ stx %g1, [%o5+%o4] /* store 8 bytes to destination */
+
+ ba 2f
+ nop
+
+.Lbcbyte:
+1: ldub [%o5], %g1 /* load one byte */
+ stb %g1, [%o5+%o4] /* store one byte */
+2: deccc %o2 /* decrement size */
+ bgeu,a,pt %XCC, 1b /* if size is >= 0 continue */
+ dec %o5 /* decrement from address */
+
+.Lexitbc: /* exit from backward copy */
+ retl
+ add %o5, %o4, %o0 /* restore dest addr */
+
+
+/* Check to see if memmove is large aligned copy
+ * If so, use special version of copy that avoids
+ * use of block store init. */
+.Lforcpy:
+ cmp %o2, SMALL_MAX /* check for not small case */
+ blt,pn %XCC, .Lmv_short /* merge with memcpy */
+ mov %o0, %g1 /* save %o0 */
+ neg %o0, %o5
+ andcc %o5, 7, %o5 /* bytes till DST 8 byte aligned */
+ brz,pt %o5, .Lmv_dst_aligned_on_8
+
+/* %o5 has the bytes to be written in partial store. */
+ sub %o2, %o5, %o2
+ sub %o1, %o0, %o1 /* %o1 gets the difference */
+7: /* dst aligning loop */
+ ldub [%o1+%o0], %o4 /* load one byte */
+ subcc %o5, 1, %o5
+ stb %o4, [%o0]
+ bgu,pt %XCC, 7b
+ add %o0, 1, %o0 /* advance dst */
+ add %o1, %o0, %o1 /* restore %o1 */
+.Lmv_dst_aligned_on_8:
+ andcc %o1, 7, %o5
+ brnz,pn %o5, .Lsrc_dst_unaligned_on_8
+ prefetch [%o1 + (1 * BLOCK_SIZE)], 20
+
+.Lmv_src_dst_aligned_on_8:
+/* check if we are copying MED_MAX or more bytes */
+ cmp %o2, MED_MAX /* limit to store buffer size */
+ bleu,pt %XCC, .Lmedlong
+ prefetch [%o1 + (2 * BLOCK_SIZE)], 20
+
+/* The mv_align loop below mimics the memcpy code for large aligned copies,
+ * but does not use the ASI_STBI_P (block initializing store) performance
+ * optimization. This is used when memcpy is incorrectly invoked with
+ * overlapping buffers. */
+
+.Lmv_large_align8_copy: /* Src and dst share 8 byte align */
+ /* align dst to 64 byte boundary */
+ andcc %o0, 0x3f, %o3 /* check for dst 64 byte aligned */
+ brz,pn %o3, .Lmv_aligned_on_64
+ sub %o3, 64, %o3 /* %o3 has negative bytes to move */
+ add %o2, %o3, %o2 /* adjust remaining count */
+.Lmv_align_to_64:
+ ldx [%o1], %o4
+ add %o1, 8, %o1 /* increment src ptr */
+ addcc %o3, 8, %o3
+ stx %o4, [%o0]
+ brnz,pt %o3, .Lmv_align_to_64
+ add %o0, 8, %o0 /* increment dst ptr */
+
+.Lmv_aligned_on_64:
+ andn %o2, 0x3f, %o5 /* %o5 is multiple of block size */
+ and %o2, 0x3f, %o2 /* residue bytes in %o2 */
+.Lmv_align_loop:
+ ldx [%o1],%o4
+ stx %o4,[%o0]
+ prefetch [%o0 + (10 * BLOCK_SIZE)], 22
+ prefetch [%o1 + (10 * BLOCK_SIZE)], 21
+ subcc %o5, 64, %o5
+ ldx [%o1+8],%o4
+ stx %o4,[%o0+8]
+ ldx [%o1+16],%o4
+ stx %o4,[%o0+16]
+ ldx [%o1+24],%o4
+ stx %o4,[%o0+24]
+ ldx [%o1+32],%o4
+ stx %o4,[%o0+32]
+ ldx [%o1+40],%o4
+ stx %o4,[%o0+40]
+ ldx [%o1+48],%o4
+ add %o1, 64, %o1
+ stx %o4,[%o0+48]
+ add %o0, 64, %o0
+ ldx [%o1-8],%o4
+ bgt,pt %XCC, .Lmv_align_loop
+ stx %o4,[%o0-8]
+
+ ba .Lmedlong
+ nop
+END(__memmove_niagara7)
+
+ENTRY(__mempcpy_niagara7)
+ /* %o0=dst, %o1=src, %o2=len */
+ ba,pt %icc, 101f
+ add %o0, %o2, %g1 /* save dst + len */
+END(__mempcpy_niagara7)
+
+ .align 32
+ENTRY(__memcpy_niagara7)
+100: /* %o0=dst, %o1=src, %o2=len */
+ mov %o0, %g1 /* save %o0 */
+101:
+#ifndef __arch64__
+ srl %o2, 0, %o2
+#endif
+ cmp %o2, SMALL_MAX /* check for not small case */
+ bgeu,pn %XCC, .Lmedium /* go to larger cases */
+.Lmv_short:
+ cmp %o2, SHORTCOPY /* check for really short case */
+ ble,pn %XCC, .Lsmallfin
+ or %o0, %o1, %o4 /* prepare alignment check */
+ andcc %o4, 0x3, %o5 /* test for word alignment */
+ bnz,pn %XCC, .Lsmallunalign /* branch to non-word aligned case */
+ nop
+ subcc %o2, 7, %o2 /* adjust count */
+ ble,pn %XCC, .Lsmallwordx
+ andcc %o4, 0x7, %o5 /* test for long alignment */
+/* 8 or more bytes, src and dest start on word boundary
+ * %o4 contains or %o0, %o1 */
+.Lsmalllong:
+ bnz,pn %XCC, .Lsmallwords /* branch to word aligned case */
+ cmp %o2, SHORT_LONG-7
+ bge,a %XCC, .Lmedl64 /* if we branch */
+ sub %o2,56,%o2 /* adjust %o2 to -63 off count */
+
+/* slightly unroll the small_long_loop to improve very short copies */
+ cmp %o2, 32-7
+ blt,a,pn %XCC, .Lsmall_long_l
+ sub %o1, %o0, %o1 /* %o1 gets the difference */
+
+ ldx [%o1], %o5
+ ldx [%o1+8], %o4
+ ldx [%o1+16], %o3
+
+ subcc %o2, 24, %o2
+ sub %o1, %o0, %o1 /* %o1 gets the difference */
+
+ stx %o5, [%o0] /* write word */
+ stx %o4, [%o0+8] /* write word */
+ stx %o3, [%o0+16] /* write word */
+
+ add %o0, 24, %o0
+
+/* end loop unroll */
+
+.Lsmall_long_l:
+ ldx [%o1+%o0], %o3
+ subcc %o2, 8, %o2
+ add %o0, 8, %o0
+ bgu,pn %XCC, .Lsmall_long_l /* loop until done */
+ stx %o3, [%o0-8] /* write word */
+ addcc %o2, 7, %o2 /* restore %o2 to correct count */
+ bnz,pn %XCC, .Lsmall_long_x /* check for completion */
+ add %o1, %o0, %o1 /* restore %o1 */
+ retl
+ mov EX_RETVAL(%g1), %o0 /* restore %o0 */
+.Lsmall_long_x:
+ cmp %o2, 4 /* check for 4 or more bytes left */
+ blt,pn %XCC, .Lsmallleft3 /* if not, go to finish up */
+ nop
+ lduw [%o1], %o3
+ add %o1, 4, %o1
+ subcc %o2, 4, %o2
+ stw %o3, [%o0]
+ bnz,pn %XCC, .Lsmallleft3
+ add %o0, 4, %o0
+ retl
+ mov EX_RETVAL(%g1), %o0 /* restore %o0 */
+
+ .align 32
+/* src and dest start on word boundary; 7 or fewer bytes */
+.Lsmallwordx:
+ lduw [%o1], %o3 /* read word */
+ addcc %o2, 3, %o2 /* restore count */
+ bz,pt %XCC, .Lsmallexit
+ stw %o3, [%o0] /* write word */
+ deccc %o2 /* reduce count for cc test */
+ ldub [%o1+4], %o3 /* load one byte */
+ bz,pt %XCC, .Lsmallexit
+ stb %o3, [%o0+4] /* store one byte */
+ ldub [%o1+5], %o3 /* load second byte */
+ deccc %o2
+ bz,pt %XCC, .Lsmallexit
+ stb %o3, [%o0+5] /* store second byte */
+ ldub [%o1+6], %o3 /* load third byte */
+ stb %o3, [%o0+6] /* store third byte */
+.Lsmallexit:
+ retl
+ mov EX_RETVAL(%g1), %o0 /* restore %o0 */
+
+ .align 32
+.Lsmallunalign:
+ cmp %o2, SHORTCHECK
+ ble,pn %XCC, .Lsmallrest
+ cmp %o2, SMALL_UMAX
+ bge,pt %XCC, .Lmedium_join
+ andcc %o1, 0x3, %o5 /* is src word aligned */
+ bz,pn %XCC, .Laldst
+ cmp %o5, 2 /* is src half-word aligned */
+ be,pt %XCC, .Ls2algn
+ cmp %o5, 3 /* src is byte aligned */
+.Ls1algn:
+ ldub [%o1], %o3 /* move 1 or 3 bytes to align it */
+ inc 1, %o1
+ stb %o3, [%o0] /* move a byte to align src */
+ inc 1, %o0
+ bne,pt %XCC, .Ls2algn
+ dec %o2
+ b .Lald /* now go align dest */
+ andcc %o0, 0x3, %o5
+
+.Ls2algn:
+ lduh [%o1], %o3 /* know src is 2 byte aligned */
+ inc 2, %o1
+ srl %o3, 8, %o4
+ stb %o4, [%o0] /* have to do bytes, */
+ stb %o3, [%o0 + 1] /* do not know dst alignment */
+ inc 2, %o0
+ dec 2, %o2
+
+.Laldst:
+ andcc %o0, 0x3, %o5 /* align the destination address */
+.Lald:
+ bz,pn %XCC, .Lw4cp
+ cmp %o5, 2
+ be,pn %XCC, .Lw2cp
+ cmp %o5, 3
+.Lw3cp: lduw [%o1], %o4
+ inc 4, %o1
+ srl %o4, 24, %o5
+ stb %o5, [%o0]
+ bne,pt %XCC, .Lw1cp
+ inc %o0
+ dec 1, %o2
+ andn %o2, 3, %o3 /* %o3 is aligned word count */
+ dec 4, %o3 /* avoid reading beyond tail of src */
+ sub %o1, %o0, %o1 /* %o1 gets the difference */
+
+1: sll %o4, 8, %g5 /* save residual bytes */
+ lduw [%o1+%o0], %o4
+ deccc 4, %o3
+ srl %o4, 24, %o5 /* merge with residual */
+ or %o5, %g5, %g5
+ st %g5, [%o0]
+ bnz,pt %XCC, 1b
+ inc 4, %o0
+ sub %o1, 3, %o1 /* used one byte of last word read */
+ and %o2, 3, %o2
+ b 7f
+ inc 4, %o2
+
+.Lw1cp: srl %o4, 8, %o5
+ sth %o5, [%o0]
+ inc 2, %o0
+ dec 3, %o2
+ andn %o2, 3, %o3 /* %o3 is aligned word count */
+ dec 4, %o3 /* avoid reading beyond tail of src */
+ sub %o1, %o0, %o1 /* %o1 gets the difference */
+
+2: sll %o4, 24, %g5 /* save residual bytes */
+ lduw [%o1+%o0], %o4
+ deccc 4, %o3
+ srl %o4, 8, %o5 /* merge with residual */
+ or %o5, %g5, %g5
+ st %g5, [%o0]
+ bnz,pt %XCC, 2b
+ inc 4, %o0
+ sub %o1, 1, %o1 /* used 3 bytes of last word read */
+ and %o2, 3, %o2
+ b 7f
+ inc 4, %o2
+
+.Lw2cp: lduw [%o1], %o4
+ inc 4, %o1
+ srl %o4, 16, %o5
+ sth %o5, [%o0]
+ inc 2, %o0
+ dec 2, %o2
+ andn %o2, 3, %o3 /* %o3 is aligned word count */
+ dec 4, %o3 /* avoid reading beyond tail of src */
+ sub %o1, %o0, %o1 /* %o1 gets the difference */
+
+3: sll %o4, 16, %g5 /* save residual bytes */
+ lduw [%o1+%o0], %o4
+ deccc 4, %o3
+ srl %o4, 16, %o5 /* merge with residual */
+ or %o5, %g5, %g5
+ st %g5, [%o0]
+ bnz,pt %XCC, 3b
+ inc 4, %o0
+ sub %o1, 2, %o1 /* used two bytes of last word read */
+ and %o2, 3, %o2
+ b 7f
+ inc 4, %o2
+
+.Lw4cp: andn %o2, 3, %o3 /* %o3 is aligned word count */
+ sub %o1, %o0, %o1 /* %o1 gets the difference */
+
+1: lduw [%o1+%o0], %o4 /* read from address */
+ deccc 4, %o3 /* decrement count */
+ st %o4, [%o0] /* write at destination address */
+ bgu,pt %XCC, 1b
+ inc 4, %o0 /* increment to address */
+ and %o2, 3, %o2 /* number of leftover bytes, if any */
+
+ /* simple finish up byte copy, works with any alignment */
+7:
+ add %o1, %o0, %o1 /* restore %o1 */
+.Lsmallrest:
+ tst %o2
+ bz,pt %XCC, .Lsmallx
+ cmp %o2, 4
+ blt,pn %XCC, .Lsmallleft3
+ nop
+ sub %o2, 3, %o2
+.Lsmallnotalign4:
+ ldub [%o1], %o3 /* read byte */
+ subcc %o2, 4, %o2 /* reduce count by 4 */
+ stb %o3, [%o0] /* write byte */
+ ldub [%o1+1], %o3 /* repeat for total of 4 bytes */
+ add %o1, 4, %o1 /* advance SRC by 4 */
+ stb %o3, [%o0+1]
+ ldub [%o1-2], %o3
+ add %o0, 4, %o0 /* advance DST by 4 */
+ stb %o3, [%o0-2]
+ ldub [%o1-1], %o3
+ bgu,pt %XCC, .Lsmallnotalign4 /* loop til 3 or fewer bytes remain */
+ stb %o3, [%o0-1]
+ addcc %o2, 3, %o2 /* restore count */
+ bz,pt %XCC, .Lsmallx
+.Lsmallleft3: /* 1, 2, or 3 bytes remain */
+ subcc %o2, 1, %o2
+ ldub [%o1], %o3 /* load one byte */
+ bz,pt %XCC, .Lsmallx
+ stb %o3, [%o0] /* store one byte */
+ ldub [%o1+1], %o3 /* load second byte */
+ subcc %o2, 1, %o2
+ bz,pt %XCC, .Lsmallx
+ stb %o3, [%o0+1] /* store second byte */
+ ldub [%o1+2], %o3 /* load third byte */
+ stb %o3, [%o0+2] /* store third byte */
+.Lsmallx:
+ retl
+ mov EX_RETVAL(%g1), %o0 /* restore %o0 */
+
+.Lsmallfin:
+ tst %o2
+ bnz,pn %XCC, .Lsmallleft3
+ nop
+ retl
+ mov EX_RETVAL(%g1), %o0 /* restore %o0 */
+
+ .align 16
+.Lsmallwords:
+ lduw [%o1], %o3 /* read word */
+ subcc %o2, 8, %o2 /* update count */
+ stw %o3, [%o0] /* write word */
+ add %o1, 8, %o1 /* update SRC */
+ lduw [%o1-4], %o3 /* read word */
+ add %o0, 8, %o0 /* update DST */
+ bgu,pt %XCC, .Lsmallwords /* loop until done */
+ stw %o3, [%o0-4] /* write word */
+ addcc %o2, 7, %o2 /* restore count */
+ bz,pt %XCC, .Lsmallexit /* check for completion */
+ cmp %o2, 4 /* check for 4 or more bytes left */
+ blt,pt %XCC, .Lsmallleft3 /* if not, go to finish up */
+ nop
+ lduw [%o1], %o3
+ add %o1, 4, %o1
+ subcc %o2, 4, %o2
+ add %o0, 4, %o0
+ bnz,pn %XCC, .Lsmallleft3
+ stw %o3, [%o0-4]
+ retl
+ mov EX_RETVAL(%g1), %o0 /* restore %o0 */
+
+ .align 16
+.Lmedium:
+.Lmedium_join:
+ neg %o0, %o5
+ andcc %o5, 7, %o5 /* bytes till DST 8 byte aligned */
+ brz,pt %o5, .Ldst_aligned_on_8
+
+ /* %o5 has the bytes to be written in partial store. */
+ sub %o2, %o5, %o2
+ sub %o1, %o0, %o1 /* %o1 gets the difference */
+7: /* dst aligning loop */
+ ldub [%o1+%o0], %o4 /* load one byte */
+ subcc %o5, 1, %o5
+ stb %o4, [%o0]
+ bgu,pt %XCC, 7b
+ add %o0, 1, %o0 /* advance dst */
+ add %o1, %o0, %o1 /* restore %o1 */
+.Ldst_aligned_on_8:
+ andcc %o1, 7, %o5
+ brnz,pt %o5, .Lsrc_dst_unaligned_on_8
+ nop
+
+.Lsrc_dst_aligned_on_8:
+ /* check if we are copying MED_MAX or more bytes */
+ cmp %o2, MED_MAX /* limit to store buffer size */
+ bgu,pn %XCC, .Llarge_align8_copy
+ nop
+/*
+ * Special case for handling when src and dest are both long word aligned
+ * and total data to move is less than MED_MAX bytes
+ */
+.Lmedlong:
+ subcc %o2, 63, %o2 /* adjust length to allow cc test */
+ ble,pn %XCC, .Lmedl63 /* skip big loop if < 64 bytes */
+ nop
+.Lmedl64:
+ ldx [%o1], %o4 /* load */
+ subcc %o2, 64, %o2 /* decrement length count */
+ stx %o4, [%o0] /* and store */
+ ldx [%o1+8], %o3 /* a block of 64 bytes */
+ stx %o3, [%o0+8]
+ ldx [%o1+16], %o4
+ stx %o4, [%o0+16]
+ ldx [%o1+24], %o3
+ stx %o3, [%o0+24]
+ ldx [%o1+32], %o4 /* load */
+ stx %o4, [%o0+32] /* and store */
+ ldx [%o1+40], %o3 /* a block of 64 bytes */
+ add %o1, 64, %o1 /* increase src ptr by 64 */
+ stx %o3, [%o0+40]
+ ldx [%o1-16], %o4
+ add %o0, 64, %o0 /* increase dst ptr by 64 */
+ stx %o4, [%o0-16]
+ ldx [%o1-8], %o3
+ bgu,pt %XCC, .Lmedl64 /* repeat if at least 64 bytes left */
+ stx %o3, [%o0-8]
+.Lmedl63:
+ addcc %o2, 32, %o2 /* adjust remaining count */
+ ble,pt %XCC, .Lmedl31 /* to skip if 31 or fewer bytes left */
+ nop
+ ldx [%o1], %o4 /* load */
+ sub %o2, 32, %o2 /* decrement length count */
+ stx %o4, [%o0] /* and store */
+ ldx [%o1+8], %o3 /* a block of 32 bytes */
+ add %o1, 32, %o1 /* increase src ptr by 32 */
+ stx %o3, [%o0+8]
+ ldx [%o1-16], %o4
+ add %o0, 32, %o0 /* increase dst ptr by 32 */
+ stx %o4, [%o0-16]
+ ldx [%o1-8], %o3
+ stx %o3, [%o0-8]
+.Lmedl31:
+ addcc %o2, 16, %o2 /* adjust remaining count */
+ ble,pt %XCC, .Lmedl15 /* skip if 15 or fewer bytes left */
+ nop
+ ldx [%o1], %o4 /* load and store 16 bytes */
+ add %o1, 16, %o1 /* increase src ptr by 16 */
+ stx %o4, [%o0]
+ sub %o2, 16, %o2 /* decrease count by 16 */
+ ldx [%o1-8], %o3
+ add %o0, 16, %o0 /* increase dst ptr by 16 */
+ stx %o3, [%o0-8]
+.Lmedl15:
+ addcc %o2, 15, %o2 /* restore count */
+ bz,pt %XCC, .Lsmallexit /* exit if finished */
+ cmp %o2, 8
+ blt,pt %XCC, .Lmedw7 /* skip if 7 or fewer bytes left */
+ tst %o2
+ ldx [%o1], %o4 /* load 8 bytes */
+ add %o1, 8, %o1 /* increase src ptr by 8 */
+ add %o0, 8, %o0 /* increase dst ptr by 8 */
+ subcc %o2, 8, %o2 /* decrease count by 8 */
+ bnz,pn %XCC, .Lmedw7
+ stx %o4, [%o0-8] /* and store 8 bytes */
+ retl
+ mov EX_RETVAL(%g1), %o0 /* restore %o0 */
+
+ .align 16
+.Lsrc_dst_unaligned_on_8:
+ /* DST is 8-byte aligned, src is not */
+ andcc %o1, 0x3, %o5 /* test word alignment */
+ bnz,pt %XCC, .Lunalignsetup /* branch if not word aligned */
+ nop
+
+/*
+ * Handle all cases where src and dest are aligned on word
+ * boundaries. Use unrolled loops for better performance.
+ * This option wins over standard large data move when
+ * source and destination is in cache for medium
+ * to short data moves.
+ */
+ cmp %o2, MED_WMAX /* limit to store buffer size */
+ bge,pt %XCC, .Lunalignrejoin /* otherwise rejoin main loop */
+ nop
+
+ subcc %o2, 31, %o2 /* adjust length to allow cc test */
+ /* for end of loop */
+ ble,pt %XCC, .Lmedw31 /* skip big loop if less than 16 */
+.Lmedw32:
+ ld [%o1], %o4 /* move a block of 32 bytes */
+ sllx %o4, 32, %o5
+ ld [%o1+4], %o4
+ or %o4, %o5, %o5
+ stx %o5, [%o0]
+ subcc %o2, 32, %o2 /* decrement length count */
+ ld [%o1+8], %o4
+ sllx %o4, 32, %o5
+ ld [%o1+12], %o4
+ or %o4, %o5, %o5
+ stx %o5, [%o0+8]
+ add %o1, 32, %o1 /* increase src ptr by 32 */
+ ld [%o1-16], %o4
+ sllx %o4, 32, %o5
+ ld [%o1-12], %o4
+ or %o4, %o5, %o5
+ stx %o5, [%o0+16]
+ add %o0, 32, %o0 /* increase dst ptr by 32 */
+ ld [%o1-8], %o4
+ sllx %o4, 32, %o5
+ ld [%o1-4], %o4
+ or %o4, %o5, %o5
+ bgu,pt %XCC, .Lmedw32 /* repeat if at least 32 bytes left */
+ stx %o5, [%o0-8]
+.Lmedw31:
+ addcc %o2, 31, %o2 /* restore count */
+ bz,pt %XCC, .Lsmallexit /* exit if finished */
+ cmp %o2, 16
+ blt,pt %XCC, .Lmedw15
+ nop
+ ld [%o1], %o4 /* move a block of 16 bytes */
+ sllx %o4, 32, %o5
+ subcc %o2, 16, %o2 /* decrement length count */
+ ld [%o1+4], %o4
+ or %o4, %o5, %o5
+ stx %o5, [%o0]
+ add %o1, 16, %o1 /* increase src ptr by 16 */
+ ld [%o1-8], %o4
+ add %o0, 16, %o0 /* increase dst ptr by 16 */
+ sllx %o4, 32, %o5
+ ld [%o1-4], %o4
+ or %o4, %o5, %o5
+ stx %o5, [%o0-8]
+.Lmedw15:
+ bz,pt %XCC, .Lsmallexit /* exit if finished */
+ cmp %o2, 8
+ blt,pn %XCC, .Lmedw7 /* skip if 7 or fewer bytes left */
+ tst %o2
+ ld [%o1], %o4 /* load 4 bytes */
+ subcc %o2, 8, %o2 /* decrease count by 8 */
+ stw %o4, [%o0] /* and store 4 bytes */
+ add %o1, 8, %o1 /* increase src ptr by 8 */
+ ld [%o1-4], %o3 /* load 4 bytes */
+ add %o0, 8, %o0 /* increase dst ptr by 8 */
+ stw %o3, [%o0-4] /* and store 4 bytes */
+ bz,pt %XCC, .Lsmallexit /* exit if finished */
+.Lmedw7: /* count is ge 1, less than 8 */
+ cmp %o2, 4 /* check for 4 bytes left */
+ blt,pn %XCC, .Lsmallleft3 /* skip if 3 or fewer bytes left */
+ nop
+ ld [%o1], %o4 /* load 4 bytes */
+ add %o1, 4, %o1 /* increase src ptr by 4 */
+ add %o0, 4, %o0 /* increase dst ptr by 4 */
+ subcc %o2, 4, %o2 /* decrease count by 4 */
+ bnz,pt %XCC, .Lsmallleft3
+ stw %o4, [%o0-4] /* and store 4 bytes */
+ retl
+ mov EX_RETVAL(%g1), %o0 /* restore %o0 */
+
+ .align 16
+.Llarge_align8_copy: /* Src and dst 8 byte aligned */
+ /* align dst to 64 byte boundary */
+ andcc %o0, 0x3f, %o3 /* check for dst 64 byte aligned */
+ brz,pn %o3, .Laligned_to_64
+ andcc %o0, 8, %o3 /* odd long words to move? */
+ brz,pt %o3, .Laligned_to_16
+ nop
+ ldx [%o1], %o4
+ sub %o2, 8, %o2
+ add %o1, 8, %o1 /* increment src ptr */
+ add %o0, 8, %o0 /* increment dst ptr */
+ stx %o4, [%o0-8]
+.Laligned_to_16:
+ andcc %o0, 16, %o3 /* pair of long words to move? */
+ brz,pt %o3, .Laligned_to_32
+ nop
+ ldx [%o1], %o4
+ sub %o2, 16, %o2
+ stx %o4, [%o0]
+ add %o1, 16, %o1 /* increment src ptr */
+ ldx [%o1-8], %o4
+ add %o0, 16, %o0 /* increment dst ptr */
+ stx %o4, [%o0-8]
+.Laligned_to_32:
+ andcc %o0, 32, %o3 /* four long words to move? */
+ brz,pt %o3, .Laligned_to_64
+ nop
+ ldx [%o1], %o4
+ sub %o2, 32, %o2
+ stx %o4, [%o0]
+ ldx [%o1+8], %o4
+ stx %o4, [%o0+8]
+ ldx [%o1+16], %o4
+ stx %o4, [%o0+16]
+ add %o1, 32, %o1 /* increment src ptr */
+ ldx [%o1-8], %o4
+ add %o0, 32, %o0 /* increment dst ptr */
+ stx %o4, [%o0-8]
+.Laligned_to_64:
+/* Following test is included to avoid issues where existing executables
+ * incorrectly call memcpy with overlapping src and dest instead of memmove
+ *
+ * if ( (src ge dst) and (dst+len > src)) go to overlap case
+ * if ( (src lt dst) and (src+len > dst)) go to overlap case
+ */
+ cmp %o1,%o0
+ bge,pt %XCC, 1f
+ nop
+/* src+len > dst? */
+ add %o1, %o2, %o4
+ cmp %o4, %o0
+ bgt,pt %XCC, .Lmv_aligned_on_64
+ nop
+ ba 2f
+ nop
+1:
+/* dst+len > src? */
+ add %o0, %o2, %o4
+ cmp %o4, %o1
+ bgt,pt %XCC, .Lmv_aligned_on_64
+ nop
+2:
+/* handle non-overlapped copies
+ *
+ * Using block init store (BIS) instructions to avoid fetching cache
+ * lines from memory. Use ST_CHUNK stores to first element of each cache
+ * line (similar to prefetching) to avoid overfilling STQ or miss buffers.
+ * Gives existing cache lines time to be moved out of L1/L2/L3 cache.
+ */
+ andn %o2, 0x3f, %o5 /* %o5 is multiple of block size */
+ and %o2, 0x3f, %o2 /* residue bytes in %o2 */
+
+/* We use ASI_STBIMRU_P for the first store to each cache line
+ * followed by ASI_STBI_P (mark as LRU) for the last store. That
+ * mixed approach reduces the chances the cache line is removed
+ * before we finish setting it, while minimizing the effects on
+ * other cached values during a large memcpy
+ *
+ * Intermediate stores can be normal since first BIS activates the
+ * cache line in the L2 cache.
+ *
+ * ST_CHUNK batches up initial BIS operations for several cache lines
+ * to allow multiple requests to not be blocked by overflowing the
+ * the store miss buffer. Then the matching stores for all those
+ * BIS operations are executed.
+ */
+
+.Lalign_loop:
+ cmp %o5, ST_CHUNK*64
+ blu,pt %XCC, .Lalign_short
+ mov ST_CHUNK, %o3
+ sllx %o3, 6, %g5 /* ST_CHUNK*64 */
+
+.Lalign_loop_start:
+ prefetch [%o1 + (ALIGN_PRE * BLOCK_SIZE)], 21
+ subcc %o3, 2, %o3
+ ldx [%o1], %o4
+ add %o1, 128, %o1
+ EX_ST(STORE_ASI(%o4, %o0))
+ add %o0, 64, %o0
+ ldx [%o1-64], %o4
+ EX_ST(STORE_ASI(%o4, %o0))
+ add %o0, 64, %o0
+ bgu,pt %XCC, .Lalign_loop_start
+ prefetch [%o1 + ((ALIGN_PRE-1) * BLOCK_SIZE)], 21
+
+ mov ST_CHUNK, %o3
+ sub %o1, %g5, %o1 /* reset %o1 */
+ sub %o0, %g5, %o0 /* reset %o0 */
+
+ sub %o0, 8, %o0 /* adjust %o0 for ASI alignment */
+.Lalign_loop_rest:
+ ldx [%o1+8],%o4
+ add %o0, 64, %o0
+ stx %o4, [%o0-48]
+ subcc %o3, 1, %o3
+ ldx [%o1+16],%o4
+ stx %o4, [%o0-40]
+ sub %o5, 64, %o5
+ ldx [%o1+24],%o4
+ stx %o4, [%o0-32]
+ ldx [%o1+32],%o4
+ stx %o4, [%o0-24]
+ ldx [%o1+40],%o4
+ stx %o4, [%o0-16]
+ ldx [%o1+48],%o4
+ stx %o4, [%o0-8]
+ add %o1, 64, %o1
+ ldx [%o1-8],%o4
+ bgu,pt %XCC, .Lalign_loop_rest
+ EX_ST(STORE_INIT(%o4,%o0)) /* mark cache line as LRU */
+
+ mov ST_CHUNK, %o3
+ cmp %o5, ST_CHUNK*64
+ bgu,pt %XCC, .Lalign_loop_start
+ add %o0, 8, %o0 /* restore %o0 from ASI alignment */
+
+ cmp %o5, 0
+ beq,pt %XCC, .Lalign_done
+
+/* no prefetches needed in these loops
+ * since we are within ALIGN_PRE of the end */
+.Lalign_short:
+ srl %o5, 6, %o3
+.Lalign_loop_short:
+ subcc %o3, 1, %o3
+ ldx [%o1], %o4
+ add %o1, 64, %o1
+ EX_ST(STORE_ASI(%o4, %o0))
+ bgu,pt %XCC, .Lalign_loop_short
+ add %o0, 64, %o0
+
+ sub %o1, %o5, %o1 /* reset %o1 */
+ sub %o0, %o5, %o0 /* reset %o0 */
+
+ sub %o0, 8, %o0 /* adjust %o0 for ASI alignment */
+.Lalign_short_rest:
+ ldx [%o1+8],%o4
+ add %o0, 64, %o0
+ stx %o4, [%o0-48]
+ ldx [%o1+16],%o4
+ subcc %o5, 64, %o5
+ stx %o4, [%o0-40]
+ ldx [%o1+24],%o4
+ stx %o4, [%o0-32]
+ ldx [%o1+32],%o4
+ stx %o4, [%o0-24]
+ ldx [%o1+40],%o4
+ stx %o4, [%o0-16]
+ ldx [%o1+48],%o4
+ stx %o4, [%o0-8]
+ add %o1, 64, %o1
+ ldx [%o1-8],%o4
+ bgu,pt %XCC, .Lalign_short_rest
+ EX_ST(STORE_INIT(%o4,%o0)) /* mark cache line as LRU */
+
+ add %o0, 8, %o0 /* restore %o0 from ASI alignment */
+
+.Lalign_done:
+ cmp %o2, 0
+ membar #StoreStore
+ bne,pt %XCC, .Lmedl63
+ subcc %o2, 63, %o2 /* adjust length to allow cc test */
+ retl
+ mov EX_RETVAL(%g1), %o0 /* restore %o0 */
+
+ .align 16
+ /* Dst is on 8 byte boundary; src is not; remaining cnt > SMALL_MAX */
+ /* Since block load/store and BIS are not in use for unaligned data,
+ * no need to align dst on 64 byte cache line boundary */
+.Lunalignsetup:
+.Lunalignrejoin:
+ rd %fprs, %g5 /* check for unused fp */
+ /* if fprs.fef == 0, set it.
+ * Setting it when already set costs more than checking */
+ andcc %g5, FPRS_FEF, %g5 /* test FEF, fprs.du = fprs.dl = 0 */
+ bz,a %XCC, 1f
+ wr %g0, FPRS_FEF, %fprs /* fprs.fef = 1 */
+1:
+ andn %o2, 0x3f, %o5 /* %o5 is multiple of block size */
+ and %o2, 0x3f, %o2 /* residue bytes in %o2 */
+ cmp %o2, 8 /* Insure we do not load beyond */
+ bgt,pt %XCC, .Lunalign_adjust /* end of source buffer */
+ andn %o1, 0x7, %o4 /* %o4 has 8 byte aligned src addr */
+ add %o2, 64, %o2 /* adjust to leave loop */
+ sub %o5, 64, %o5 /* early if necessary */
+.Lunalign_adjust:
+ alignaddr %o1, %g0, %g0 /* generate %gsr */
+ add %o1, %o5, %o1 /* advance %o1 to after blocks */
+ ldd [%o4], %f0
+.Lunalign_loop:
+ prefetch [%o0 + (9 * BLOCK_SIZE)], 20
+ ldd [%o4+8], %f2
+ faligndata %f0, %f2, %f16
+ ldd [%o4+16], %f4
+ subcc %o5, BLOCK_SIZE, %o5
+ std %f16, [%o0]
+ faligndata %f2, %f4, %f18
+ ldd [%o4+24], %f6
+ std %f18, [%o0+8]
+ faligndata %f4, %f6, %f20
+ ldd [%o4+32], %f8
+ std %f20, [%o0+16]
+ faligndata %f6, %f8, %f22
+ ldd [%o4+40], %f10
+ std %f22, [%o0+24]
+ faligndata %f8, %f10, %f24
+ ldd [%o4+48], %f12
+ std %f24, [%o0+32]
+ faligndata %f10, %f12, %f26
+ ldd [%o4+56], %f14
+ add %o4, BLOCK_SIZE, %o4
+ std %f26, [%o0+40]
+ faligndata %f12, %f14, %f28
+ ldd [%o4], %f0
+ std %f28, [%o0+48]
+ faligndata %f14, %f0, %f30
+ std %f30, [%o0+56]
+ add %o0, BLOCK_SIZE, %o0
+ bgu,pt %XCC, .Lunalign_loop
+ prefetch [%o4 + (11 * BLOCK_SIZE)], 20
+
+ /* Handle trailing bytes, 64 to 127
+ * Dest long word aligned, Src not long word aligned */
+ cmp %o2, 15
+ bleu,pt %XCC, .Lunalign_short
+
+ andn %o2, 0x7, %o5 /* %o5 is multiple of 8 */
+ and %o2, 0x7, %o2 /* residue bytes in %o2 */
+ add %o2, 8, %o2
+ sub %o5, 8, %o5 /* do not load past end of src */
+ andn %o1, 0x7, %o4 /* %o4 has 8 byte aligned src addr */
+ add %o1, %o5, %o1 /* move %o1 to after multiple of 8 */
+ ldd [%o4], %f0 /* fetch partial word */
+.Lunalign_by8:
+ ldd [%o4+8], %f2
+ add %o4, 8, %o4
+ faligndata %f0, %f2, %f16
+ subcc %o5, 8, %o5
+ std %f16, [%o0]
+ fsrc2 %f2, %f0
+ bgu,pt %XCC, .Lunalign_by8
+ add %o0, 8, %o0
+
+.Lunalign_short: /* restore fprs state */
+ brnz,pt %g5, .Lsmallrest
+ nop
+ ba .Lsmallrest
+ wr %g5, %g0, %fprs
+END(__memcpy_niagara7)
+
+#endif
diff --git a/sysdeps/sparc/sparc64/multiarch/memmove-ultra1.S b/sysdeps/sparc/sparc64/multiarch/memmove-ultra1.S
new file mode 100644
index 0000000..2ed85d9
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/memmove-ultra1.S
@@ -0,0 +1,4 @@
+#define memmove __memmove_ultra1
+#undef libc_hidden_builtin_def
+#define libc_hidden_builtin_def(name)
+#include <sysdeps/sparc/sparc64/memmove.S>
diff --git a/sysdeps/sparc/sparc64/multiarch/rtld-memmove.c b/sysdeps/sparc/sparc64/multiarch/rtld-memmove.c
new file mode 100644
index 0000000..e6d9a5c
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/rtld-memmove.c
@@ -0,0 +1 @@
+#include <sysdeps/sparc/sparc64/rtld-memmove.c>
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=b99ce4d7c6a92e067c4371deaca5cf9cd9945688
commit b99ce4d7c6a92e067c4371deaca5cf9cd9945688
Author: Jose E. Marchesi <jose.marchesi@oracle.com>
Date: Fri Oct 20 19:28:21 2017 -0200
sparc: assembly version of memmove for ultra1+
Tested in sparcv9-*-* and sparc64-*-* targets in both non-multi-arch and
multi-arch configurations.
* sysdeps/sparc/sparc32/sparcv9/memmove.S: New file.
* sysdeps/sparc/sparc32/sparcv9/rtld-memmove.c: Likewise.
* sysdeps/sparc/sparc64/memmove.S: Likewise.
* sysdeps/sparc/sparc64/rtld-memmove.c: Likewise.
diff --git a/ChangeLog b/ChangeLog
index 75ccc39..cae2e34 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,10 @@
2017-10-23 Jose E. Marchesi <jose.marchesi@oracle.com>
+ * sysdeps/sparc/sparc32/sparcv9/memmove.S: New file.
+ * sysdeps/sparc/sparc32/sparcv9/rtld-memmove.c: Likewise.
+ * sysdeps/sparc/sparc64/memmove.S: Likewise.
+ * sysdeps/sparc/sparc64/rtld-memmove.c: Likewise.
+
* sysdeps/sparc/bits/hwcap.h (HWCAP_SPARC_ADP): Defined.
* sysdeps/sparc/dl-procinfo.c: Added "adp" to the
_dl_sparc_cap_flags array.
diff --git a/sysdeps/sparc/sparc32/sparcv9/memmove.S b/sysdeps/sparc/sparc32/sparcv9/memmove.S
new file mode 100644
index 0000000..39adeb2
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/memmove.S
@@ -0,0 +1,2 @@
+#define XCC icc
+#include <sparc64/memmove.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/rtld-memmove.c b/sysdeps/sparc/sparc32/sparcv9/rtld-memmove.c
new file mode 100644
index 0000000..a2fe190
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/rtld-memmove.c
@@ -0,0 +1 @@
+#include <sparc64/rtld-memmove.c>
diff --git a/sysdeps/sparc/sparc64/memmove.S b/sysdeps/sparc/sparc64/memmove.S
new file mode 100644
index 0000000..eb71ef3
--- /dev/null
+++ b/sysdeps/sparc/sparc64/memmove.S
@@ -0,0 +1,186 @@
+/* Copy memory to memory until the specified number of bytes
+ has been copied. Overlap is handled correctly.
+ For SPARC V9.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+
+#ifndef XCC
+# define XCC xcc
+ .register %g2, #scratch
+#endif
+
+ENTRY(memmove)
+ mov %o0, %g2 /* Save pointer to destination */
+ cmp %o1, %o0 /* if from address is >= to use forward copy */
+ bgeu,a %XCC, 2f /* else use backward if ... */
+ cmp %o2, 17 /* delay slot, for small counts copy bytes */
+
+ sub %o0, %o1, %o4 /* get difference of two addresses */
+ cmp %o2, %o4 /* compare size and difference of addresses */
+ bgu %XCC, .Lovbc /* if size is bigger, have to do overlapped copy */
+ cmp %o2, 17 /* delay slot, for small counts copy bytes */
+/*
+ * normal, copy forwards
+ */
+2: ble %XCC, .Ldbytecp
+ andcc %o1, 3, %o5 /* is src word aligned */
+ bz,pn %icc, .Laldst
+ cmp %o5, 2 /* is src half-word aligned */
+ be,pn %icc, .Ls2alg
+ cmp %o5, 3 /* src is byte aligned */
+ ldub [%o1], %o3 /* move 1 or 3 bytes to align it */
+ inc 1, %o1
+ stb %o3, [%o0] /* move a byte to align src */
+ inc 1, %o0
+ bne,pn %icc, .Ls2alg
+ dec %o2
+ b .Lald /* now go align dest */
+ andcc %o0, 3, %o5
+
+.Ls2alg:
+ lduh [%o1], %o3 /* know src is 2 byte aligned */
+ inc 2, %o1
+ srl %o3, 8, %o4
+ stb %o4, [%o0] /* have to do bytes, */
+ stb %o3, [%o0 + 1] /* don't know dst alingment */
+ inc 2, %o0
+ dec 2, %o2
+
+.Laldst:
+ andcc %o0, 3, %o5 /* align the destination address */
+.Lald: bz,pn %icc, .Lw4cp
+ cmp %o5, 2
+ bz,pn %icc, .Lw2cp
+ cmp %o5, 3
+.Lw3cp:
+ lduw [%o1], %o4
+ inc 4, %o1
+ srl %o4, 24, %o5
+ stb %o5, [%o0]
+ bne,pt %icc, .Lw1cp
+ inc %o0
+ dec 1, %o2
+ andn %o2, 3, %o3 /* i3 is aligned word count */
+ dec 4, %o3 /* avoid reading beyond tail of src */
+ sub %o1, %o0, %o1 /* i1 gets the difference */
+
+1: sll %o4, 8, %g1 /* save residual bytes */
+ lduw [%o1+%o0], %o4
+ deccc 4, %o3
+ srl %o4, 24, %o5 /* merge with residual */
+ or %o5, %g1, %g1
+ st %g1, [%o0]
+ bnz,pt %XCC, 1b
+ inc 4, %o0
+ sub %o1, 3, %o1 /* used one byte of last word read */
+ and %o2, 3, %o2
+ b 7f
+ inc 4, %o2
+
+.Lw1cp:
+ srl %o4, 8, %o5
+ sth %o5, [%o0]
+ inc 2, %o0
+ dec 3, %o2
+ andn %o2, 3, %o3
+ dec 4, %o3 /* avoid reading beyond tail of src */
+ sub %o1, %o0, %o1 /* i1 gets the difference */
+
+2: sll %o4, 24, %g1 /* save residual bytes */
+ lduw [%o1+%o0], %o4
+ deccc 4, %o3
+ srl %o4, 8, %o5 /* merge with residual */
+ or %o5, %g1, %g1
+ st %g1, [%o0]
+ bnz,pt %XCC, 2b
+ inc 4, %o0
+ sub %o1, 1, %o1 /* used three bytes of last word read */
+ and %o2, 3, %o2
+ b 7f
+ inc 4, %o2
+
+.Lw2cp:
+ lduw [%o1], %o4
+ inc 4, %o1
+ srl %o4, 16, %o5
+ sth %o5, [%o0]
+ inc 2, %o0
+ dec 2, %o2
+ andn %o2, 3, %o3 /* i3 is aligned word count */
+ dec 4, %o3 /* avoid reading beyond tail of src */
+ sub %o1, %o0, %o1 /* i1 gets the difference */
+
+3: sll %o4, 16, %g1 /* save residual bytes */
+ lduw [%o1+%o0], %o4
+ deccc 4, %o3
+ srl %o4, 16, %o5 /* merge with residual */
+ or %o5, %g1, %g1
+ st %g1, [%o0]
+ bnz,pt %XCC, 3b
+ inc 4, %o0
+ sub %o1, 2, %o1 /* used two bytes of last word read */
+ and %o2, 3, %o2
+ b 7f
+ inc 4, %o2
+
+.Lw4cp:
+ andn %o2, 3, %o3 /* i3 is aligned word count */
+ sub %o1, %o0, %o1 /* i1 gets the difference */
+
+1: lduw [%o1+%o0], %o4 /* read from address */
+ deccc 4, %o3 /* decrement count */
+ st %o4, [%o0] /* write at destination address */
+ bg,pt %XCC, 1b
+ inc 4, %o0 /* increment to address */
+ b 7f
+ and %o2, 3, %o2 /* number of leftover bytes, if any */
+
+/*
+ * differenced byte copy, works with any alignment
+ */
+.Ldbytecp:
+ b 7f
+ sub %o1, %o0, %o1 /* i1 gets the difference */
+
+4: stb %o4, [%o0] /* write to address */
+ inc %o0 /* inc to address */
+7: deccc %o2 /* decrement count */
+ bge,a %XCC, 4b /* loop till done */
+ ldub [%o1+%o0], %o4 /* read from address */
+ retl
+ mov %g2, %o0 /* return pointer to destination */
+
+/*
+ * an overlapped copy that must be done "backwards"
+ */
+.Lovbc:
+ add %o1, %o2, %o1 /* get to end of source space */
+ add %o0, %o2, %o0 /* get to end of destination space */
+ sub %o1, %o0, %o1 /* i1 gets the difference */
+
+5: dec %o0 /* decrement to address */
+ ldub [%o1+%o0], %o3 /* read a byte */
+ deccc %o2 /* decrement count */
+ bg,pt %XCC, 5b /* loop until done */
+ stb %o3, [%o0] /* write byte */
+ retl
+ mov %g2, %o0 /* return pointer to destination */
+END(memmove)
+
+libc_hidden_builtin_def (memmove)
diff --git a/sysdeps/sparc/sparc64/rtld-memmove.c b/sysdeps/sparc/sparc64/rtld-memmove.c
new file mode 100644
index 0000000..1e73c6b
--- /dev/null
+++ b/sysdeps/sparc/sparc64/rtld-memmove.c
@@ -0,0 +1,2 @@
+#include <string/wordcopy.c>
+#include <string/memmove.c>
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=13b3adf64c3e37f1a7b056e66d8bef1c7e1b71ff
commit 13b3adf64c3e37f1a7b056e66d8bef1c7e1b71ff
Author: Jose E. Marchesi <jose.marchesi@oracle.com>
Date: Fri Oct 20 19:08:33 2017 -0200
sparc: support the ADP hw capability.
This patch adds support for the ADP (also known as adi) hardware
capability, as reported by the kernel sparc port when running on M7
machines.
Tested in both sparcv9-*-* and sparc64-*-* targets.
* sysdeps/sparc/bits/hwcap.h (HWCAP_SPARC_ADP): Defined.
* sysdeps/sparc/dl-procinfo.c: Added "adp" to the
_dl_sparc_cap_flags array.
* sysdeps/sparc/dl-procinfo.h (_DL_HWCAP_COUNT): Increment.
diff --git a/ChangeLog b/ChangeLog
index 6ac62d6..75ccc39 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,10 @@
+2017-10-23 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * sysdeps/sparc/bits/hwcap.h (HWCAP_SPARC_ADP): Defined.
+ * sysdeps/sparc/dl-procinfo.c: Added "adp" to the
+ _dl_sparc_cap_flags array.
+ * sysdeps/sparc/dl-procinfo.h (_DL_HWCAP_COUNT): Increment.
+
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/unix/sysv/linux/x86_64/x32/getcpu.c: Remove file.
diff --git a/sysdeps/sparc/bits/hwcap.h b/sysdeps/sparc/bits/hwcap.h
index e090723..a9b05a8 100644
--- a/sysdeps/sparc/bits/hwcap.h
+++ b/sysdeps/sparc/bits/hwcap.h
@@ -48,3 +48,4 @@
#define HWCAP_SPARC_PAUSE 0x01000000
#define HWCAP_SPARC_CBCOND 0x02000000
#define HWCAP_SPARC_CRYPTO 0x04000000
+#define HWCAP_SPARC_ADP 0x08000000
diff --git a/sysdeps/sparc/dl-procinfo.c b/sysdeps/sparc/dl-procinfo.c
index 653bdfb..3db59dc 100644
--- a/sysdeps/sparc/dl-procinfo.c
+++ b/sysdeps/sparc/dl-procinfo.c
@@ -46,13 +46,13 @@
#if !defined PROCINFO_DECL && defined SHARED
._dl_sparc_cap_flags
#else
-PROCINFO_CLASS const char _dl_sparc_cap_flags[27][11]
+PROCINFO_CLASS const char _dl_sparc_cap_flags[28][11]
#endif
#ifndef PROCINFO_DECL
= { "flush", "stbar", "swap", "muldiv", "v9", "ultra3", "v9v", "v9v2",
"mul32", "div32", "fsmuld", "v8plus", "popc", "vis", "vis2",
"ASIBlkInit", "fmaf", "vis3", "hpc", "random", "trans", "fjfmau",
- "ima", "cspare", "pause", "cbcond", "crypto" }
+ "ima", "cspare", "pause", "cbcond", "crypto", "adp" }
#endif
#if !defined SHARED || defined PROCINFO_DECL
;
diff --git a/sysdeps/sparc/dl-procinfo.h b/sysdeps/sparc/dl-procinfo.h
index 456dde6..19bab8c 100644
--- a/sysdeps/sparc/dl-procinfo.h
+++ b/sysdeps/sparc/dl-procinfo.h
@@ -23,7 +23,7 @@
#include <ldsodefs.h>
#include <sysdep.h>
-#define _DL_HWCAP_COUNT 27
+#define _DL_HWCAP_COUNT 28
static inline int
__attribute__ ((unused))
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=32f778c07ad5b09d2b8ae24b37d816a57610a9a6
commit 32f778c07ad5b09d2b8ae24b37d816a57610a9a6
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Sat Oct 14 07:55:54 2017 -0300
x32: Remove unused getcpu implementation
Checked on x86_64-linux-gnu-x32.
* sysdeps/unix/sysv/linux/x86_64/x32/getcpu.c: Remove file.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index bdd3880..6ac62d6 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,7 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+ * sysdeps/unix/sysv/linux/x86_64/x32/getcpu.c: Remove file.
+
* sysdeps/sparc/sparc-ifunc.h (SPARC_ASM_IFUNC_DFLT,
SPARC_ASM_IFUNC1, SPARC_ASM_IFUNC2, SET, SPARC_ASM_VIS2_IFUNC,
SPARC_ASM_VIS3_IFUNC, SPARC_ASM_VIS3_VIS2_IFUNC): Remove macros.
diff --git a/sysdeps/unix/sysv/linux/x86_64/x32/getcpu.c b/sysdeps/unix/sysv/linux/x86_64/x32/getcpu.c
deleted file mode 100644
index cd26d2e..0000000
--- a/sysdeps/unix/sysv/linux/x86_64/x32/getcpu.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/* Copyright (C) 2012-2017 Free Software Foundation, Inc.
- This file is part of the GNU C Library.
-
- The GNU C Library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Lesser General Public
- License as published by the Free Software Foundation; either
- version 2.1 of the License, or (at your option) any later version.
-
- The GNU C Library is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Lesser General Public License for more details.
-
- You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library; if not, see
- <http://www.gnu.org/licenses/>. */
-
-#ifdef SHARED
-# include <dl-vdso.h>
-
-void *getcpu_ifunc (void) __asm__ ("__getcpu");
-
-void *
-inhibit_stack_protector
-getcpu_ifunc (void)
-{
- PREPARE_VERSION (linux26, "LINUX_2.6", 61765110);
-
- return _dl_vdso_vsym ("__vdso_getcpu", &linux26);
-}
-__asm (".type __getcpu, %gnu_indirect_function");
-#endif
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=ea2b5f1ed6d79befe19d64a4b050c8f5e5ca4cf7
commit ea2b5f1ed6d79befe19d64a4b050c8f5e5ca4cf7
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 13:47:36 2017 -0300
sparc: Remove ununsed ifunc assembly macros
* sysdeps/sparc/sparc-ifunc.h (SPARC_ASM_IFUNC_DFLT,
SPARC_ASM_IFUNC1, SPARC_ASM_IFUNC2, SET, SPARC_ASM_VIS2_IFUNC,
SPARC_ASM_VIS3_IFUNC, SPARC_ASM_VIS3_VIS2_IFUNC): Remove macros.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index e043117..bdd3880 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,9 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+ * sysdeps/sparc/sparc-ifunc.h (SPARC_ASM_IFUNC_DFLT,
+ SPARC_ASM_IFUNC1, SPARC_ASM_IFUNC2, SET, SPARC_ASM_VIS2_IFUNC,
+ SPARC_ASM_VIS3_IFUNC, SPARC_ASM_VIS3_VIS2_IFUNC): Remove macros.
+
* sysdeps/sparc/sparc64/cpu_relax.c: New file.
* sysdeps/sparc/sparc32/sparcv9/cpu_relax.c: Likewise.
* sysdeps/sparc/sparc64/cpu_relax.S: Remove file.
diff --git a/sysdeps/sparc/sparc-ifunc.h b/sysdeps/sparc/sparc-ifunc.h
index 4a68cf1..69951e7 100644
--- a/sysdeps/sparc/sparc-ifunc.h
+++ b/sysdeps/sparc/sparc-ifunc.h
@@ -17,157 +17,25 @@
#include <sysdep.h>
-#ifdef __ASSEMBLER__
+#define INIT_ARCH()
-# ifdef SHARED
-
-# define SPARC_ASM_IFUNC_DFLT(name, dflt) \
-ENTRY (__##name) \
- .type __##name, @gnu_indirect_function; \
- SETUP_PIC_REG_LEAF(o3, o5); \
- sethi %gdop_hix22(dflt), %o1; \
- xor %o1, %gdop_lox10(dflt), %o1; \
- add %o3, %o1, %o1; \
- retl; \
- mov %o1, %o0; \
-END (__##name)
-
-# define SPARC_ASM_IFUNC1(name, m1, f1, dflt) \
-ENTRY (__##name) \
- .type __##name, @gnu_indirect_function; \
- SETUP_PIC_REG_LEAF(o3, o5); \
- set m1, %o1; \
- andcc %o0, %o1, %g0; \
- be 9f; \
- nop; \
- sethi %gdop_hix22(f1), %o1; \
- xor %o1, %gdop_lox10(f1), %o1; \
- ba 10f; \
- nop; \
-9: sethi %gdop_hix22(dflt), %o1; \
- xor %o1, %gdop_lox10(dflt), %o1; \
-10: add %o3, %o1, %o1; \
- retl; \
- mov %o1, %o0; \
-END (__##name)
-
-# define SPARC_ASM_IFUNC2(name, m1, f1, m2, f2, dflt) \
-ENTRY (__##name) \
- .type __##name, @gnu_indirect_function; \
- SETUP_PIC_REG_LEAF(o3, o5); \
- set m1, %o1; \
- andcc %o0, %o1, %g0; \
- be 8f; \
- nop; \
- sethi %gdop_hix22(f1), %o1; \
- xor %o1, %gdop_lox10(f1), %o1; \
- ba 10f; \
- nop; \
-8: set m2, %o1; \
- andcc %o0, %o1, %g0; \
- be 9f; \
- nop; \
- sethi %gdop_hix22(f2), %o1; \
- xor %o1, %gdop_lox10(f2), %o1; \
- ba 10f; \
- nop; \
-9: sethi %gdop_hix22(dflt), %o1; \
- xor %o1, %gdop_lox10(dflt), %o1; \
-10: add %o3, %o1, %o1; \
- retl; \
- mov %o1, %o0; \
-END (__##name)
-
-# else /* SHARED */
-
-# ifdef __arch64__
-# define SET(SYM, TMP, REG) setx SYM, TMP, REG
-# else
-# define SET(SYM, TMP, REG) set SYM, REG
-# endif
-
-# define SPARC_ASM_IFUNC_DFLT(name, dflt) \
-ENTRY (__##name) \
- .type __##name, @gnu_indirect_function; \
- SET(dflt, %g1, %o1); \
- retl; \
- mov %o1, %o0; \
-END (__##name)
-
-# define SPARC_ASM_IFUNC1(name, m1, f1, dflt) \
-ENTRY (__##name) \
- .type __##name, @gnu_indirect_function; \
- set m1, %o1; \
- andcc %o0, %o1, %g0; \
- be 9f; \
- nop; \
- SET(f1, %g1, %o1); \
- ba 10f; \
- nop; \
-9: SET(dflt, %g1, %o1); \
-10: retl; \
- mov %o1, %o0; \
-END (__##name)
-
-# define SPARC_ASM_IFUNC2(name, m1, f1, m2, f2, dflt) \
-ENTRY (__##name) \
- .type __##name, @gnu_indirect_function; \
- set m1, %o1; \
- andcc %o0, %o1, %g0; \
- be 8f; \
- nop; \
- SET(f1, %g1, %o1); \
- ba 10f; \
- nop; \
-8: set m2, %o1; \
- andcc %o0, %o1, %g0; \
- be 9f; \
- nop; \
- SET(f2, %g1, %o1); \
- ba 10f; \
- nop; \
-9: SET(dflt, %g1, %o1); \
-10: retl; \
- mov %o1, %o0; \
-END (__##name)
-
-# endif /* SHARED */
-
-#define SPARC_ASM_VIS2_IFUNC(name) \
- SPARC_ASM_IFUNC1(name, HWCAP_SPARC_VIS2, \
- __##name##_vis2, __##name##_generic)
-
-#define SPARC_ASM_VIS3_IFUNC(name) \
- SPARC_ASM_IFUNC1(name, HWCAP_SPARC_VIS3, \
- __##name##_vis3, __##name##_generic)
-
-#define SPARC_ASM_VIS3_VIS2_IFUNC(name) \
- SPARC_ASM_IFUNC2(name, HWCAP_SPARC_VIS3, \
- __##name##_vis3, \
- HWCAP_SPARC_VIS2, \
- __##name##_vis2, __##name##_generic)
-
-#else /* __ASSEMBLER__ */
-# define INIT_ARCH()
-
-# define sparc_libc_ifunc_redirected(redirected_name, name, expr) \
+#define sparc_libc_ifunc_redirected(redirected_name, name, expr) \
__ifunc (redirected_name, name, expr(hwcap), int hwcap, INIT_ARCH)
-# define sparc_libm_ifunc(name, expr) \
- __ifunc (name, name, expr, int hwcap, libm_ifunc_init)
+#define sparc_libc_ifunc(name, expr) sparc_libm_ifunc (name, expr)
-# define sparc_libc_ifunc(name, expr) sparc_libm_ifunc (name, expr)
+#define sparc_libm_ifunc(name, expr) \
+ __ifunc (name, name, expr, int hwcap, libm_ifunc_init)
-# define sparc_libm_ifunc_redirected(redirected_name, name, expr) \
+#define sparc_libm_ifunc_redirected(redirected_name, name, expr) \
__ifunc (redirected_name, name, expr, int hwcap, libm_ifunc_init)
/* It essentially does libc_hidden_builtin_def (name) and redirect
the internal redirected symbol to ifunc implementation. */
-# if defined SHARED
-# define sparc_ifunc_redirected_hidden_def(redirect_name, name) \
+#if defined SHARED
+# define sparc_ifunc_redirected_hidden_def(redirect_name, name) \
__hidden_ver1 (name, __GI_##name, redirect_name) \
__attribute__ ((visibility ("hidden")));
-# else
-# define sparc_ifunc_redirected_hidden_def(redirect_name, name)
-# endif
-#endif /* __ASSEMBLER__ */
+#else
+# define sparc_ifunc_redirected_hidden_def(redirect_name, name)
+#endif
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=c9d1c3f898a93c1bae9974836edcf332fc8218d8
commit c9d1c3f898a93c1bae9974836edcf332fc8218d8
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Sat Oct 14 09:47:08 2017 -0300
sparc: refactor cpu_relax to C
* sysdeps/sparc/sparc64/cpu_relax.c: New file.
* sysdeps/sparc/sparc32/sparcv9/cpu_relax.c: Likewise.
* sysdeps/sparc/sparc64/cpu_relax.S: Remove file.
* sysdeps/sparc/sparc32/sparcv9/cpu_relax.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index f474eb1..e043117 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,10 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+ * sysdeps/sparc/sparc64/cpu_relax.c: New file.
+ * sysdeps/sparc/sparc32/sparcv9/cpu_relax.c: Likewise.
+ * sysdeps/sparc/sparc64/cpu_relax.S: Remove file.
+ * sysdeps/sparc/sparc32/sparcv9/cpu_relax.S: Likewise.
+
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_nearbyintf-generic and
s_nearbyint-generic.
diff --git a/sysdeps/sparc/sparc32/sparcv9/cpu_relax.S b/sysdeps/sparc/sparc32/sparcv9/cpu_relax.S
deleted file mode 100644
index 41a5e72..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/cpu_relax.S
+++ /dev/null
@@ -1 +0,0 @@
-#include <sysdeps/sparc/sparc64/cpu_relax.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/cpu_relax.c b/sysdeps/sparc/sparc32/sparcv9/cpu_relax.c
new file mode 100644
index 0000000..1670cf6
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/cpu_relax.c
@@ -0,0 +1 @@
+#include <sysdeps/sparc/sparc64/cpu_relax.c>
diff --git a/sysdeps/sparc/sparc64/cpu_relax.S b/sysdeps/sparc/sparc64/cpu_relax.S
deleted file mode 100644
index 5271164..0000000
--- a/sysdeps/sparc/sparc64/cpu_relax.S
+++ /dev/null
@@ -1,67 +0,0 @@
-/* CPU strand yielding for busy loops.
- Copyright (C) 2012-2017 Free Software Foundation, Inc.
- Contributed by David S. Miller (davem@davemloft.net)
- This file is part of the GNU C Library.
-
- The GNU C Library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Lesser General Public
- License as published by the Free Software Foundation; either
- version 2.1 of the License, or (at your option) any later version.
-
- The GNU C Library is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Lesser General Public License for more details.
-
- You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library; if not, see
- <http://www.gnu.org/licenses/>. */
-
-#include <sysdep.h>
-
- .text
-__cpu_relax_generic:
- rd %ccr, %g0
- rd %ccr, %g0
- rd %ccr, %g0
- retl
- nop
- .size __cpu_relax_generic,.-__cpu_relax_generic
-
-__cpu_relax_pause:
- wr %g0, 128, %asr27
- retl
- nop
- .size __cpu_relax_pause,.-__cpu_relax_pause
-
-ENTRY(__cpu_relax)
- .type __cpu_relax, @gnu_indirect_function
-# ifdef SHARED
- SETUP_PIC_REG_LEAF(o3, o5)
-# endif
- set HWCAP_SPARC_PAUSE, %o1
- andcc %o0, %o1, %g0
- be 1f
- nop
-# ifdef SHARED
- sethi %gdop_hix22(__cpu_relax_pause), %o1
- xor %o1, %gdop_lox10(__cpu_relax_pause), %o1
-# else
- set __cpu_relax_pause, %o1
-# endif
- ba 10f
- nop
-1:
-# ifdef SHARED
- sethi %gdop_hix22(__cpu_relax_generic), %o1
- xor %o1, %gdop_lox10(__cpu_relax_generic), %o1
-# else
- set __cpu_relax_generic, %o1
-# endif
-10:
-# ifdef SHARED
- add %o3, %o1, %o1
-# endif
- retl
- mov %o1, %o0
-END(__cpu_relax)
diff --git a/sysdeps/sparc/sparc64/cpu_relax.c b/sysdeps/sparc/sparc64/cpu_relax.c
new file mode 100644
index 0000000..388e76c
--- /dev/null
+++ b/sysdeps/sparc/sparc64/cpu_relax.c
@@ -0,0 +1,38 @@
+/* CPU strand yielding for busy loops. Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sparc-ifunc.h>
+
+static void
+__cpu_relax_generic (void)
+{
+ asm volatile ("rd %ccr, %g0;"
+ "rd %ccr, %g0;"
+ "rd %ccr, %g0");
+}
+
+static void
+__cpu_relax_pause (void)
+{
+ asm volatile ("wr %g0, 128, %asr27;");
+}
+
+sparc_libc_ifunc (__cpu_relax,
+ hwcap & HWCAP_SPARC_PAUSE
+ ? __cpu_relax_pause
+ : __cpu_relax_generic)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=dc61d6fa1dca8fbcebb4eaa006095d88b0ee8b5d
commit dc61d6fa1dca8fbcebb4eaa006095d88b0ee8b5d
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 16:11:33 2017 -0300
sparc: refactor sparc32 nearbyint{f} selector to C
This patch refactors the sparc32 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
s_nearbyint{f}-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_nearbyintf-generic and
s_nearbyint-generic.
* sysdeps/sparc/sparcv9/fpu/multiarch/s_nearbyint-generic.S: New
file.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyint.c: Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-generic.S:
Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.c: Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S: Remove file.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 5d62def..f474eb1 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,18 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+ (libm-sysdep_routines): Add s_nearbyintf-generic and
+ s_nearbyint-generic.
+ * sysdeps/sparc/sparcv9/fpu/multiarch/s_nearbyint-generic.S: New
+ file.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyint.c: Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-generic.S:
+ Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.c: Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S: Remove file.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S: Likewise.
+
+ * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_rintf-generic and s_rint-generic.
* sysdeps/sparc/sparcv9/fpu/multiarch/s_rint-generic.S: New
file.
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
index 459c0e5..1a26ee1 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
@@ -11,9 +11,9 @@ libm-sysdep_routines += s_fabs-vis3 s_fabsf-vis3 s_fabs-generic \
s_fabsf-generic s_llrintf-vis3 s_llrint-vis3 \
s_llrintf-generic s_llrint-generic \
s_rintf-vis3 s_rint-vis3 s_rintf-generic \
- s_rint-generic \
- s_fmaf-vis3 s_fma-vis3 s_fma-generic s_fmaf-generic \
- s_nearbyint-vis3 s_nearbyintf-vis3 \
+ s_rint-generic s_fmaf-vis3 s_fma-vis3 s_fma-generic \
+ s_fmaf-generic s_nearbyint-vis3 s_nearbyintf-vis3 \
+ s_nearbyint-generic s_nearbyintf-generic \
s_fdimf-vis3 s_fdim-vis3 s_fdim-generic \
s_fdimf-generic \
$(sysdep_calls:s_%=m_%)
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-generic.S
new file mode 100644
index 0000000..fd4112e
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-generic.S
@@ -0,0 +1,9 @@
+#include <math_ldbl_opt.h>
+
+#define __nearbyint __nearbyint_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#undef compat_symbol
+#define compat_symbol(a, b, c, d)
+
+#include <sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S
deleted file mode 100644
index 47da9ea..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S
+++ /dev/null
@@ -1,19 +0,0 @@
-#include <sparc-ifunc.h>
-#include <math_ldbl_opt.h>
-
-SPARC_ASM_VIS3_IFUNC(nearbyint)
-
-weak_alias (__nearbyint, nearbyint)
-
-#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1)
-compat_symbol (libm, __nearbyint, nearbyintl, GLIBC_2_1)
-#endif
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef compat_symbol
-# define compat_symbol(a, b, c, d)
-
-#define __nearbyint __nearbyint_generic
-
-#include "../s_nearbyint.S"
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.c
new file mode 100644
index 0000000..5a2b6e4
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.c
@@ -0,0 +1,35 @@
+/* nearbyint ifunc resolver, Linux/sparc32 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __nearbyint __redirect_nearbyint
+#include <math.h>
+#undef __nearbyint
+#include <math_ldbl_opt.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (__redirect_nearbyint) __nearbyint_vis3 attribute_hidden;
+extern __typeof (__redirect_nearbyint) __nearbyint_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect_nearbyint, __nearbyint,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __nearbyint_vis3
+ : __nearbyint_generic);
+weak_alias (__nearbyint, nearbyint)
+#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_1)
+compat_symbol (libm, __nearbyint, nearbyintl, GLIBC_2_1);
+#endif
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-generic.S
new file mode 100644
index 0000000..8f9088e
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-generic.S
@@ -0,0 +1,4 @@
+#define __nearbyintf __nearbyintf_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#include <sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S
deleted file mode 100644
index 95100c1..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S
+++ /dev/null
@@ -1,12 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(nearbyintf)
-
-weak_alias (__nearbyintf, nearbyintf)
-
-# undef weak_alias
-# define weak_alias(a, b)
-
-#define __nearbyintf __nearbyintf_generic
-
-#include "../s_nearbyintf.S"
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.c
new file mode 100644
index 0000000..a513fa7
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.c
@@ -0,0 +1,29 @@
+/* nearbyintf ifunc resolver, Linux/sparc32 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <math.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (nearbyintf) __nearbyintf_vis3 attribute_hidden;
+extern __typeof (nearbyintf) __nearbyintf_generic attribute_hidden;
+
+sparc_libm_ifunc (__nearbyintf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __nearbyintf_vis3
+ : __nearbyintf_generic);
+weak_alias (__nearbyintf, nearbyintf)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=0274611558611a21c02121fee6adb482e5e39695
commit 0274611558611a21c02121fee6adb482e5e39695
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 16:05:24 2017 -0300
sparc: refactor sparc32 rint{f} selector to C
This patch refactors the sparc32 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
s_rint{f}-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_rintf-generic and s_rint-generic.
* sysdeps/sparc/sparcv9/fpu/multiarch/s_rint-generic.S: New
file.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_rint.c: Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_rintf-generic.S:
Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_rintf.c: Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_rint.S: Remove file.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_rintf.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 98bbb49..5d62def 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,17 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+ (libm-sysdep_routines): Add s_rintf-generic and s_rint-generic.
+ * sysdeps/sparc/sparcv9/fpu/multiarch/s_rint-generic.S: New
+ file.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_rint.c: Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_rintf-generic.S:
+ Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_rintf.c: Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_rint.S: Remove file.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_rintf.S: Likewise.
+
+ * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_llrintf-generic and s_llrint-generic.
* sysdeps/sparc/sparcv9/fpu/multiarch/s_llrint-generic.S: New
file.
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
index 5b6e2a6..459c0e5 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
@@ -10,7 +10,8 @@ sysdep_routines += $(sysdep_calls)
libm-sysdep_routines += s_fabs-vis3 s_fabsf-vis3 s_fabs-generic \
s_fabsf-generic s_llrintf-vis3 s_llrint-vis3 \
s_llrintf-generic s_llrint-generic \
- s_rintf-vis3 s_rint-vis3 \
+ s_rintf-vis3 s_rint-vis3 s_rintf-generic \
+ s_rint-generic \
s_fmaf-vis3 s_fma-vis3 s_fma-generic s_fmaf-generic \
s_nearbyint-vis3 s_nearbyintf-vis3 \
s_fdimf-vis3 s_fdim-vis3 s_fdim-generic \
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint-generic.S
new file mode 100644
index 0000000..9709b1e
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint-generic.S
@@ -0,0 +1,8 @@
+#include <math_ldbl_opt.h>
+
+#define __rint __rint_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#undef compat_symbol
+#define compat_symbol(a, b, c, d)
+#include <sysdeps/sparc/sparc32/sparcv9/fpu/s_rint.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.S
deleted file mode 100644
index de893fa..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.S
+++ /dev/null
@@ -1,19 +0,0 @@
-#include <sparc-ifunc.h>
-#include <math_ldbl_opt.h>
-
-SPARC_ASM_VIS3_IFUNC(rint)
-
-weak_alias (__rint, rint)
-
-#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_0)
-compat_symbol (libm, __rint, rintl, GLIBC_2_0)
-#endif
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef compat_symbol
-# define compat_symbol(a, b, c, d)
-
-#define __rint __rint_generic
-
-#include "../s_rint.S"
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.c
new file mode 100644
index 0000000..b6714e6
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.c
@@ -0,0 +1,35 @@
+/* rint ifunc resolver, Linux/sparc32 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __rint __redirect_rint
+#include <math.h>
+#undef __rint
+#include <math_ldbl_opt.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (__redirect_rint) __rint_vis3 attribute_hidden;
+extern __typeof (__redirect_rint) __rint_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect_rint, __rint,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __rint_vis3
+ : __rint_generic);
+weak_alias (__rint, rint)
+#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_0)
+compat_symbol (libm, __rint, rintl, GLIBC_2_0);
+#endif
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf-generic.S
new file mode 100644
index 0000000..185ba6b
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf-generic.S
@@ -0,0 +1,4 @@
+#define __rintf __rintf_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#include <sysdeps/sparc/sparc32/sparcv9/fpu/s_rintf.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.S
deleted file mode 100644
index 38fd936..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.S
+++ /dev/null
@@ -1,12 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(rintf)
-
-weak_alias (__rintf, rintf)
-
-# undef weak_alias
-# define weak_alias(a, b)
-
-#define __rintf __rintf_generic
-
-#include "../s_rintf.S"
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.c
new file mode 100644
index 0000000..bfe35d5
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.c
@@ -0,0 +1,29 @@
+/* rintf ifunc resolver, Linux/sparc32 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <math.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (rintf) __rintf_vis3 attribute_hidden;
+extern __typeof (rintf) __rintf_generic attribute_hidden;
+
+sparc_libm_ifunc (__rintf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __rintf_vis3
+ : __rintf_generic);
+weak_alias (__rintf, rintf)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=d1f016bc71578fef613613b44975d05931bac07f
commit d1f016bc71578fef613613b44975d05931bac07f
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 16:00:36 2017 -0300
sparc: refactor sparc32 llrint{f} selector to C
This patch refactors the sparc32 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
s_llrint{f}-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_llrintf-generic and s_llrint-generic.
* sysdeps/sparc/sparcv9/fpu/multiarch/s_llrint-generic.S: New
file.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrint.c: Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrintf-generic.S:
Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrintf.c: Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrint.S: Remove file.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrintf.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index d432582..98bbb49 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,17 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+ (libm-sysdep_routines): Add s_llrintf-generic and s_llrint-generic.
+ * sysdeps/sparc/sparcv9/fpu/multiarch/s_llrint-generic.S: New
+ file.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrint.c: Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrintf-generic.S:
+ Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrintf.c: Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrint.S: Remove file.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrintf.S: Likewise.
+
+ * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_fabsf-generic and s_fabs-generic.
* sysdeps/sparc/sparcv9/fpu/multiarch/s_fabs-generic.S: New
file.
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
index bd8e341..5b6e2a6 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
@@ -9,6 +9,7 @@ sysdep_calls := s_copysignf-vis3 s_copysign-vis3 s_copysignf-generic \
sysdep_routines += $(sysdep_calls)
libm-sysdep_routines += s_fabs-vis3 s_fabsf-vis3 s_fabs-generic \
s_fabsf-generic s_llrintf-vis3 s_llrint-vis3 \
+ s_llrintf-generic s_llrint-generic \
s_rintf-vis3 s_rint-vis3 \
s_fmaf-vis3 s_fma-vis3 s_fma-generic s_fmaf-generic \
s_nearbyint-vis3 s_nearbyintf-vis3 \
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint-generic.S
new file mode 100644
index 0000000..ceb5d14
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint-generic.S
@@ -0,0 +1,8 @@
+#include <math_ldbl_opt.h>
+
+#define __llrint __llrint_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#undef compat_symbol
+#define compat_symbol(a, b, c, d)
+#include <sysdeps/sparc/sparc32/sparcv9/fpu/s_llrint.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.S
deleted file mode 100644
index fd23041..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.S
+++ /dev/null
@@ -1,24 +0,0 @@
-#include <sparc-ifunc.h>
-#include <math_ldbl_opt.h>
-
-SPARC_ASM_VIS3_IFUNC(llrint)
-
-weak_alias (__llrint, llrint)
-
-strong_alias (__llrint, __lllrint)
-weak_alias (__lllrint, lllrint)
-
-#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1)
-compat_symbol (libm, __llrint, llrintl, GLIBC_2_1)
-#endif
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef strong_alias
-# define strong_alias(a, b)
-# undef compat_symbol
-# define compat_symbol(a, b, c, d)
-
-#define __llrint __llrint_generic
-
-#include "../s_llrint.S"
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.c
new file mode 100644
index 0000000..b10cad4
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.c
@@ -0,0 +1,36 @@
+/* llrint ifunc resolver, Linux/sparc32 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __llrint __redirect_llrint
+#include <math.h>
+#undef __llrint
+#include <math_ldbl_opt.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (__redirect_llrint) __llrint_vis3 attribute_hidden;
+extern __typeof (__redirect_llrint) __llrint_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect_llrint, __llrint,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __llrint_vis3
+ : __llrint_generic);
+weak_alias (__llrint, llrint)
+
+#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_1)
+compat_symbol (libm, __llrint, llrintl, GLIBC_2_1);
+#endif
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf-generic.S
new file mode 100644
index 0000000..83c462c
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf-generic.S
@@ -0,0 +1,4 @@
+#define __llrintf __llrintf_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#include <sysdeps/sparc/sparc32/sparcv9/fpu/s_llrintf.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.S
deleted file mode 100644
index 8af5244..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.S
+++ /dev/null
@@ -1,17 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(llrintf)
-
-weak_alias (__llrintf, llrintf)
-
-strong_alias (__llrintf, __lllrintf)
-weak_alias (__lllrintf, lllrintf)
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef strong_alias
-# define strong_alias(a, b)
-
-#define __llrintf __llrintf_generic
-
-#include "../s_llrintf.S"
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.c
new file mode 100644
index 0000000..0594a16
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.c
@@ -0,0 +1,29 @@
+/* llrintf ifunc resolver, Linux/sparc32 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <math.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (llrintf) __llrintf_vis3 attribute_hidden;
+extern __typeof (llrintf) __llrintf_generic attribute_hidden;
+
+sparc_libm_ifunc (__llrintf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __llrintf_vis3
+ : __llrintf_generic);
+weak_alias (__llrintf, llrintf)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=3cce7c5324c85f95d90cd6c4f0d07af0ba8b150e
commit 3cce7c5324c85f95d90cd6c4f0d07af0ba8b150e
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 15:49:25 2017 -0300
sparc: refactor sparc32 fabs{f} selector to C
This patch refactors the sparc32 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
s_fabs{f}-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_fabsf-generic and s_fabs-generic.
* sysdeps/sparc/sparcv9/fpu/multiarch/s_fabs-generic.S: New
file.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabs.c: Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabsf-generic.S:
Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabsf.c: Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabs.S: Remove file.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabsf.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index adca2e9..d432582 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,17 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+ (libm-sysdep_routines): Add s_fabsf-generic and s_fabs-generic.
+ * sysdeps/sparc/sparcv9/fpu/multiarch/s_fabs-generic.S: New
+ file.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabs.c: Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabsf-generic.S:
+ Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabsf.c: Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabs.S: Remove file.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabsf.S: Likewise.
+
+ * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
(sysdep_calls): New rule.
(sysdep_routines): Use sysdep_calls as base.
(libm-sysdep_routines): Add generic rule for symbols shared with
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
index b8d1126..bd8e341 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
@@ -7,7 +7,8 @@ sysdep_calls := s_copysignf-vis3 s_copysign-vis3 s_copysignf-generic \
s_copysign-generic
sysdep_routines += $(sysdep_calls)
-libm-sysdep_routines += s_fabs-vis3 s_fabsf-vis3 s_llrintf-vis3 s_llrint-vis3 \
+libm-sysdep_routines += s_fabs-vis3 s_fabsf-vis3 s_fabs-generic \
+ s_fabsf-generic s_llrintf-vis3 s_llrint-vis3 \
s_rintf-vis3 s_rint-vis3 \
s_fmaf-vis3 s_fma-vis3 s_fma-generic s_fmaf-generic \
s_nearbyint-vis3 s_nearbyintf-vis3 \
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs-generic.S
new file mode 100644
index 0000000..ddfdf4b
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs-generic.S
@@ -0,0 +1,8 @@
+#include <math_ldbl_opt.h>
+
+#define __fabs __fabs_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#undef compat_symbol
+#define compat_symbol(a, b, c, d)
+#include <sysdeps/sparc/sparc32/fpu/s_fabs.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.S
deleted file mode 100644
index 72cc08f..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.S
+++ /dev/null
@@ -1,18 +0,0 @@
-#include <sparc-ifunc.h>
-#include <math_ldbl_opt.h>
-
-SPARC_ASM_VIS3_IFUNC(fabs)
-
-weak_alias (__fabs, fabs)
-#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_0)
-compat_symbol (libm, __fabs, fabsl, GLIBC_2_0);
-#endif
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef compat_symbol
-# define compat_symbol(a, b, c, d)
-
-#define __fabs __fabs_generic
-
-#include "../s_fabs.S"
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.c
new file mode 100644
index 0000000..58b0192
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.c
@@ -0,0 +1,35 @@
+/* fabs ifunc resolver, Linux/sparc32 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __fabs __redirect_fabs
+#include <math.h>
+#undef __fabs
+#include <math_ldbl_opt.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (__redirect_fabs) __fabs_vis3 attribute_hidden;
+extern __typeof (__redirect_fabs) __fabs_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect_fabs, __fabs,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __fabs_vis3
+ : __fabs_generic);
+weak_alias (__fabs, fabs)
+#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_0)
+compat_symbol (libm, __fabs, fabsl, GLIBC_2_0);
+#endif
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf-generic.S
new file mode 100644
index 0000000..1d55c95
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf-generic.S
@@ -0,0 +1,4 @@
+#define __fabsf __fabsf_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#include <sysdeps/sparc/sparc32/fpu/s_fabsf.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.S
deleted file mode 100644
index 0f2e11e..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.S
+++ /dev/null
@@ -1,12 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(fabsf)
-
-weak_alias (__fabsf, fabsf)
-
-# undef weak_alias
-# define weak_alias(a, b)
-
-#define __fabsf __fabsf_generic
-
-#include "../../../fpu/s_fabsf.S"
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.c
new file mode 100644
index 0000000..76711b9
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.c
@@ -0,0 +1,29 @@
+/* fabsf ifunc resolver, Linux/sparc32 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <math.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (fabsf) __fabsf_vis3 attribute_hidden;
+extern __typeof (fabsf) __fabsf_generic attribute_hidden;
+
+sparc_libm_ifunc (__fabsf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __fabsf_vis3
+ : __fabsf_generic);
+weak_alias (__fabsf, fabsf)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=358b291fcb538b93be38e2c7578199a0fd4ff657
commit 358b291fcb538b93be38e2c7578199a0fd4ff657
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 15:34:33 2017 -0300
sparc: refactor sparc32 copysign selector to C
This patch refactors the sparc32 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
s_copysign{f}-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
(sysdep_calls): New rule.
(sysdep_routines): Use sysdep_calls as base.
(libm-sysdep_routines): Add generic rule for symbols shared with
libc. Add s_copysign-generic and s_copysign-generic objects.
* sysdeps/sparc/sparcv9/fpu/multiarch/s_copysign-generic.S: New
file.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_copysign.c: Likewise.
* sysdeps/sparc/sparcv9/fpu/multiarch/s_copysignf-generic.S:
Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_copysignf.c: Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_copysign.S: Remove file.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_copysignf.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index db557b8..adca2e9 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,19 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+ * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+ (sysdep_calls): New rule.
+ (sysdep_routines): Use sysdep_calls as base.
+ (libm-sysdep_routines): Add generic rule for symbols shared with
+ libc. Add s_copysign-generic and s_copysign-generic objects.
+ * sysdeps/sparc/sparcv9/fpu/multiarch/s_copysign-generic.S: New
+ file.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_copysign.c: Likewise.
+ * sysdeps/sparc/sparcv9/fpu/multiarch/s_copysignf-generic.S:
+ Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_copysignf.c: Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_copysign.S: Remove file.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_copysignf.S: Likewise.
+
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
Add add_n-generic.
* sysdeps/sparc/sparc64/multiarch/add_n-generic.S: New file.
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
index 62bf6f1..b8d1126 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
@@ -1,12 +1,19 @@
ifeq ($(subdir),math)
-libm-sysdep_routines += m_copysignf-vis3 m_copysign-vis3 s_fabs-vis3 \
- s_fabsf-vis3 s_llrintf-vis3 s_llrint-vis3 \
+
+# These functions are built both for libc and libm because they're required
+# by printf. While the libc objects have the prefix s_, the libm ones are
+# prefixed with m_.
+sysdep_calls := s_copysignf-vis3 s_copysign-vis3 s_copysignf-generic \
+ s_copysign-generic
+
+sysdep_routines += $(sysdep_calls)
+libm-sysdep_routines += s_fabs-vis3 s_fabsf-vis3 s_llrintf-vis3 s_llrint-vis3 \
s_rintf-vis3 s_rint-vis3 \
s_fmaf-vis3 s_fma-vis3 s_fma-generic s_fmaf-generic \
s_nearbyint-vis3 s_nearbyintf-vis3 \
s_fdimf-vis3 s_fdim-vis3 s_fdim-generic \
- s_fdimf-generic
-sysdep_routines += s_copysignf-vis3 s_copysign-vis3
+ s_fdimf-generic \
+ $(sysdep_calls:s_%=m_%)
CFLAGS-s_fdimf-vis3.c += -Wa,-Av9d -mvis3
CFLAGS-s_fdim-vis3.c += -Wa,-Av9d -mvis3
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign-generic.S
new file mode 100644
index 0000000..55fb0ed
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign-generic.S
@@ -0,0 +1,8 @@
+#include <math_ldbl_opt.h>
+
+#define __copysign __copysign_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#undef compat_symbol
+#define compat_symbol(a, b, c, d)
+#include <sysdeps/sparc/sparc32/fpu/s_copysign.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.S
deleted file mode 100644
index 5d26430..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.S
+++ /dev/null
@@ -1,21 +0,0 @@
-#include <sparc-ifunc.h>
-#include <math_ldbl_opt.h>
-
-SPARC_ASM_VIS3_IFUNC(copysign)
-
-weak_alias (__copysign, copysign)
-#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_0)
-compat_symbol (libm, __copysign, copysignl, GLIBC_2_0);
-#endif
-#if LONG_DOUBLE_COMPAT (libc, GLIBC_2_0)
-compat_symbol (libc, __copysign, copysignl, GLIBC_2_0);
-#endif
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef compat_symbol
-# define compat_symbol(a, b, c, d)
-
-#define __copysign __copysign_generic
-
-#include "../../../fpu/s_copysign.S"
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.c
new file mode 100644
index 0000000..f11181b
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.c
@@ -0,0 +1,38 @@
+/* copysign ifunc resolver, Linux/sparc32 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __copysign __redirect_copysign
+#include <math.h>
+#include <math_ldbl_opt.h>
+#undef __copysign
+#include <sparc-ifunc.h>
+
+extern __typeof (__redirect_copysign) __copysign_vis3 attribute_hidden;
+extern __typeof (__redirect_copysign) __copysign_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect_copysign, __copysign,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __copysign_vis3
+ : __copysign_generic);
+weak_alias (__copysign, copysign)
+#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_0)
+compat_symbol (libm, __copysign, copysignl, GLIBC_2_0);
+#endif
+#if LONG_DOUBLE_COMPAT (libc, GLIBC_2_0)
+compat_symbol (libc, __copysign, copysignl, GLIBC_2_0);
+#endif
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf-generic.S
new file mode 100644
index 0000000..ebe0759
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf-generic.S
@@ -0,0 +1,4 @@
+#define __copysignf __copysignf_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#include <sysdeps/sparc/sparc32/fpu/s_copysignf.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.S
deleted file mode 100644
index cd40955..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.S
+++ /dev/null
@@ -1,12 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(copysignf)
-
-weak_alias (__copysignf, copysignf)
-
-# undef weak_alias
-# define weak_alias(a, b)
-
-#define __copysignf __copysignf_generic
-
-#include "../../../fpu/s_copysignf.S"
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.c
new file mode 100644
index 0000000..573c14d
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.c
@@ -0,0 +1,11 @@
+#include <math.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (copysignf) __copysignf_vis3 attribute_hidden;
+extern __typeof (copysignf) __copysignf_generic attribute_hidden;
+
+sparc_libm_ifunc (__copysignf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __copysignf_vis3
+ : __copysignf_generic);
+weak_alias (__copysignf, copysignf)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=ce7dc185088c89caa9e7cad872db68e38b038e42
commit ce7dc185088c89caa9e7cad872db68e38b038e42
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 15:01:58 2017 -0300
sparc: refactor sparc64 __mpn_add_n selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
add_n-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
Add add_n-generic.
* sysdeps/sparc/sparc64/multiarch/add_n-generic.S: New file.
* sysdeps/sparc/sparc64/multiarch/add_n.c: Likewise.
* sysdeps/sparc/sparc64/multiarch/add_n.S: Remove file.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 7d92345..db557b8 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,12 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
+ Add add_n-generic.
+ * sysdeps/sparc/sparc64/multiarch/add_n-generic.S: New file.
+ * sysdeps/sparc/sparc64/multiarch/add_n.c: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/add_n.S: Remove file.
+
+ * sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
Add submul_1-generic.
* sysdeps/sparc/sparc64/multiarch/submul_1-generic.S: New file.
* sysdeps/sparc/sparc64/multiarch/submul_1.c: Likewise.
diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile
index d62a509..ba8ede1 100644
--- a/sysdeps/sparc/sparc64/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/multiarch/Makefile
@@ -14,8 +14,8 @@ endif
ifeq ($(subdir),stdlib)
sysdep_routines += mul_1-vis3 mul_1-generic addmul_1-vis3 addmul_1-generic \
- submul_1-vis3 submul_1-generic add_n-vis3 sub_n-vis3 \
- sub_n-generic
+ submul_1-vis3 submul_1-generic add_n-vis3 add_n-generic \
+ sub_n-vis3 sub_n-generic
endif
ifeq ($(subdir),math)
diff --git a/sysdeps/sparc/sparc64/multiarch/add_n-generic.S b/sysdeps/sparc/sparc64/multiarch/add_n-generic.S
new file mode 100644
index 0000000..a16e709
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/add_n-generic.S
@@ -0,0 +1,2 @@
+#define __mpn_add_n __mpn_add_n_generic
+#include <sysdeps/sparc/sparc64/add_n.S>
diff --git a/sysdeps/sparc/sparc64/multiarch/add_n.S b/sysdeps/sparc/sparc64/multiarch/add_n.S
deleted file mode 100644
index 9ffaf78..0000000
--- a/sysdeps/sparc/sparc64/multiarch/add_n.S
+++ /dev/null
@@ -1,56 +0,0 @@
-/* Multiple versions of add_n
-
- Copyright (C) 2013-2017 Free Software Foundation, Inc.
- Contributed by David S. Miller (davem@davemloft.net)
- This file is part of the GNU C Library.
-
- The GNU C Library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Lesser General Public
- License as published by the Free Software Foundation; either
- version 2.1 of the License, or (at your option) any later version.
-
- The GNU C Library is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Lesser General Public License for more details.
-
- You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library; if not, see
- <http://www.gnu.org/licenses/>. */
-
-#include <sysdep.h>
-
-ENTRY(__mpn_add_n)
- .type __mpn_add_n, @gnu_indirect_function
-# ifdef SHARED
- SETUP_PIC_REG_LEAF(o3, o5)
-# endif
- set HWCAP_SPARC_VIS3, %o1
- andcc %o0, %o1, %g0
- be 1f
- nop
-# ifdef SHARED
- sethi %gdop_hix22(__mpn_add_n_vis3), %o1
- xor %o1, %gdop_lox10(__mpn_add_n_vis3), %o1
-# else
- set __mpn_add_n_vis3, %o1
-# endif
- ba 10f
- nop
-1:
-# ifdef SHARED
- sethi %gdop_hix22(__mpn_add_n_generic), %o1
- xor %o1, %gdop_lox10(__mpn_add_n_generic), %o1
-# else
- set __mpn_add_n_generic, %o1
-# endif
-10:
-# ifdef SHARED
- add %o3, %o1, %o1
-# endif
- retl
- mov %o1, %o0
-END(__mpn_add_n)
-
-#define __mpn_add_n __mpn_add_n_generic
-#include "../add_n.S"
diff --git a/sysdeps/sparc/sparc64/multiarch/add_n.c b/sysdeps/sparc/sparc64/multiarch/add_n.c
new file mode 100644
index 0000000..6b509d1
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/add_n.c
@@ -0,0 +1,28 @@
+/* __mpn_add_n ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <gmp.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (mpn_add_n) __mpn_add_n_vis3 attribute_hidden;
+extern __typeof (mpn_add_n) __mpn_add_n_generic attribute_hidden;
+
+sparc_libm_ifunc (__mpn_add_n,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __mpn_add_n_vis3
+ : __mpn_add_n_generic)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=ac5ef64e992fb627023e889fcb26960a07239072
commit ac5ef64e992fb627023e889fcb26960a07239072
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 14:59:09 2017 -0300
sparc: refactor sparc64 __mpn_submul_1 selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
submul_1-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
Add submul_1-generic.
* sysdeps/sparc/sparc64/multiarch/submul_1-generic.S: New file.
* sysdeps/sparc/sparc64/multiarch/submul_1.c: Likewise.
* sysdeps/sparc/sparc64/multiarch/submul_1.S: Remove file.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index efc5e90..7d92345 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,12 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
+ Add submul_1-generic.
+ * sysdeps/sparc/sparc64/multiarch/submul_1-generic.S: New file.
+ * sysdeps/sparc/sparc64/multiarch/submul_1.c: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/submul_1.S: Remove file.
+
+ * sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
Add addmul_1-generic.
* sysdeps/sparc/sparc64/multiarch/addmul_1-generic.S: New file.
* sysdeps/sparc/sparc64/multiarch/addmul_1.c: Likewise.
diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile
index fbd7e22..d62a509 100644
--- a/sysdeps/sparc/sparc64/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/multiarch/Makefile
@@ -14,7 +14,8 @@ endif
ifeq ($(subdir),stdlib)
sysdep_routines += mul_1-vis3 mul_1-generic addmul_1-vis3 addmul_1-generic \
- submul_1-vis3 add_n-vis3 sub_n-vis3 sub_n-generic
+ submul_1-vis3 submul_1-generic add_n-vis3 sub_n-vis3 \
+ sub_n-generic
endif
ifeq ($(subdir),math)
diff --git a/sysdeps/sparc/sparc64/multiarch/submul_1-generic.S b/sysdeps/sparc/sparc64/multiarch/submul_1-generic.S
new file mode 100644
index 0000000..4c15360
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/submul_1-generic.S
@@ -0,0 +1,2 @@
+#define __mpn_submul_1 __mpn_submul_1_generic
+#include <sysdeps/sparc/sparc64/submul_1.S>
diff --git a/sysdeps/sparc/sparc64/multiarch/submul_1.S b/sysdeps/sparc/sparc64/multiarch/submul_1.S
deleted file mode 100644
index 3c297d9..0000000
--- a/sysdeps/sparc/sparc64/multiarch/submul_1.S
+++ /dev/null
@@ -1,56 +0,0 @@
-/* Multiple versions of submul_1
-
- Copyright (C) 2013-2017 Free Software Foundation, Inc.
- Contributed by David S. Miller (davem@davemloft.net)
- This file is part of the GNU C Library.
-
- The GNU C Library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Lesser General Public
- License as published by the Free Software Foundation; either
- version 2.1 of the License, or (at your option) any later version.
-
- The GNU C Library is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Lesser General Public License for more details.
-
- You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library; if not, see
- <http://www.gnu.org/licenses/>. */
-
-#include <sysdep.h>
-
-ENTRY(__mpn_submul_1)
- .type __mpn_submul_1, @gnu_indirect_function
-# ifdef SHARED
- SETUP_PIC_REG_LEAF(o3, o5)
-# endif
- set HWCAP_SPARC_VIS3, %o1
- andcc %o0, %o1, %g0
- be 1f
- nop
-# ifdef SHARED
- sethi %gdop_hix22(__mpn_submul_1_vis3), %o1
- xor %o1, %gdop_lox10(__mpn_submul_1_vis3), %o1
-# else
- set __mpn_submul_1_vis3, %o1
-# endif
- ba 10f
- nop
-1:
-# ifdef SHARED
- sethi %gdop_hix22(__mpn_submul_1_generic), %o1
- xor %o1, %gdop_lox10(__mpn_submul_1_generic), %o1
-# else
- set __mpn_submul_1_generic, %o1
-# endif
-10:
-# ifdef SHARED
- add %o3, %o1, %o1
-# endif
- retl
- mov %o1, %o0
-END(__mpn_submul_1)
-
-#define __mpn_submul_1 __mpn_submul_1_generic
-#include "../submul_1.S"
diff --git a/sysdeps/sparc/sparc64/multiarch/submul_1.c b/sysdeps/sparc/sparc64/multiarch/submul_1.c
new file mode 100644
index 0000000..ab9433f
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/submul_1.c
@@ -0,0 +1,28 @@
+/* __mpn_submul_1 ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <gmp.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (mpn_submul_1) __mpn_submul_1_vis3 attribute_hidden;
+extern __typeof (mpn_submul_1) __mpn_submul_1_generic attribute_hidden;
+
+sparc_libm_ifunc (__mpn_submul_1,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __mpn_submul_1_vis3
+ : __mpn_submul_1_generic)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=1754d6ec3d83b38639752c475c1618ad0f4b5e58
commit 1754d6ec3d83b38639752c475c1618ad0f4b5e58
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 14:56:29 2017 -0300
sparc: refactor sparc64 __mpn_addmul_1 selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
addmul_1-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
Add addmul_1-generic.
* sysdeps/sparc/sparc64/multiarch/addmul_1-generic.S: New file.
* sysdeps/sparc/sparc64/multiarch/addmul_1.c: Likewise.
* sysdeps/sparc/sparc64/multiarch/addmul_1.S: Remove file.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index df95a43..efc5e90 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,12 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
+ Add addmul_1-generic.
+ * sysdeps/sparc/sparc64/multiarch/addmul_1-generic.S: New file.
+ * sysdeps/sparc/sparc64/multiarch/addmul_1.c: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/addmul_1.S: Remove file.
+
+ * sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
Add sub_n-generic.
* sysdeps/sparc/sparc64/multiarch/sub_n-generic.S: New file.
* sysdeps/sparc/sparc64/multiarch/sub_n.c: Likewise.
diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile
index 10fe54f..fbd7e22 100644
--- a/sysdeps/sparc/sparc64/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/multiarch/Makefile
@@ -13,8 +13,8 @@ sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \
endif
ifeq ($(subdir),stdlib)
-sysdep_routines += mul_1-vis3 mul_1-generic addmul_1-vis3 submul_1-vis3 \
- add_n-vis3 sub_n-vis3 sub_n-generic
+sysdep_routines += mul_1-vis3 mul_1-generic addmul_1-vis3 addmul_1-generic \
+ submul_1-vis3 add_n-vis3 sub_n-vis3 sub_n-generic
endif
ifeq ($(subdir),math)
diff --git a/sysdeps/sparc/sparc64/multiarch/addmul_1-generic.S b/sysdeps/sparc/sparc64/multiarch/addmul_1-generic.S
new file mode 100644
index 0000000..5bf1da7
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/addmul_1-generic.S
@@ -0,0 +1,2 @@
+#define __mpn_addmul_1 __mpn_addmul_1_generic
+#include <sysdeps/sparc/sparc64/addmul_1.S>
diff --git a/sysdeps/sparc/sparc64/multiarch/addmul_1.S b/sysdeps/sparc/sparc64/multiarch/addmul_1.S
deleted file mode 100644
index dcb1da1..0000000
--- a/sysdeps/sparc/sparc64/multiarch/addmul_1.S
+++ /dev/null
@@ -1,56 +0,0 @@
-/* Multiple versions of addmul_1
-
- Copyright (C) 2013-2017 Free Software Foundation, Inc.
- Contributed by David S. Miller (davem@davemloft.net)
- This file is part of the GNU C Library.
-
- The GNU C Library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Lesser General Public
- License as published by the Free Software Foundation; either
- version 2.1 of the License, or (at your option) any later version.
-
- The GNU C Library is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Lesser General Public License for more details.
-
- You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library; if not, see
- <http://www.gnu.org/licenses/>. */
-
-#include <sysdep.h>
-
-ENTRY(__mpn_addmul_1)
- .type __mpn_addmul_1, @gnu_indirect_function
-# ifdef SHARED
- SETUP_PIC_REG_LEAF(o3, o5)
-# endif
- set HWCAP_SPARC_VIS3, %o1
- andcc %o0, %o1, %g0
- be 1f
- nop
-# ifdef SHARED
- sethi %gdop_hix22(__mpn_addmul_1_vis3), %o1
- xor %o1, %gdop_lox10(__mpn_addmul_1_vis3), %o1
-# else
- set __mpn_addmul_1_vis3, %o1
-# endif
- ba 10f
- nop
-1:
-# ifdef SHARED
- sethi %gdop_hix22(__mpn_addmul_1_generic), %o1
- xor %o1, %gdop_lox10(__mpn_addmul_1_generic), %o1
-# else
- set __mpn_addmul_1_generic, %o1
-# endif
-10:
-# ifdef SHARED
- add %o3, %o1, %o1
-# endif
- retl
- mov %o1, %o0
-END(__mpn_addmul_1)
-
-#define __mpn_addmul_1 __mpn_addmul_1_generic
-#include "../addmul_1.S"
diff --git a/sysdeps/sparc/sparc64/multiarch/addmul_1.c b/sysdeps/sparc/sparc64/multiarch/addmul_1.c
new file mode 100644
index 0000000..78bc34d
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/addmul_1.c
@@ -0,0 +1,28 @@
+/* __mpn_addmul_1 ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <gmp.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (mpn_addmul_1) __mpn_addmul_1_vis3 attribute_hidden;
+extern __typeof (mpn_addmul_1) __mpn_addmul_1_generic attribute_hidden;
+
+sparc_libm_ifunc (__mpn_addmul_1,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __mpn_addmul_1_vis3
+ : __mpn_addmul_1_generic)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=6aab12dce174e023082ec85c3a3a11aeb1d8ba2f
commit 6aab12dce174e023082ec85c3a3a11aeb1d8ba2f
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 14:53:13 2017 -0300
sparc: refactor sparc64 __mpn_sub_n selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
sub_n-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
Add sub_n-generic.
* sysdeps/sparc/sparc64/multiarch/sub_n-generic.S: New file.
* sysdeps/sparc/sparc64/multiarch/sub_n.c: Likewise.
* sysdeps/sparc/sparc64/multiarch/sub_n.S: Remove file.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 8b84a63..df95a43 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,12 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
+ Add sub_n-generic.
+ * sysdeps/sparc/sparc64/multiarch/sub_n-generic.S: New file.
+ * sysdeps/sparc/sparc64/multiarch/sub_n.c: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/sub_n.S: Remove file.
+
+ * sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
Add mul_1-generic.
* sysdeps/sparc/sparc64/multiarch/mul_1-generic.S: New file.
* sysdeps/sparc/sparc64/multiarch/mul_1.c: Likewise.
diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile
index 2338213..10fe54f 100644
--- a/sysdeps/sparc/sparc64/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/multiarch/Makefile
@@ -14,7 +14,7 @@ endif
ifeq ($(subdir),stdlib)
sysdep_routines += mul_1-vis3 mul_1-generic addmul_1-vis3 submul_1-vis3 \
- add_n-vis3 sub_n-vis3
+ add_n-vis3 sub_n-vis3 sub_n-generic
endif
ifeq ($(subdir),math)
diff --git a/sysdeps/sparc/sparc64/multiarch/sub_n-generic.S b/sysdeps/sparc/sparc64/multiarch/sub_n-generic.S
new file mode 100644
index 0000000..7cece93
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/sub_n-generic.S
@@ -0,0 +1,2 @@
+#define __mpn_sub_n __mpn_sub_n_generic
+#include <sysdeps/sparc/sparc64/sub_n.S>
diff --git a/sysdeps/sparc/sparc64/multiarch/sub_n.S b/sysdeps/sparc/sparc64/multiarch/sub_n.S
deleted file mode 100644
index d20a286..0000000
--- a/sysdeps/sparc/sparc64/multiarch/sub_n.S
+++ /dev/null
@@ -1,56 +0,0 @@
-/* Multiple versions of sub_n
-
- Copyright (C) 2013-2017 Free Software Foundation, Inc.
- Contributed by David S. Miller (davem@davemloft.net)
- This file is part of the GNU C Library.
-
- The GNU C Library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Lesser General Public
- License as published by the Free Software Foundation; either
- version 2.1 of the License, or (at your option) any later version.
-
- The GNU C Library is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Lesser General Public License for more details.
-
- You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library; if not, see
- <http://www.gnu.org/licenses/>. */
-
-#include <sysdep.h>
-
-ENTRY(__mpn_sub_n)
- .type __mpn_sub_n, @gnu_indirect_function
-# ifdef SHARED
- SETUP_PIC_REG_LEAF(o3, o5)
-# endif
- set HWCAP_SPARC_VIS3, %o1
- andcc %o0, %o1, %g0
- be 1f
- nop
-# ifdef SHARED
- sethi %gdop_hix22(__mpn_sub_n_vis3), %o1
- xor %o1, %gdop_lox10(__mpn_sub_n_vis3), %o1
-# else
- set __mpn_sub_n_vis3, %o1
-# endif
- ba 10f
- nop
-1:
-# ifdef SHARED
- sethi %gdop_hix22(__mpn_sub_n_generic), %o1
- xor %o1, %gdop_lox10(__mpn_sub_n_generic), %o1
-# else
- set __mpn_sub_n_generic, %o1
-# endif
-10:
-# ifdef SHARED
- add %o3, %o1, %o1
-# endif
- retl
- mov %o1, %o0
-END(__mpn_sub_n)
-
-#define __mpn_sub_n __mpn_sub_n_generic
-#include "../sub_n.S"
diff --git a/sysdeps/sparc/sparc64/multiarch/sub_n.c b/sysdeps/sparc/sparc64/multiarch/sub_n.c
new file mode 100644
index 0000000..838d901
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/sub_n.c
@@ -0,0 +1,28 @@
+/* __mpn_sub_n ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <gmp.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (mpn_sub_n) __mpn_sub_n_vis3 attribute_hidden;
+extern __typeof (mpn_sub_n) __mpn_sub_n_generic attribute_hidden;
+
+sparc_libm_ifunc (__mpn_sub_n,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __mpn_sub_n_vis3
+ : __mpn_sub_n_generic)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=c8a8dc2b35dc1a2bec2d9f8efe60e078a8fdc336
commit c8a8dc2b35dc1a2bec2d9f8efe60e078a8fdc336
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 14:52:51 2017 -0300
sparc: refactor sparc64 __mpn_mul_1 selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
mul_1-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
Add mul_1-generic.
* sysdeps/sparc/sparc64/multiarch/mul_1-generic.S: New file.
* sysdeps/sparc/sparc64/multiarch/mul_1.c: Likewise.
* sysdeps/sparc/sparc64/multiarch/mul_1.S: Remove file.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index e77e579..8b84a63 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,11 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+ * sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
+ Add mul_1-generic.
+ * sysdeps/sparc/sparc64/multiarch/mul_1-generic.S: New file.
+ * sysdeps/sparc/sparc64/multiarch/mul_1.c: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/mul_1.S: Remove file.
+
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_rintf-generic and s_rint-generic
objects.
diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile
index 6e90cba..2338213 100644
--- a/sysdeps/sparc/sparc64/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/multiarch/Makefile
@@ -13,7 +13,8 @@ sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \
endif
ifeq ($(subdir),stdlib)
-sysdep_routines += mul_1-vis3 addmul_1-vis3 submul_1-vis3 add_n-vis3 sub_n-vis3
+sysdep_routines += mul_1-vis3 mul_1-generic addmul_1-vis3 submul_1-vis3 \
+ add_n-vis3 sub_n-vis3
endif
ifeq ($(subdir),math)
diff --git a/sysdeps/sparc/sparc64/multiarch/mul_1-generic.S b/sysdeps/sparc/sparc64/multiarch/mul_1-generic.S
new file mode 100644
index 0000000..f1b7e60
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/mul_1-generic.S
@@ -0,0 +1,2 @@
+#define __mpn_mul_1 __mpn_mul_1_generic
+#include <sysdeps/sparc/sparc64/mul_1.S>
diff --git a/sysdeps/sparc/sparc64/multiarch/mul_1.S b/sysdeps/sparc/sparc64/multiarch/mul_1.S
deleted file mode 100644
index 75fca93..0000000
--- a/sysdeps/sparc/sparc64/multiarch/mul_1.S
+++ /dev/null
@@ -1,56 +0,0 @@
-/* Multiple versions of mul_1
-
- Copyright (C) 2013-2017 Free Software Foundation, Inc.
- Contributed by David S. Miller (davem@davemloft.net)
- This file is part of the GNU C Library.
-
- The GNU C Library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Lesser General Public
- License as published by the Free Software Foundation; either
- version 2.1 of the License, or (at your option) any later version.
-
- The GNU C Library is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Lesser General Public License for more details.
-
- You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library; if not, see
- <http://www.gnu.org/licenses/>. */
-
-#include <sysdep.h>
-
-ENTRY(__mpn_mul_1)
- .type __mpn_mul_1, @gnu_indirect_function
-# ifdef SHARED
- SETUP_PIC_REG_LEAF(o3, o5)
-# endif
- set HWCAP_SPARC_VIS3, %o1
- andcc %o0, %o1, %g0
- be 1f
- nop
-# ifdef SHARED
- sethi %gdop_hix22(__mpn_mul_1_vis3), %o1
- xor %o1, %gdop_lox10(__mpn_mul_1_vis3), %o1
-# else
- set __mpn_mul_1_vis3, %o1
-# endif
- ba 10f
- nop
-1:
-# ifdef SHARED
- sethi %gdop_hix22(__mpn_mul_1_generic), %o1
- xor %o1, %gdop_lox10(__mpn_mul_1_generic), %o1
-# else
- set __mpn_mul_1_generic, %o1
-# endif
-10:
-# ifdef SHARED
- add %o3, %o1, %o1
-# endif
- retl
- mov %o1, %o0
-END(__mpn_mul_1)
-
-#define __mpn_mul_1 __mpn_mul_1_generic
-#include "../mul_1.S"
diff --git a/sysdeps/sparc/sparc64/multiarch/mul_1.c b/sysdeps/sparc/sparc64/multiarch/mul_1.c
new file mode 100644
index 0000000..98f0ccc
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/mul_1.c
@@ -0,0 +1,28 @@
+/* __mpn_mul_1 ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <gmp.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (mpn_mul_1) __mpn_mul_1_vis3 attribute_hidden;
+extern __typeof (mpn_mul_1) __mpn_mul_1_generic attribute_hidden;
+
+sparc_libm_ifunc (__mpn_mul_1,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __mpn_mul_1_vis3
+ : __mpn_mul_1_generic)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=732950096ad6495711d455e9fb728ae2312c1e49
commit 732950096ad6495711d455e9fb728ae2312c1e49
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 13:42:07 2017 -0300
sparc: refactor sparc64 rint{f} selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
s_rint{f}-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_rintf-generic and s_rint-generic
objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_rint-generic.S: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_rint.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_rintf-generic.S: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_rint.S: Remove file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 62675d4..e77e579 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,16 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+ (libm-sysdep_routines): Add s_rintf-generic and s_rint-generic
+ objects.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_rint-generic.S: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_rint.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_rintf-generic.S: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_rint.S: Remove file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.S: Likewise.
+
+ * sysdeps/sparc/sparc64/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_lrint-generic and s_lrintf-generic
objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_lrint-generic.S: New file.
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
index d0a87d1..3321e1d 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
@@ -11,6 +11,7 @@ sysdep_calls := s_signbitf-vis3 s_signbit-vis3 s_signbitf-generic \
sysdep_routines += $(sysdep_calls)
libm-sysdep_routines += s_lrintf-vis3 s_lrint-vis3 s_lrintf-generic \
s_lrint-generic s_rintf-vis3 s_rint-vis3 \
+ s_rintf-generic s_rint-generic \
s_fmaf-vis3 s_fma-vis3 s_fmaf-generic s_fma-generic \
s_nearbyint-vis3 s_nearbyintf-vis3 \
s_nearbyint-generic s_nearbyintf-generic \
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_rint-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_rint-generic.S
new file mode 100644
index 0000000..d927434
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_rint-generic.S
@@ -0,0 +1,4 @@
+#define __rint __rint_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#include <sysdeps/sparc/sparc64/fpu/s_rint.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_rint.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_rint.S
deleted file mode 100644
index cc980eb..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_rint.S
+++ /dev/null
@@ -1,12 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(rint)
-
-weak_alias (__rint, rint)
-
-# undef weak_alias
-# define weak_alias(a, b)
-
-#define __rint __rint_generic
-
-#include "../s_rint.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_rint.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_rint.c
new file mode 100644
index 0000000..ca566c2
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_rint.c
@@ -0,0 +1,29 @@
+/* rint ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <math.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (rint) __rint_vis3 attribute_hidden;
+extern __typeof (rint) __rint_generic attribute_hidden;
+
+sparc_libm_ifunc (__rint,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __rint_vis3
+ : __rint_generic);
+weak_alias (__rint, rint)
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf-generic.S
new file mode 100644
index 0000000..30da5f0
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf-generic.S
@@ -0,0 +1,4 @@
+#define __rintf __rintf_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#include <sysdeps/sparc/sparc64/fpu/s_rintf.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.S
deleted file mode 100644
index 38fd936..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.S
+++ /dev/null
@@ -1,12 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(rintf)
-
-weak_alias (__rintf, rintf)
-
-# undef weak_alias
-# define weak_alias(a, b)
-
-#define __rintf __rintf_generic
-
-#include "../s_rintf.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.c
new file mode 100644
index 0000000..67f166c
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.c
@@ -0,0 +1,29 @@
+/* rintf ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <math.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (rintf) __rintf_vis3 attribute_hidden;
+extern __typeof (rintf) __rintf_generic attribute_hidden;
+
+sparc_libm_ifunc (__rintf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __rintf_vis3
+ : __rintf_generic);
+weak_alias (__rintf, rintf)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=736f7bafe88e83bed70e04b8460794e41fa7f87f
commit 736f7bafe88e83bed70e04b8460794e41fa7f87f
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 13:20:00 2017 -0300
sparc: refactor sparc64 lrint{f} selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
s_lrint{f}-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_lrint-generic and s_lrint-generic
objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_lrint-generic.S: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf-generic.S: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.S: Remove file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index a4e33a2..62675d4 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,16 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+ (libm-sysdep_routines): Add s_lrint-generic and s_lrintf-generic
+ objects.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_lrint-generic.S: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf-generic.S: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.S: Remove file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.S: Likewise.
+
+ * sysdeps/sparc/sparc64/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_nearbyint-generic and
s_nearbyintf-generic objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-generic.S: New file.
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
index 6062af0..d0a87d1 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
@@ -9,7 +9,8 @@ sysdep_calls := s_signbitf-vis3 s_signbit-vis3 s_signbitf-generic \
s_isnanf-vis3 s_isnan-vis3 s_isnanf-generic s_isnan-generic
sysdep_routines += $(sysdep_calls)
-libm-sysdep_routines += s_lrintf-vis3 s_lrint-vis3 s_rintf-vis3 s_rint-vis3 \
+libm-sysdep_routines += s_lrintf-vis3 s_lrint-vis3 s_lrintf-generic \
+ s_lrint-generic s_rintf-vis3 s_rint-vis3 \
s_fmaf-vis3 s_fma-vis3 s_fmaf-generic s_fma-generic \
s_nearbyint-vis3 s_nearbyintf-vis3 \
s_nearbyint-generic s_nearbyintf-generic \
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint-generic.S
new file mode 100644
index 0000000..e6ab999
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint-generic.S
@@ -0,0 +1,6 @@
+#define __lrint __lrint_generic
+#undef weak_alias
+#define weak_alias(a,b)
+#undef strong_alias
+#define strong_alias(a,b)
+#include <sysdeps/sparc/sparc64/fpu/s_lrint.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.S
deleted file mode 100644
index 94af8f0..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.S
+++ /dev/null
@@ -1,17 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(lrint)
-
-weak_alias (__lrint, lrint)
-
-strong_alias (__lrint, __llrint)
-weak_alias (__llrint, llrint)
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef strong_alias
-# define strong_alias(a, b)
-
-#define __lrint __lrint_generic
-
-#include "../s_lrint.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.c
new file mode 100644
index 0000000..557f0d6
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.c
@@ -0,0 +1,39 @@
+/* lrint/llrint ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define lrint __redirect_lrint
+#define llrint __redirect_llrint
+#define __lrint __redirect___lrint
+#define __llrint __redirect___llrint
+#include <math.h>
+#undef lrint
+#undef llrint
+#undef __lrint
+#undef __llrint
+#include <sparc-ifunc.h>
+
+extern __typeof (__redirect_lrint) __lrint_vis3 attribute_hidden;
+extern __typeof (__redirect_lrint) __lrint_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect_lrint, __lrint,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __lrint_vis3
+ : __lrint_generic);
+weak_alias (__lrint, lrint)
+strong_alias (__lrint, __llrint)
+weak_alias (__llrint, llrint)
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf-generic.S
new file mode 100644
index 0000000..4cfbf4a
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf-generic.S
@@ -0,0 +1,6 @@
+#define __lrintf __lrintf_generic
+#undef weak_alias
+#define weak_alias(a,b)
+#undef strong_alias
+#define strong_alias(a,b)
+#include <sysdeps/sparc/sparc64/fpu/s_lrintf.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.S
deleted file mode 100644
index e6ea406..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.S
+++ /dev/null
@@ -1,17 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(lrintf)
-
-weak_alias (__lrintf, lrintf)
-
-strong_alias (__lrintf, __llrintf)
-weak_alias (__llrintf, llrintf)
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef strong_alias
-# define strong_alias(a, b)
-
-#define __lrintf __lrintf_generic
-
-#include "../s_lrintf.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.c
new file mode 100644
index 0000000..9b1a569
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.c
@@ -0,0 +1,39 @@
+/* lrintf/llrintf ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define lrintf __redirect_lrintf
+#define llrintf __redirect_llrintf
+#define __lrintf __redirect_lrintf
+#define __llrintf __redirect_llrintf
+#include <math.h>
+#undef lrintf
+#undef llrintf
+#undef __lrintf
+#undef __llrintf
+#include <sparc-ifunc.h>
+
+extern __typeof (__redirect_lrintf) __lrintf_vis3 attribute_hidden;
+extern __typeof (__redirect_lrintf) __lrintf_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect_lrintf, __lrintf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __lrintf_vis3
+ : __lrintf_generic);
+weak_alias (__lrintf, lrintf)
+strong_alias (__lrintf, __llrintf)
+weak_alias (__llrintf, llrintf)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=7a61ff7fb7223c4fab4618f541133e1d7d42d549
commit 7a61ff7fb7223c4fab4618f541133e1d7d42d549
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 12:00:28 2017 -0300
sparc: refactor sparc64 nearbyint{f} selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
s_nearbyint{f}-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_nearbyint-generic and
s_nearbyintf-generic objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-generic.S: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-generic.S: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S: Remove file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 949d8b4..a4e33a2 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,15 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+ * sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+ (libm-sysdep_routines): Add s_nearbyint-generic and
+ s_nearbyintf-generic objects.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-generic.S: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-generic.S: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S: Remove file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S: Likewise.
+
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdeps_calls):
Add s_finitef-generic and s_finite-generic objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_finite-generic.S: New file.
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
index d19a446..6062af0 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
@@ -12,6 +12,7 @@ sysdep_routines += $(sysdep_calls)
libm-sysdep_routines += s_lrintf-vis3 s_lrint-vis3 s_rintf-vis3 s_rint-vis3 \
s_fmaf-vis3 s_fma-vis3 s_fmaf-generic s_fma-generic \
s_nearbyint-vis3 s_nearbyintf-vis3 \
+ s_nearbyint-generic s_nearbyintf-generic \
s_ceilf-vis3 s_ceil-vis3 s_ceilf-generic \
s_ceil-generic s_floorf-vis3 s_floor-vis3 \
s_floorf-generic s_floor-generic s_truncf-vis3 \
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-generic.S
new file mode 100644
index 0000000..efe2383
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-generic.S
@@ -0,0 +1,4 @@
+#define __nearbyint __nearbyint_generic
+#undef weak_alias
+#define weak_alias(a,b)
+#include <sysdeps/sparc/sparc64/fpu/s_nearbyint.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S
deleted file mode 100644
index bb75ab3..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S
+++ /dev/null
@@ -1,12 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(nearbyint)
-
-weak_alias (__nearbyint, nearbyint)
-
-# undef weak_alias
-# define weak_alias(a, b)
-
-#define __nearbyint __nearbyint_generic
-
-#include "../s_nearbyint.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.c
new file mode 100644
index 0000000..3ccb3be
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.c
@@ -0,0 +1,29 @@
+/* nearbyint ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <math.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (nearbyint) __nearbyint_vis3 attribute_hidden;
+extern __typeof (nearbyint) __nearbyint_generic attribute_hidden;
+
+sparc_libm_ifunc (__nearbyint,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __nearbyint_vis3
+ : __nearbyint_generic);
+weak_alias (__nearbyint, nearbyint)
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-generic.S
new file mode 100644
index 0000000..a2e38e9
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-generic.S
@@ -0,0 +1,4 @@
+#define __nearbyintf __nearbyintf_generic
+#undef weak_alias
+#define weak_alias(a,b)
+#include <sysdeps/sparc/sparc64/fpu/s_nearbyintf.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S
deleted file mode 100644
index 95100c1..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S
+++ /dev/null
@@ -1,12 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(nearbyintf)
-
-weak_alias (__nearbyintf, nearbyintf)
-
-# undef weak_alias
-# define weak_alias(a, b)
-
-#define __nearbyintf __nearbyintf_generic
-
-#include "../s_nearbyintf.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.c
new file mode 100644
index 0000000..23e3c13
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.c
@@ -0,0 +1,29 @@
+/* nearbyintf ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <math.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (nearbyintf) __nearbyintf_vis3 attribute_hidden;
+extern __typeof (nearbyintf) __nearbyintf_generic attribute_hidden;
+
+sparc_libm_ifunc (__nearbyintf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __nearbyintf_vis3
+ : __nearbyintf_generic);
+weak_alias (__nearbyintf, nearbyintf)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=11a116a04fd757f9b4c295a9e59677df45de1973
commit 11a116a04fd757f9b4c295a9e59677df45de1973
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 11:48:57 2017 -0300
sparc: refactor sparc64 finite{f} selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
s_finite{f}-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdeps_calls):
Add s_finitef-generic and s_finite-generic objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_finite-generic.S: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_finite.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_finitef-generic.S: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_finite.S: Remove file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.S: Remove file.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index dff7c09..949d8b4 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,15 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdeps_calls):
+ Add s_finitef-generic and s_finite-generic objects.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_finite-generic.S: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_finite.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_finitef-generic.S: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_finite.S: Remove file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.S: Remove file.
+
+ * sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdeps_calls):
Add s_isinff-generic and s_isinf-generic objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isinf-generic.S: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.c: Likewise.
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
index f0c8fa3..d19a446 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
@@ -4,6 +4,7 @@ ifeq ($(subdir),math)
# prefixed with m_.
sysdep_calls := s_signbitf-vis3 s_signbit-vis3 s_signbitf-generic \
s_signbit-generic s_finitef-vis3 s_finite-vis3 \
+ s_finitef-generic s_finite-generic \
s_isinff-vis3 s_isinf-vis3 s_isinff-generic s_isinf-generic \
s_isnanf-vis3 s_isnan-vis3 s_isnanf-generic s_isnan-generic
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_finite-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_finite-generic.S
new file mode 100644
index 0000000..dfbf32f
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_finite-generic.S
@@ -0,0 +1,6 @@
+#define __finite __finite_generic
+#undef hidden_def
+#define hidden_def(a)
+#undef weak_alias
+#define weak_alias(a,b)
+#include <sysdeps/sparc/sparc64/fpu/s_finite.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_finite.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_finite.S
deleted file mode 100644
index 78406a6..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_finite.S
+++ /dev/null
@@ -1,15 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(finite)
-
-hidden_def (__finite)
-weak_alias (__finite, finite)
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef hidden_def
-# define hidden_def(a)
-
-#define __finite __finite_generic
-
-#include "../s_finite.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_finite.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_finite.c
new file mode 100644
index 0000000..22e46c4
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_finite.c
@@ -0,0 +1,37 @@
+/* finite ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __finite __redirect___finite
+#define __finitef __redirect___finitef
+#define __finitel __redirect___finitel
+#include <math.h>
+#undef __finite
+#undef __finitef
+#undef __finitel
+#include <sparc-ifunc.h>
+
+extern __typeof (finite) __finite_vis3 attribute_hidden;
+extern __typeof (finite) __finite_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect___finite, __finite,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __finite_vis3
+ : __finite_generic);
+
+sparc_ifunc_redirected_hidden_def (__redirect___finite, __finite)
+weak_alias (__finite, finite)
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef-generic.S
new file mode 100644
index 0000000..3888076
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef-generic.S
@@ -0,0 +1,6 @@
+#define __finitef __finitef_generic
+#undef hidden_def
+#define hidden_def(a)
+#undef weak_alias
+#define weak_alias(a,b)
+#include <sysdeps/sparc/sparc64/fpu/s_finitef.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.S
deleted file mode 100644
index cafd41f..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.S
+++ /dev/null
@@ -1,15 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(finitef)
-
-hidden_def (__finitef)
-weak_alias (__finitef, finitef)
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef hidden_def
-# define hidden_def(a)
-
-#define __finitef __finitef_generic
-
-#include "../s_finitef.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.c
new file mode 100644
index 0000000..695e8a0
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.c
@@ -0,0 +1,33 @@
+/* finitef ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __finitef __redirect___finitef
+#include <math.h>
+#undef __finitef
+#include <sparc-ifunc.h>
+
+extern __typeof (finitef) __finitef_vis3 attribute_hidden;
+extern __typeof (finitef) __finitef_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect___finitef, __finitef,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __finitef_vis3
+ : __finitef_generic);
+
+sparc_ifunc_redirected_hidden_def (__redirect___finitef, __finitef)
+weak_alias (__finitef, finitef)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=67f3d3db115dd6d387bc420e35d081943bfa5fd8
commit 67f3d3db115dd6d387bc420e35d081943bfa5fd8
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 11:39:43 2017 -0300
sparc: refactor sparc64 isinf{f} selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
s_isinf{f}-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdeps_calls):
Add isinff-generic and s_isinf-generic objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isinf-generic.S: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isinff-generic.S: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.S: Remove file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 53a22fe..dff7c09 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,15 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdeps_calls):
+ Add s_isinff-generic and s_isinf-generic objects.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isinf-generic.S: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isinff-generic.S: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.S: Remove file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.S: Likewise.
+
+ * sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdeps_calls):
Add s_isnanf-generic and s_isnan-generic objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isnan-generic.S: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf-generic.S: Likewise.
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
index a46773b..f0c8fa3 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
@@ -3,8 +3,8 @@ ifeq ($(subdir),math)
# by printf. While the libc objects have the prefix s_, the libm ones are
# prefixed with m_.
sysdep_calls := s_signbitf-vis3 s_signbit-vis3 s_signbitf-generic \
- s_signbit-generic s_finitef-vis3 \
- s_finite-vis3 s_isinff-vis3 s_isinf-vis3 \
+ s_signbit-generic s_finitef-vis3 s_finite-vis3 \
+ s_isinff-vis3 s_isinf-vis3 s_isinff-generic s_isinf-generic \
s_isnanf-vis3 s_isnan-vis3 s_isnanf-generic s_isnan-generic
sysdep_routines += $(sysdep_calls)
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf-generic.S
new file mode 100644
index 0000000..ebaf054
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf-generic.S
@@ -0,0 +1,6 @@
+#define __isinf __isinf_generic
+#undef hidden_def
+#define hidden_def(a)
+#undef weak_alias
+#define weak_alias(a,b)
+#include <./sysdeps/sparc/sparc64/fpu/s_isinf.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.S
deleted file mode 100644
index ed9b626..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.S
+++ /dev/null
@@ -1,15 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(isinf)
-
-hidden_def (__isinf)
-weak_alias (__isinf, isinf)
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef hidden_def
-# define hidden_def(a)
-
-#define __isinf __isinf_generic
-
-#include "../s_isinf.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.c
new file mode 100644
index 0000000..d7fec22
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.c
@@ -0,0 +1,37 @@
+/* isinf ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __isinf __redirect___isinf
+#define __isinff __redirect___isinff
+#define __isinfl __redirect___isinfl
+#include <math.h>
+#undef __isinf
+#undef __isinff
+#undef __isinfl
+#include <sparc-ifunc.h>
+
+extern __typeof (isinf) __isinf_vis3 attribute_hidden;
+extern __typeof (isinf) __isinf_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect___isinf, __isinf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __isinf_vis3
+ : __isinf_generic)
+
+sparc_ifunc_redirected_hidden_def (__redirect___isinf, __isinf)
+weak_alias (__isinf, isinf)
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff-generic.S
new file mode 100644
index 0000000..d37243f
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff-generic.S
@@ -0,0 +1,6 @@
+#define __isinff __isinff_generic
+#undef hidden_def
+#define hidden_def(a)
+#undef weak_alias
+#define weak_alias(a,b)
+#include <sysdeps/sparc/sparc64/fpu/s_isinff.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.S
deleted file mode 100644
index 0451739..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.S
+++ /dev/null
@@ -1,15 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(isinff)
-
-hidden_def (__isinff)
-weak_alias (__isinff, isinff)
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef hidden_def
-# define hidden_def(a)
-
-#define __isinff __isinff_generic
-
-#include "../s_isinff.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.c
new file mode 100644
index 0000000..31c67f3
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.c
@@ -0,0 +1,33 @@
+/* isinff ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __isinff __redirect___isinff
+#include <math.h>
+#undef __isinff
+#include <sparc-ifunc.h>
+
+extern __typeof (isinff) __isinff_vis3 attribute_hidden;
+extern __typeof (isinff) __isinff_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect___isinff, __isinff,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __isinff_vis3
+ : __isinff_generic);
+
+sparc_ifunc_redirected_hidden_def (__redirect___isinff, __isinff)
+weak_alias (__isinff, isinff)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=a357fe5ce966c2faf904a569da09a6d713ca4666
commit a357fe5ce966c2faf904a569da09a6d713ca4666
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 11:28:55 2017 -0300
sparc: refactor sparc64 isnan{f} selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
(s_isnan-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdeps_calls):
Add s_isnanf-generic and s_isnan-generic objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isnan-generic.S: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf-generic.S: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.S: Remove file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 884c6e5..53a22fe 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,14 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+ * sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdeps_calls):
+ Add s_isnanf-generic and s_isnan-generic objects.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isnan-generic.S: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf-generic.S: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.S: Remove file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.S: Likewise.
+
* sysdeps/sparc/sparc-ifunc.h (sparc_libm_ifunc_redirected): New
macro.
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdep_calls): New
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
index 702452c..a46773b 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
@@ -5,7 +5,7 @@ ifeq ($(subdir),math)
sysdep_calls := s_signbitf-vis3 s_signbit-vis3 s_signbitf-generic \
s_signbit-generic s_finitef-vis3 \
s_finite-vis3 s_isinff-vis3 s_isinf-vis3 \
- s_isnanf-vis3 s_isnan-vis3
+ s_isnanf-vis3 s_isnan-vis3 s_isnanf-generic s_isnan-generic
sysdep_routines += $(sysdep_calls)
libm-sysdep_routines += s_lrintf-vis3 s_lrint-vis3 s_rintf-vis3 s_rint-vis3 \
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan-generic.S
new file mode 100644
index 0000000..64d4430
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan-generic.S
@@ -0,0 +1,6 @@
+#define __isnan __isnan_generic
+#undef hidden_def
+#define hidden_def(a)
+#undef weak_alias
+#define weak_alias(a,b)
+#include <sysdeps/sparc/sparc64/fpu/s_isnan.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.S
deleted file mode 100644
index 40e985a..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.S
+++ /dev/null
@@ -1,15 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(isnan)
-
-hidden_def (__isnan)
-weak_alias (__isnan, isnan)
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef hidden_def
-# define hidden_def(a)
-
-#define __isnan __isnan_generic
-
-#include "../s_isnan.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.c
new file mode 100644
index 0000000..3b3d700
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.c
@@ -0,0 +1,37 @@
+/* isnan ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __isnan __redirect___isnan
+#define __isnanf __redirect___isnanf
+#define __isnanl __redirect___isnanl
+#include <math.h>
+#undef __isnan
+#undef __isnanf
+#undef __isnanl
+#include <sparc-ifunc.h>
+
+extern __typeof (isnan) __isnan_vis3 attribute_hidden;
+extern __typeof (isnan) __isnan_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect___isnan, __isnan,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __isnan_vis3
+ : __isnan_generic);
+
+sparc_ifunc_redirected_hidden_def (__redirect___isnan, __isnan)
+weak_alias (__isnan, isnan)
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf-generic.S
new file mode 100644
index 0000000..5c82f7d
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf-generic.S
@@ -0,0 +1,6 @@
+#define __isnanf __isnanf_generic
+#undef hidden_def
+#define hidden_def(a)
+#undef weak_alias
+#define weak_alias(a,b)
+#include <sysdeps/sparc/sparc64/fpu/s_isnanf.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.S
deleted file mode 100644
index 6b53b69..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.S
+++ /dev/null
@@ -1,15 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(isnanf)
-
-hidden_def (__isnanf)
-weak_alias (__isnanf, isnanf)
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef hidden_def
-# define hidden_def(a)
-
-#define __isnanf __isnanf_generic
-
-#include "../s_isnanf.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.c
new file mode 100644
index 0000000..f6a6380
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.c
@@ -0,0 +1,33 @@
+/* isnanf ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __isnanf __redirect___isnanf
+#include <math.h>
+#undef __isnanf
+#include <sparc-ifunc.h>
+
+extern __typeof (isnanf) __isnanf_vis3 attribute_hidden;
+extern __typeof (isnanf) __isnanf_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect___isnanf, __isnanf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __isnanf_vis3
+ : __isnanf_generic);
+
+sparc_ifunc_redirected_hidden_def (__redirect___isnanf,__isnanf)
+weak_alias (__isnanf, isnanf)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=4f4af8ac1e361cb4fc2ca82ba6fc4dcb9f8474bd
commit 4f4af8ac1e361cb4fc2ca82ba6fc4dcb9f8474bd
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 09:56:49 2017 -0300
sparc: refactor sparc64 signbit{f} selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
(s_signbit-generic.S).
The patch simplifies the Makefile by moving the common objects from
libm-sysdeps_routines and sysdeps_routines to sysdeps_call rule and
including it where required with the correct prefix.
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc-ifunc.h (sparc_libm_ifunc_redirected): New
macro.
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdep_calls): New
rule.
(sysdep_routines): Use sysdep_calls as base.
(libm-sysdep_routines): Add generic rule for symbols shared with
libc. Add s_signbit-generic and s_signbitf-generic objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.c: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_signbit-generic.S: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf-generic.S: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S: Remove file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index c9c9de3..884c6e5 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,19 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+ * sysdeps/sparc/sparc-ifunc.h (sparc_libm_ifunc_redirected): New
+ macro.
+ * sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdep_calls): New
+ rule.
+ (sysdep_routines): Use sysdep_calls as base.
+ (libm-sysdep_routines): Add generic rule for symbols shared with
+ libc. Add s_signbit-generic and s_signbitf-generic objects.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.c: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_signbit-generic.S: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf-generic.S: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S: Remove file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S: Likewise.
+
* config.h.in (HAVE_AS_VIS3_SUPPORT): Remove check for VIS3 support.
* sysdeps/sparc/configure.ac (HAVE_AS_VIS3_SUPPORT): Likewise.
* sysdeps//sparc/sparc32/sparcv9/fpu/multiarch/s_fdim.c: Likewise.
diff --git a/sysdeps/sparc/sparc-ifunc.h b/sysdeps/sparc/sparc-ifunc.h
index 54420d8..4a68cf1 100644
--- a/sysdeps/sparc/sparc-ifunc.h
+++ b/sysdeps/sparc/sparc-ifunc.h
@@ -158,6 +158,9 @@ END (__##name)
# define sparc_libc_ifunc(name, expr) sparc_libm_ifunc (name, expr)
+# define sparc_libm_ifunc_redirected(redirected_name, name, expr) \
+ __ifunc (redirected_name, name, expr, int hwcap, libm_ifunc_init)
+
/* It essentially does libc_hidden_builtin_def (name) and redirect
the internal redirected symbol to ifunc implementation. */
# if defined SHARED
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
index 2ac4496..702452c 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
@@ -1,17 +1,21 @@
ifeq ($(subdir),math)
-libm-sysdep_routines += m_signbitf-vis3 m_signbit-vis3 m_finitef-vis3 \
- m_finite-vis3 m_isinff-vis3 m_isinf-vis3 \
- m_isnanf-vis3 m_isnan-vis3 s_lrintf-vis3 \
- s_lrint-vis3 s_rintf-vis3 s_rint-vis3 \
+# These functions are built both for libc and libm because they're required
+# by printf. While the libc objects have the prefix s_, the libm ones are
+# prefixed with m_.
+sysdep_calls := s_signbitf-vis3 s_signbit-vis3 s_signbitf-generic \
+ s_signbit-generic s_finitef-vis3 \
+ s_finite-vis3 s_isinff-vis3 s_isinf-vis3 \
+ s_isnanf-vis3 s_isnan-vis3
+
+sysdep_routines += $(sysdep_calls)
+libm-sysdep_routines += s_lrintf-vis3 s_lrint-vis3 s_rintf-vis3 s_rint-vis3 \
s_fmaf-vis3 s_fma-vis3 s_fmaf-generic s_fma-generic \
s_nearbyint-vis3 s_nearbyintf-vis3 \
s_ceilf-vis3 s_ceil-vis3 s_ceilf-generic \
s_ceil-generic s_floorf-vis3 s_floor-vis3 \
s_floorf-generic s_floor-generic s_truncf-vis3 \
- s_trunc-vis3 s_truncf-generic s_trunc-generic
-sysdep_routines += s_signbitf-vis3 s_signbit-vis3 s_finitef-vis3 \
- s_finite-vis3 s_isinff-vis3 s_isinf-vis3 \
- s_isnanf-vis3 s_isnan-vis3
+ s_trunc-vis3 s_truncf-generic s_trunc-generic \
+ $(sysdep_calls:s_%=m_%)
CFLAGS-s_ceilf-vis3.c += -Wa,-Av9d -mvis3
CFLAGS-s_ceil-vis3.c += -Wa,-Av9d -mvis3
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit-generic.S
new file mode 100644
index 0000000..dfa40ac
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit-generic.S
@@ -0,0 +1,6 @@
+#define __signbit __signbit_generic
+#undef strong_alias
+#define strong_alias(a, b)
+#undef hidden_def
+#define hidden_def(a)
+#include <sysdeps/sparc/sparc64/fpu/s_signbit.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S
deleted file mode 100644
index b8ff64a..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S
+++ /dev/null
@@ -1,20 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(signbit)
-
-/* On 64-bit the double version will also always work for
- long-double-precision since in both cases the word with the
- sign bit in it is passed always in register %f0. */
-strong_alias (__signbit, __signbitl)
-hidden_def (__signbitl)
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef strong_alias
-# define strong_alias(a, b)
-# undef hidden_def
-# define hidden_def(a)
-
-#define __signbit __signbit_generic
-
-#include "../s_signbit.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.c
new file mode 100644
index 0000000..33e69f8
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.c
@@ -0,0 +1,37 @@
+/* signbit ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __signbit __redirect_signbit
+#include <math.h>
+#undef __signbit
+
+#include <sparc-ifunc.h>
+
+extern __typeof (__redirect_signbit) __signbit_vis3 attribute_hidden;
+extern __typeof (__redirect_signbit) __signbit_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect_signbit, __signbit,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __signbit_vis3
+ : __signbit_generic);
+
+/* On 64-bit the double version will also always work for
+ long-double-precision since in both cases the word with the
+ sign bit in it is passed always in register %f0. */
+strong_alias (__signbit, __signbitl)
+sparc_ifunc_redirected_hidden_def (__redirect_signbit, __signbitl)
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf-generic.S
new file mode 100644
index 0000000..851ff35
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf-generic.S
@@ -0,0 +1,2 @@
+#define __signbitf __signbitf_generic
+#include <sysdeps/sparc/sparc64/fpu/s_signbitf.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S
deleted file mode 100644
index d57e999..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S
+++ /dev/null
@@ -1,10 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(signbitf)
-
-# undef weak_alias
-# define weak_alias(a, b)
-
-#define __signbitf __signbitf_generic
-
-#include "../s_signbitf.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.c
new file mode 100644
index 0000000..7e817f0
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.c
@@ -0,0 +1,28 @@
+/* signbit ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <math.h>
+#include <sparc-ifunc.h>
+
+extern int __signbitf_vis3 (float) attribute_hidden;
+extern int __signbitf_generic (float) attribute_hidden;
+
+sparc_libm_ifunc(__signbitf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __signbitf_vis3
+ : __signbitf_generic);
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=87115f13a1fb49de15e33bcd25d1c7551e7ea756
commit 87115f13a1fb49de15e33bcd25d1c7551e7ea756
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Thu Oct 12 19:43:50 2017 -0300
sparc: Assume VIS3 support
This patch assumes VIS3 support by binutils, which is support since
binutils 2.22. This leads to soem code simplification, mostly on
multiarch build where there is no more 2 variant possible (whether
binutils supports VIS3 instructions or not).
For multiarch files whether HAVE_AS_VIS3_SUPPORT was checked and
the default implementation was built with a different name, a new
file with (implementation with -generic appended) is added.
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* config.h.in (HAVE_AS_VIS3_SUPPORT): Remove check for VIS3 support.
* sysdeps/sparc/configure.ac (HAVE_AS_VIS3_SUPPORT): Likewise.
* sysdeps//sparc/sparc32/sparcv9/fpu/multiarch/s_fdim.c: Likewise.
* sysdeps//sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf.c: Likewise.
* sysdeps//sparc/sparc32/sparcv9/fpu/multiarch/s_fma.c: Likewise.
* sysdeps//sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_ceil.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_floor.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_floorf.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_fma.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_fmaf.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.c: Likewise.
* sysdeps/sparc/sparc-ifunc.h [!HAVE_AS_VIS3_SUPPORT]
(SPARC_ASM_VIS3_IFUNC, SPARC_ASM_VIS3_VIS2_IFUNC): Remove macros.
* sysdeps/sparc/sparc32/sparcv9/Makefile [$(have-as-vis3) != yes]
(ASFLAGS.o, ASFLAGS-.os, ASFLAGS-.op, ASFLAGS-.oS): Remove rules.
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
($(have-as-vis3) == yes): Remove conditional.
* sysdeps/sparc/sparc64/Makefile (($(have-as-vis3) == yes)):
Likewise.
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim-generic.c: New
file.
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf-generic.c: New
file.
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma-generic.c: New
file.
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf-generic.c: New
file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-generic.c: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-generic.c: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_floor-generic.c: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-generic.c: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_fma-generic.c: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_fmaf-generic.c: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_trunc-generic.c: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_truncf-generic.c: New file.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 8e60fb7..c9c9de3 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,56 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+ * config.h.in (HAVE_AS_VIS3_SUPPORT): Remove check for VIS3 support.
+ * sysdeps/sparc/configure.ac (HAVE_AS_VIS3_SUPPORT): Likewise.
+ * sysdeps//sparc/sparc32/sparcv9/fpu/multiarch/s_fdim.c: Likewise.
+ * sysdeps//sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf.c: Likewise.
+ * sysdeps//sparc/sparc32/sparcv9/fpu/multiarch/s_fma.c: Likewise.
+ * sysdeps//sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_ceil.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_floor.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_floorf.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_fma.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_fmaf.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.c: Likewise.
+ * sysdeps/sparc/sparc-ifunc.h [!HAVE_AS_VIS3_SUPPORT]
+ (SPARC_ASM_VIS3_IFUNC, SPARC_ASM_VIS3_VIS2_IFUNC): Remove macros.
+ * sysdeps/sparc/sparc32/sparcv9/Makefile [$(have-as-vis3) != yes]
+ (ASFLAGS.o, ASFLAGS-.os, ASFLAGS-.op, ASFLAGS-.oS): Remove rules.
+ * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+ ($(have-as-vis3) == yes): Remove conditional.
+ * sysdeps/sparc/sparc64/Makefile (($(have-as-vis3) == yes)):
+ Likewise.
+ * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim-generic.c: New
+ file.
+ * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf-generic.c: New
+ file.
+ * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma-generic.c: New
+ file.
+ * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf-generic.c: New
+ file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-generic.c: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-generic.c: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_floor-generic.c: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-generic.c: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_fma-generic.c: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_fmaf-generic.c: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_trunc-generic.c: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_truncf-generic.c: New file.
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
+ [$(subdir) = string] (sysdep_routines): Add memset-ultra1.
+ * sysdeps/sparc/sparc64/multiarch/Makefile [$(subdir) = string]
+ (sysdep_routines): Add memset-ultra1.
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/memset-ultra1.S: New
+ file.
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/memset.c: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/ifunc-memset.h: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/memset-ultra1.S: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/memset.c: Likewise.
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/memset.S: Remove file.
+ * sysdeps/sparc/sparc64/multiarch/memset.S: Likewise.
+
* sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
[$(subdir) = string] (sysdep_routines): Add memset-ultra1.
* sysdeps/sparc/sparc64/multiarch/Makefile [$(subdir) = string]
diff --git a/config.h.in b/config.h.in
index c140ff3..8d76dad 100644
--- a/config.h.in
+++ b/config.h.in
@@ -50,9 +50,6 @@
/* Defined on SPARC if GCC emits GOTDATA relocations. */
#undef HAVE_GCC_GOTDATA
-/* Define on SPARC if AS supports VIS3 instructions. */
-#undef HAVE_AS_VIS3_SUPPORT
-
/* Define if the linker supports the -z combreloc option. */
#undef HAVE_Z_COMBRELOC
diff --git a/sysdeps/sparc/configure b/sysdeps/sparc/configure
index 90a86f6..bc6ac14 100644
--- a/sysdeps/sparc/configure
+++ b/sysdeps/sparc/configure
@@ -1,48 +1,6 @@
# This file is generated from configure.ac by Autoconf. DO NOT EDIT!
# Local configure fragment for sysdeps/sparc.
-# Check for support of VIS3 et al. instructions in the assembler.
-{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for sparc assembler VIS3 support" >&5
-$as_echo_n "checking for sparc assembler VIS3 support... " >&6; }
-if ${libc_cv_sparc_as_vis3+:} false; then :
- $as_echo_n "(cached) " >&6
-else
- cat > conftest.S <<\EOF
- .text
-foo: fmadds %f1, %f2, %f3, %f5
- fmaddd %f2, %f4, %f8, %f10
- fhadds %f2, %f3, %f5
- fhaddd %f4, %f8, %f10
- pdistn %f2, %f4, %g1
- movdtox %f10, %o0
- movstouw %f9, %o1
- movstosw %f7, %o2
- movxtod %o3, %f18
- movwtos %o4, %f15
- flcmps %fcc0, %f3, %f5
- flcmpd %fcc1, %f4, %f6
-EOF
-if { ac_try='${CC-cc} -c $CFLAGS -Wa,-Av9d conftest.S'
- { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
- (eval $ac_try) 2>&5
- ac_status=$?
- $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
- test $ac_status = 0; }; }; then
- libc_cv_sparc_as_vis3=yes
-else
- libc_cv_sparc_as_vis3=no
-fi
-rm -f conftest*
-fi
-{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libc_cv_sparc_as_vis3" >&5
-$as_echo "$libc_cv_sparc_as_vis3" >&6; }
-if test $libc_cv_sparc_as_vis3 = yes; then
- $as_echo "#define HAVE_AS_VIS3_SUPPORT 1" >>confdefs.h
-
-fi
-config_vars="$config_vars
-have-as-vis3 = $libc_cv_sparc_as_vis3"
-
# Check for a GCC emitting GOTDATA relocations.
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for sparc gcc GOTDATA reloc support" >&5
$as_echo_n "checking for sparc gcc GOTDATA reloc support... " >&6; }
diff --git a/sysdeps/sparc/configure.ac b/sysdeps/sparc/configure.ac
index 982077c..43ad541 100644
--- a/sysdeps/sparc/configure.ac
+++ b/sysdeps/sparc/configure.ac
@@ -1,35 +1,6 @@
GLIBC_PROVIDES dnl See aclocal.m4 in the top level source directory.
# Local configure fragment for sysdeps/sparc.
-# Check for support of VIS3 et al. instructions in the assembler.
-AC_CACHE_CHECK(for sparc assembler VIS3 support, libc_cv_sparc_as_vis3, [dnl
-cat > conftest.S <<\EOF
- .text
-foo: fmadds %f1, %f2, %f3, %f5
- fmaddd %f2, %f4, %f8, %f10
- fhadds %f2, %f3, %f5
- fhaddd %f4, %f8, %f10
- pdistn %f2, %f4, %g1
- movdtox %f10, %o0
- movstouw %f9, %o1
- movstosw %f7, %o2
- movxtod %o3, %f18
- movwtos %o4, %f15
- flcmps %fcc0, %f3, %f5
- flcmpd %fcc1, %f4, %f6
-EOF
-dnl
-if AC_TRY_COMMAND([${CC-cc} -c $CFLAGS -Wa,-Av9d conftest.S]); then
- libc_cv_sparc_as_vis3=yes
-else
- libc_cv_sparc_as_vis3=no
-fi
-rm -f conftest*])
-if test $libc_cv_sparc_as_vis3 = yes; then
- AC_DEFINE(HAVE_AS_VIS3_SUPPORT)
-fi
-LIBC_CONFIG_VAR([have-as-vis3], [$libc_cv_sparc_as_vis3])
-
# Check for a GCC emitting GOTDATA relocations.
AC_CACHE_CHECK(for sparc gcc GOTDATA reloc support, libc_cv_sparc_gcc_gotdata, [dnl
changequote(,)dnl
diff --git a/sysdeps/sparc/sparc-ifunc.h b/sysdeps/sparc/sparc-ifunc.h
index 044fe36..54420d8 100644
--- a/sysdeps/sparc/sparc-ifunc.h
+++ b/sysdeps/sparc/sparc-ifunc.h
@@ -137,8 +137,6 @@ END (__##name)
SPARC_ASM_IFUNC1(name, HWCAP_SPARC_VIS2, \
__##name##_vis2, __##name##_generic)
-# ifdef HAVE_AS_VIS3_SUPPORT
-
#define SPARC_ASM_VIS3_IFUNC(name) \
SPARC_ASM_IFUNC1(name, HWCAP_SPARC_VIS3, \
__##name##_vis3, __##name##_generic)
@@ -149,17 +147,6 @@ END (__##name)
HWCAP_SPARC_VIS2, \
__##name##_vis2, __##name##_generic)
-# else /* HAVE_AS_VIS3_SUPPORT */
-
-#define SPARC_ASM_VIS3_IFUNC(name) \
- SPARC_ASM_IFUNC_DFLT(name, __##name##_generic)
-
-#define SPARC_ASM_VIS3_VIS2_IFUNC(name) \
- SPARC_ASM_VIS2_IFUNC(name)
-
-# endif /* HAVE_AS_VIS3_SUPPORT */
-
-
#else /* __ASSEMBLER__ */
# define INIT_ARCH()
diff --git a/sysdeps/sparc/sparc32/sparcv9/Makefile b/sysdeps/sparc/sparc32/sparcv9/Makefile
index 526673e..45507ea 100644
--- a/sysdeps/sparc/sparc32/sparcv9/Makefile
+++ b/sysdeps/sparc/sparc32/sparcv9/Makefile
@@ -1,16 +1,9 @@
sysdep-CFLAGS += -mcpu=ultrasparc -Wa,-Av9a -mvis
-ifeq ($(have-as-vis3),yes)
ASFLAGS-.o += -Wa,-Av9d
ASFLAGS-.os += -Wa,-Av9d
ASFLAGS-.op += -Wa,-Av9d
ASFLAGS-.oS += -Wa,-Av9d
-else
-ASFLAGS-.o += -Wa,-Av9a
-ASFLAGS-.os += -Wa,-Av9a
-ASFLAGS-.op += -Wa,-Av9a
-ASFLAGS-.oS += -Wa,-Av9a
-endif
# nscd uses atomic_spin_nop which in turn requires cpu_relax
ifeq ($(subdir),nscd)
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
index 2a2d374..62bf6f1 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
@@ -1,13 +1,13 @@
ifeq ($(subdir),math)
-ifeq ($(have-as-vis3),yes)
libm-sysdep_routines += m_copysignf-vis3 m_copysign-vis3 s_fabs-vis3 \
s_fabsf-vis3 s_llrintf-vis3 s_llrint-vis3 \
s_rintf-vis3 s_rint-vis3 \
- s_fmaf-vis3 s_fma-vis3 s_nearbyint-vis3 \
- s_nearbyintf-vis3 s_fdimf-vis3 s_fdim-vis3
+ s_fmaf-vis3 s_fma-vis3 s_fma-generic s_fmaf-generic \
+ s_nearbyint-vis3 s_nearbyintf-vis3 \
+ s_fdimf-vis3 s_fdim-vis3 s_fdim-generic \
+ s_fdimf-generic
sysdep_routines += s_copysignf-vis3 s_copysign-vis3
CFLAGS-s_fdimf-vis3.c += -Wa,-Av9d -mvis3
CFLAGS-s_fdim-vis3.c += -Wa,-Av9d -mvis3
endif
-endif
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim-generic.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim-generic.c
new file mode 100644
index 0000000..30ee54b
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim-generic.c
@@ -0,0 +1,4 @@
+#define __fdim __fdim_generic
+#define declare_mgen_alias(t, f)
+
+#include <math/s_fdim.c>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim.c
index ff3acd4..fe483f6 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim.c
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim.c
@@ -16,23 +16,16 @@
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
-#ifdef HAVE_AS_VIS3_SUPPORT
-# include <math_ldbl_opt.h>
-# include <first-versions.h>
-# include <sparc-ifunc.h>
-# include <math.h>
+#include <math_ldbl_opt.h>
+#include <first-versions.h>
+#include <sparc-ifunc.h>
+#include <math.h>
extern double __fdim_vis3 (double, double);
extern double __fdim_generic (double, double);
sparc_libm_ifunc(__fdim, hwcap & HWCAP_SPARC_VIS3 ? __fdim_vis3 : __fdim_generic);
weak_alias (__fdim, fdim)
-# if LONG_DOUBLE_COMPAT (libm, FIRST_VERSION_libm_fdiml)
+#if LONG_DOUBLE_COMPAT (libm, FIRST_VERSION_libm_fdiml)
compat_symbol (libm, __fdim, fdiml, FIRST_VERSION_libm_fdiml);
-# endif
-
-# define __fdim __fdim_generic
-# define declare_mgen_alias(t, f)
#endif
-
-#include <math/s_fdim.c>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf-generic.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf-generic.c
new file mode 100644
index 0000000..17090b5
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf-generic.c
@@ -0,0 +1,3 @@
+#define __fdimf __fdimf_generic
+#define declare_mgen_alias(t, f)
+#include <math/s_fdimf.c>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf.c
index cf1dc9e..ced4593 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf.c
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf.c
@@ -16,19 +16,11 @@
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
-#ifdef HAVE_AS_VIS3_SUPPORT
-# include <sparc-ifunc.h>
-# include <math.h>
+#include <sparc-ifunc.h>
+#include <math.h>
extern float __fdimf_vis3 (float, float);
extern float __fdimf_generic (float, float);
sparc_libm_ifunc(__fdimf, hwcap & HWCAP_SPARC_VIS3 ? __fdimf_vis3 : __fdimf_generic);
weak_alias (__fdimf, fdimf)
-
-# define __fdimf __fdimf_generic
-# define declare_mgen_alias(t, f)
-
-#endif
-
-#include <math/s_fdimf.c>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma-generic.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma-generic.c
new file mode 100644
index 0000000..e40816f
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma-generic.c
@@ -0,0 +1,2 @@
+#define __fma __fma_generic
+#include <sysdeps/ieee754/dbl-64/s_fma.c>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma.c
index 05113c3..3d0c165 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma.c
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma.c
@@ -1,7 +1,6 @@
-#ifdef HAVE_AS_VIS3_SUPPORT
-# include <sparc-ifunc.h>
-# include <math.h>
-# include <math_ldbl_opt.h>
+#include <sparc-ifunc.h>
+#include <math.h>
+#include <math_ldbl_opt.h>
extern double __fma_vis3 (double, double, double);
extern double __fma_generic (double, double, double);
@@ -11,8 +10,3 @@ weak_alias (__fma, fma)
#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_1)
compat_symbol (libm, __fma, fmal, GLIBC_2_1);
#endif
-
-# define __fma __fma_generic
-#endif
-
-#include <sysdeps/ieee754/dbl-64/s_fma.c>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf-generic.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf-generic.c
new file mode 100644
index 0000000..218eeb3
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf-generic.c
@@ -0,0 +1,2 @@
+#define __fmaf __fmaf_generic
+#include <sysdeps/ieee754/dbl-64/s_fmaf.c>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf.c
index 7a273a3..5357b47 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf.c
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf.c
@@ -1,14 +1,8 @@
-#ifdef HAVE_AS_VIS3_SUPPORT
-# include <sparc-ifunc.h>
-# include <math.h>
+#include <sparc-ifunc.h>
+#include <math.h>
extern float __fmaf_vis3 (float, float, float);
extern float __fmaf_generic (float, float, float);
sparc_libm_ifunc(__fmaf, hwcap & HWCAP_SPARC_FMAF ? __fmaf_vis3 : __fmaf_generic);
weak_alias (__fmaf, fmaf)
-
-# define __fmaf __fmaf_generic
-#endif
-
-#include <sysdeps/ieee754/dbl-64/s_fmaf.c>
diff --git a/sysdeps/sparc/sparc64/Makefile b/sysdeps/sparc/sparc64/Makefile
index a5e4036..0963a55 100644
--- a/sysdeps/sparc/sparc64/Makefile
+++ b/sysdeps/sparc/sparc64/Makefile
@@ -4,12 +4,10 @@ ifeq ($(subdir),string)
sysdep_routines += align-cpy
endif
-ifeq ($(have-as-vis3),yes)
ASFLAGS-.o += -Wa,-Av9d
ASFLAGS-.os += -Wa,-Av9d
ASFLAGS-.op += -Wa,-Av9d
ASFLAGS-.oS += -Wa,-Av9d
-endif
# nscd uses atomic_spin_nop which in turn requires cpu_relax
ifeq ($(subdir),nscd)
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
index 03a271d..2ac4496 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
@@ -1,13 +1,14 @@
ifeq ($(subdir),math)
-ifeq ($(have-as-vis3),yes)
libm-sysdep_routines += m_signbitf-vis3 m_signbit-vis3 m_finitef-vis3 \
m_finite-vis3 m_isinff-vis3 m_isinf-vis3 \
m_isnanf-vis3 m_isnan-vis3 s_lrintf-vis3 \
s_lrint-vis3 s_rintf-vis3 s_rint-vis3 \
- s_fmaf-vis3 s_fma-vis3 \
+ s_fmaf-vis3 s_fma-vis3 s_fmaf-generic s_fma-generic \
s_nearbyint-vis3 s_nearbyintf-vis3 \
- s_ceilf-vis3 s_ceil-vis3 s_floorf-vis3 \
- s_floor-vis3 s_truncf-vis3 s_trunc-vis3
+ s_ceilf-vis3 s_ceil-vis3 s_ceilf-generic \
+ s_ceil-generic s_floorf-vis3 s_floor-vis3 \
+ s_floorf-generic s_floor-generic s_truncf-vis3 \
+ s_trunc-vis3 s_truncf-generic s_trunc-generic
sysdep_routines += s_signbitf-vis3 s_signbit-vis3 s_finitef-vis3 \
s_finite-vis3 s_isinff-vis3 s_isinf-vis3 \
s_isnanf-vis3 s_isnan-vis3
@@ -19,4 +20,3 @@ CFLAGS-s_floor-vis3.c += -Wa,-Av9d -mvis3
CFLAGS-s_truncf-vis3.c += -Wa,-Av9d -mvis3
CFLAGS-s_trunc-vis3.c += -Wa,-Av9d -mvis3
endif
-endif
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-generic.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-generic.c
new file mode 100644
index 0000000..febea74
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-generic.c
@@ -0,0 +1,2 @@
+#define __ceil __ceil_generic
+#include <sysdeps/ieee754/dbl-64/wordsize-64/s_ceil.c>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil.c
index efa05e9..cfd5396 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil.c
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil.c
@@ -16,17 +16,14 @@
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
-#ifdef HAVE_AS_VIS3_SUPPORT
-# include <sparc-ifunc.h>
-# include <math.h>
+#include <sparc-ifunc.h>
+#include <math.h>
-extern double __ceil_vis3 (double);
-extern double __ceil_generic (double);
+extern __typeof (ceil) __ceil_vis3 attribute_hidden;
+extern __typeof (ceil) __ceil_generic attribute_hidden;
-sparc_libm_ifunc(__ceil, hwcap & HWCAP_SPARC_VIS3 ? __ceil_vis3 : __ceil_generic);
+sparc_libm_ifunc (__ceil,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __ceil_vis3
+ : __ceil_generic)
weak_alias (__ceil, ceil)
-
-# define __ceil __ceil_generic
-#endif
-
-#include <sysdeps/ieee754/dbl-64/wordsize-64/s_ceil.c>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-generic.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-generic.c
new file mode 100644
index 0000000..ce75035
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-generic.c
@@ -0,0 +1,2 @@
+#define __ceilf __ceilf_generic
+#include <sysdeps/ieee754/flt-32/s_ceilf.c>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf.c
index 62ada7f..81897b5 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf.c
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf.c
@@ -16,17 +16,14 @@
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
-#ifdef HAVE_AS_VIS3_SUPPORT
-# include <sparc-ifunc.h>
-# include <math.h>
+#include <sparc-ifunc.h>
+#include <math.h>
-extern float __ceilf_vis3 (float);
-extern float __ceilf_generic (float);
+extern __typeof (ceilf) __ceilf_vis3 attribute_hidden;
+extern __typeof (ceilf) __ceilf_generic attribute_hidden;
-sparc_libm_ifunc(__ceilf, hwcap & HWCAP_SPARC_VIS3 ? __ceilf_vis3 : __ceilf_generic);
+sparc_libm_ifunc (__ceilf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __ceilf_vis3
+ : __ceilf_generic);
weak_alias (__ceilf, ceilf)
-
-# define __ceilf __ceilf_generic
-#endif
-
-#include <sysdeps/ieee754/flt-32/s_ceilf.c>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_floor-generic.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_floor-generic.c
new file mode 100644
index 0000000..0f3361a
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_floor-generic.c
@@ -0,0 +1,2 @@
+#define __floor __floor_generic
+#include <sysdeps/ieee754/dbl-64/wordsize-64/s_floor.c>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_floor.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_floor.c
index d097f68..9d71158 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_floor.c
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_floor.c
@@ -16,17 +16,14 @@
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
-#ifdef HAVE_AS_VIS3_SUPPORT
-# include <sparc-ifunc.h>
-# include <math.h>
+#include <sparc-ifunc.h>
+#include <math.h>
-extern double __floor_vis3 (double);
-extern double __floor_generic (double);
+extern __typeof (floor) __floor_vis3 attribute_hidden;
+extern __typeof (floor) __floor_generic attribute_hidden;
-sparc_libm_ifunc(__floor, hwcap & HWCAP_SPARC_VIS3 ? __floor_vis3 : __floor_generic);
+sparc_libm_ifunc (__floor,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __floor_vis3
+ : __floor_generic);
weak_alias (__floor, floor)
-
-# define __floor __floor_generic
-#endif
-
-#include <sysdeps/ieee754/dbl-64/wordsize-64/s_floor.c>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-generic.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-generic.c
new file mode 100644
index 0000000..28c377b
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-generic.c
@@ -0,0 +1,2 @@
+#define __floorf __floorf_generic
+#include <sysdeps/ieee754/flt-32/s_floorf.c>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf.c
index 2a6c710..09d0a45 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf.c
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf.c
@@ -16,17 +16,14 @@
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
-#ifdef HAVE_AS_VIS3_SUPPORT
-# include <sparc-ifunc.h>
-# include <math.h>
+#include <sparc-ifunc.h>
+#include <math.h>
-extern float __floorf_vis3 (float);
-extern float __floorf_generic (float);
+extern __typeof (floorf) __floorf_vis3 attribute_hidden;
+extern __typeof (floorf) __floorf_generic attribute_hidden;
-sparc_libm_ifunc(__floorf, hwcap & HWCAP_SPARC_VIS3 ? __floorf_vis3 : __floorf_generic);
+sparc_libm_ifunc (__floorf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __floorf_vis3
+ : __floorf_generic);
weak_alias (__floorf, floorf)
-
-# define __floorf __floorf_generic
-#endif
-
-#include <sysdeps/ieee754/flt-32/s_floorf.c>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_fma-generic.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_fma-generic.c
new file mode 100644
index 0000000..e40816f
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_fma-generic.c
@@ -0,0 +1,2 @@
+#define __fma __fma_generic
+#include <sysdeps/ieee754/dbl-64/s_fma.c>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_fma.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_fma.c
index 3f2f162..1b2701c 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_fma.c
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_fma.c
@@ -1,14 +1,11 @@
-#ifdef HAVE_AS_VIS3_SUPPORT
-# include <sparc-ifunc.h>
-# include <math.h>
+#include <sparc-ifunc.h>
+#include <math.h>
-extern double __fma_vis3 (double, double, double);
-extern double __fma_generic (double, double, double);
+extern __typeof (fma) __fma_vis3 attribute_hidden;
+extern __typeof (fma) __fma_generic attribute_hidden;
-sparc_libm_ifunc(__fma, hwcap & HWCAP_SPARC_FMAF ? __fma_vis3 : __fma_generic);
+sparc_libm_ifunc (__fma,
+ hwcap & HWCAP_SPARC_FMAF
+ ? __fma_vis3
+ : __fma_generic);
weak_alias (__fma, fma)
-
-# define __fma __fma_generic
-#endif
-
-#include <sysdeps/ieee754/dbl-64/s_fma.c>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_fmaf-generic.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_fmaf-generic.c
new file mode 100644
index 0000000..218eeb3
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_fmaf-generic.c
@@ -0,0 +1,2 @@
+#define __fmaf __fmaf_generic
+#include <sysdeps/ieee754/dbl-64/s_fmaf.c>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_fmaf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_fmaf.c
index 7a273a3..dbed10e 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_fmaf.c
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_fmaf.c
@@ -1,14 +1,11 @@
-#ifdef HAVE_AS_VIS3_SUPPORT
-# include <sparc-ifunc.h>
-# include <math.h>
+#include <sparc-ifunc.h>
+#include <math.h>
-extern float __fmaf_vis3 (float, float, float);
-extern float __fmaf_generic (float, float, float);
+extern __typeof (fmaf) __fmaf_vis3 attribute_hidden;
+extern __typeof (fmaf) __fmaf_generic attribute_hidden;
-sparc_libm_ifunc(__fmaf, hwcap & HWCAP_SPARC_FMAF ? __fmaf_vis3 : __fmaf_generic);
+sparc_libm_ifunc (__fmaf,
+ hwcap & HWCAP_SPARC_FMAF
+ ? __fmaf_vis3
+ : __fmaf_generic)
weak_alias (__fmaf, fmaf)
-
-# define __fmaf __fmaf_generic
-#endif
-
-#include <sysdeps/ieee754/dbl-64/s_fmaf.c>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc-generic.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc-generic.c
new file mode 100644
index 0000000..00abd2a
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc-generic.c
@@ -0,0 +1,2 @@
+#define __trunc __trunc_generic
+#include <sysdeps/ieee754/dbl-64/wordsize-64/s_trunc.c>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.c
index dc67f42..3fd9cc0 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.c
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.c
@@ -16,17 +16,14 @@
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
-#ifdef HAVE_AS_VIS3_SUPPORT
-# include <sparc-ifunc.h>
-# include <math.h>
+#include <sparc-ifunc.h>
+#include <math.h>
-extern double __trunc_vis3 (double);
-extern double __trunc_generic (double);
+extern __typeof (trunc) __trunc_vis3 attribute_hidden;
+extern __typeof (trunc) __trunc_generic attribute_hidden;
-sparc_libm_ifunc(__trunc, hwcap & HWCAP_SPARC_VIS3 ? __trunc_vis3 : __trunc_generic);
+sparc_libm_ifunc (__trunc,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __trunc_vis3
+ : __trunc_generic);
weak_alias (__trunc, trunc)
-
-# define __trunc __trunc_generic
-#endif
-
-#include <sysdeps/ieee754/dbl-64/wordsize-64/s_trunc.c>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf-generic.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf-generic.c
new file mode 100644
index 0000000..7e5d91e
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf-generic.c
@@ -0,0 +1,2 @@
+#define __truncf __truncf_generic
+#include <sysdeps/ieee754/flt-32/s_truncf.c>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.c
index 980a313..3c1fa36 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.c
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.c
@@ -16,17 +16,14 @@
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
-#ifdef HAVE_AS_VIS3_SUPPORT
-# include <sparc-ifunc.h>
-# include <math.h>
+#include <sparc-ifunc.h>
+#include <math.h>
-extern float __truncf_vis3 (float);
-extern float __truncf_generic (float);
+extern __typeof (truncf) __truncf_vis3 attribute_hidden;
+extern __typeof (truncf) __truncf_generic attribute_hidden;
-sparc_libm_ifunc(__truncf, hwcap & HWCAP_SPARC_VIS3 ? __truncf_vis3 : __truncf_generic);
+sparc_libm_ifunc (__truncf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __truncf_vis3
+ : __truncf_generic)
weak_alias (__truncf, truncf)
-
-# define __truncf __truncf_generic
-#endif
-
-#include <sysdeps/ieee754/flt-32/s_truncf.c>
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=f647fa43a33fe8e08a36253cb227780b919c7c2d
commit f647fa43a33fe8e08a36253cb227780b919c7c2d
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Tue Oct 3 10:58:29 2017 -0300
sparc: Implement memset/bzero ifunc selection in C
This patch refactor the SPARC64 ifunc selector to a C implementation.
No functional change is expected, including ifunc resolution rules.
Checked on sparc64-linux-gnu, sparcv9-linux-gnu and x86_64-linux-gnu.
* sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
[$(subdir) = string] (sysdep_routines): Add memset-ultra1.
* sysdeps/sparc/sparc64/multiarch/Makefile [$(subdir) = string]
(sysdep_routines): Add memset-ultra1.
* sysdeps/sparc/sparc32/sparcv9/multiarch/memset-ultra1.S: New
file.
* sysdeps/sparc/sparc32/sparcv9/multiarch/memset.c: Likewise.
* sysdeps/sparc/sparc64/multiarch/ifunc-memset.h: Likewise.
* sysdeps/sparc/sparc64/multiarch/memset-ultra1.S: Likewise.
* sysdeps/sparc/sparc64/multiarch/memset.c: Likewise.
* sysdeps/sparc/sparc32/sparcv9/multiarch/memset.S: Remove file.
* sysdeps/sparc/sparc64/multiarch/memset.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 9101b8f..8e60fb7 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,18 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
+ [$(subdir) = string] (sysdep_routines): Add memset-ultra1.
+ * sysdeps/sparc/sparc64/multiarch/Makefile [$(subdir) = string]
+ (sysdep_routines): Add memset-ultra1.
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/memset-ultra1.S: New
+ file.
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/memset.c: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/ifunc-memset.h: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/memset-ultra1.S: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/memset.c: Likewise.
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/memset.S: Remove file.
+ * sysdeps/sparc/sparc64/multiarch/memset.S: Likewise.
+
* sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-ultra1.S: New
file.
* sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.c: Likewise.
diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
index ca44798..e12636b 100644
--- a/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
+++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
@@ -9,5 +9,5 @@ endif
ifeq ($(subdir),string)
sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \
memset-niagara1 memcpy-niagara4 memset-niagara4 \
- memcpy-ultra1
+ memcpy-ultra1 memset-ultra1
endif
diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/memset-ultra1.S b/sysdeps/sparc/sparc32/sparcv9/multiarch/memset-ultra1.S
new file mode 100644
index 0000000..0cb71a9
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/memset-ultra1.S
@@ -0,0 +1,30 @@
+/* Default SPARC64 memset implementation.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#if IS_IN (libc)
+# include <sysdep.h>
+
+# undef libc_hidden_builtin_def
+# define libc_hidden_builtin_def(name)
+# undef weak_alias
+# define weak_alias(x, y)
+
+# define memset __memset_ultra1
+# define __bzero __bzero_ultra1
+#include <sysdeps/sparc/sparc32/sparcv9/memset.S>
+#endif
diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/memset.S b/sysdeps/sparc/sparc32/sparcv9/multiarch/memset.S
deleted file mode 100644
index 8f82643..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/multiarch/memset.S
+++ /dev/null
@@ -1,4 +0,0 @@
-#define ASI_PNF 0x82
-#define ASI_BLK_P 0xf0
-#define XCC icc
-#include <sparc64/multiarch/memset.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/memset.c b/sysdeps/sparc/sparc32/sparcv9/multiarch/memset.c
new file mode 100644
index 0000000..a6c5734
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/memset.c
@@ -0,0 +1 @@
+#include <sysdeps/sparc/sparc64/multiarch/memset.c>
diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile
index 4e52526..6e90cba 100644
--- a/sysdeps/sparc/sparc64/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/multiarch/Makefile
@@ -9,7 +9,7 @@ endif
ifeq ($(subdir),string)
sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \
memset-niagara1 memcpy-niagara4 memset-niagara4 \
- memcpy-ultra1
+ memcpy-ultra1 memset-ultra1
endif
ifeq ($(subdir),stdlib)
diff --git a/sysdeps/sparc/sparc64/multiarch/ifunc-memset.h b/sysdeps/sparc/sparc64/multiarch/ifunc-memset.h
new file mode 100644
index 0000000..f3b9293
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/ifunc-memset.h
@@ -0,0 +1,34 @@
+/* Common definition for memset/bzero implementation.
+ All versions must be listed in ifunc-impl-list.c.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <ifunc-init.h>
+
+extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara4) attribute_hidden;
+extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara1) attribute_hidden;
+extern __typeof (REDIRECT_NAME) OPTIMIZE (ultra1) attribute_hidden;
+
+static inline void *
+IFUNC_SELECTOR (int hwcap)
+{
+ if (hwcap & HWCAP_SPARC_CRYPTO)
+ return OPTIMIZE (niagara4);
+ if (hwcap & HWCAP_SPARC_BLKINIT)
+ return OPTIMIZE (niagara1);
+ return OPTIMIZE (ultra1);
+}
diff --git a/sysdeps/sparc/sparc64/multiarch/memset-ultra1.S b/sysdeps/sparc/sparc64/multiarch/memset-ultra1.S
new file mode 100644
index 0000000..e85da41
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/memset-ultra1.S
@@ -0,0 +1,31 @@
+/* Default SPARC64 memset implementation.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#if IS_IN (libc)
+# include <sysdep.h>
+
+# undef libc_hidden_builtin_def
+# define libc_hidden_builtin_def(name)
+# undef weak_alias
+# define weak_alias(x, y)
+
+# define memset __memset_ultra1
+# define __bzero __bzero_ultra1
+
+#include <sysdeps/sparc/sparc64/memset.S>
+#endif
diff --git a/sysdeps/sparc/sparc64/multiarch/memset.S b/sysdeps/sparc/sparc64/multiarch/memset.S
deleted file mode 100644
index 9469d5e..0000000
--- a/sysdeps/sparc/sparc64/multiarch/memset.S
+++ /dev/null
@@ -1,124 +0,0 @@
-/* Multiple versions of memset and bzero
- All versions must be listed in ifunc-impl-list.c.
- Copyright (C) 2010-2017 Free Software Foundation, Inc.
- Contributed by David S. Miller (davem@davemloft.net)
- This file is part of the GNU C Library.
-
- The GNU C Library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Lesser General Public
- License as published by the Free Software Foundation; either
- version 2.1 of the License, or (at your option) any later version.
-
- The GNU C Library is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Lesser General Public License for more details.
-
- You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library; if not, see
- <http://www.gnu.org/licenses/>. */
-
-#include <sysdep.h>
-
-#if IS_IN (libc)
- .text
-ENTRY(memset)
- .type memset, @gnu_indirect_function
-# ifdef SHARED
- SETUP_PIC_REG_LEAF(o3, o5)
-# endif
- set HWCAP_SPARC_CRYPTO, %o1
- andcc %o0, %o1, %g0
- be 1f
- andcc %o0, HWCAP_SPARC_BLKINIT, %g0
-# ifdef SHARED
- sethi %gdop_hix22(__memset_niagara4), %o1
- xor %o1, %gdop_lox10(__memset_niagara4), %o1
-# else
- set __memset_niagara4, %o1
-# endif
- ba 10f
- nop
-1: be 9f
- nop
-# ifdef SHARED
- sethi %gdop_hix22(__memset_niagara1), %o1
- xor %o1, %gdop_lox10(__memset_niagara1), %o1
-# else
- set __memset_niagara1, %o1
-# endif
- ba 10f
- nop
-9:
-# ifdef SHARED
- sethi %gdop_hix22(__memset_ultra1), %o1
- xor %o1, %gdop_lox10(__memset_ultra1), %o1
-# else
- set __memset_ultra1, %o1
-# endif
-10:
-# ifdef SHARED
- add %o3, %o1, %o1
-# endif
- retl
- mov %o1, %o0
-END(memset)
-
-ENTRY(__bzero)
- .type bzero, @gnu_indirect_function
-# ifdef SHARED
- SETUP_PIC_REG_LEAF(o3, o5)
-# endif
- set HWCAP_SPARC_CRYPTO, %o1
- andcc %o0, %o1, %g0
- be 1f
- andcc %o0, HWCAP_SPARC_BLKINIT, %g0
-# ifdef SHARED
- sethi %gdop_hix22(__bzero_niagara4), %o1
- xor %o1, %gdop_lox10(__bzero_niagara4), %o1
-# else
- set __bzero_niagara4, %o1
-# endif
- ba 10f
- nop
-1: be 9f
- nop
-# ifdef SHARED
- sethi %gdop_hix22(__bzero_niagara1), %o1
- xor %o1, %gdop_lox10(__bzero_niagara1), %o1
-# else
- set __bzero_niagara1, %o1
-# endif
- ba 10f
- nop
-9:
-# ifdef SHARED
- sethi %gdop_hix22(__bzero_ultra1), %o1
- xor %o1, %gdop_lox10(__bzero_ultra1), %o1
-# else
- set __bzero_ultra1, %o1
-# endif
-10:
-# ifdef SHARED
- add %o3, %o1, %o1
-# endif
- retl
- mov %o1, %o0
-END(__bzero)
-
-weak_alias (__bzero, bzero)
-
-# undef weak_alias
-# define weak_alias(a, b)
-
-libc_hidden_builtin_def (memset)
-
-#undef libc_hidden_builtin_def
-#define libc_hidden_builtin_def(name)
-
-#define memset __memset_ultra1
-#define __bzero __bzero_ultra1
-
-#endif
-
-#include "../memset.S"
diff --git a/sysdeps/sparc/sparc64/multiarch/memset.c b/sysdeps/sparc/sparc64/multiarch/memset.c
new file mode 100644
index 0000000..c07d8e2
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/memset.c
@@ -0,0 +1,42 @@
+/* Multiple versions of memset.
+ All versions must be listed in ifunc-impl-list.c.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#if IS_IN (libc)
+# define memset __redirect_memset
+# define bzero __redirect_bzero
+# include <string.h>
+# undef memset
+# undef bzero
+
+# include <sparc-ifunc.h>
+
+# define SYMBOL_NAME memset
+# include "ifunc-memset.h"
+
+sparc_libc_ifunc_redirected (__redirect_memset, memset, IFUNC_SELECTOR)
+sparc_ifunc_redirected_hidden_def (__redirect_memset, memset)
+
+# undef SYMBOL_NAME
+# define SYMBOL_NAME bzero
+# include "ifunc-memset.h"
+
+sparc_libc_ifunc_redirected (__redirect_bzero, __bzero, IFUNC_SELECTOR)
+weak_alias (__bzero, bzero)
+
+#endif
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=350a1e0224e84c620d861be5dde5330cc0299f3b
commit 350a1e0224e84c620d861be5dde5330cc0299f3b
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Tue Oct 3 00:48:27 2017 -0300
sparc: Implement memcpy/mempcpy ifunc selection in C
This patch refactor the SPARC64 ifunc selector to a C implementation.
The x86_64 implementation is used as default, which resulted in common
definitions (ifunc-init.h) used on both architectures. No functional
change is expected, including ifunc resolution rules.
Checked on sparc64-linux-gnu, sparcv9-linux-gnu and x86_64-linux-gnu.
* sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-ultra1.S: New
file.
* sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.c: Likewise.
* sysdeps/sparc/sparc32/sparcv9/multiarch/mempcpy.c: Likewise.
* sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-mempcpy.S: Likewise.
* sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h: Likewise.
* sysdeps/sparc/sparc64/multiarch/memcpy-ultra1.S: Likewise.
* sysdeps/sparc/sparc64/multiarch/memcpy.c: Likewise.
* sysdeps/sparc/sparc64/multiarch/mempcpy.c: Likewise.
* sysdeps/sparc/sparc64/multiarch/rtld-mempcpy.S: Likewise.
* sysdeps/sparc/sparc-ifunc.h (sparc_libc_ifunc_redirected): New
macro.
* sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
[$(subdir) = string] (sysdep_routines): Add memcpy-ultra1.
* sysdeps/sparc/sparc64/multiarch/Makefile [$(subdir) = string]
(sysdep_routines): Add memcpy-ultra1.
* sysdeps/sparc/sparc64/multiarch/memcpy.S: Remove file.
* sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 2726db2..9101b8f 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,24 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-ultra1.S: New
+ file.
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.c: Likewise.
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/mempcpy.c: Likewise.
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-mempcpy.S: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/memcpy-ultra1.S: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/memcpy.c: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/mempcpy.c: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/rtld-mempcpy.S: Likewise.
+ * sysdeps/sparc/sparc-ifunc.h (sparc_libc_ifunc_redirected): New
+ macro.
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
+ [$(subdir) = string] (sysdep_routines): Add memcpy-ultra1.
+ * sysdeps/sparc/sparc64/multiarch/Makefile [$(subdir) = string]
+ (sysdep_routines): Add memcpy-ultra1.
+ * sysdeps/sparc/sparc64/multiarch/memcpy.S: Remove file.
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.S: Likewise.
+
* sysdeps/arm/armv7/multiarch/Makefile [$(subdir) = string]
(sysdeps_routines): Add memchr_noneon.
* sysdeps/arm/armv7/multiarch/ifunc-memchr.h: New file.
diff --git a/sysdeps/sparc/sparc-ifunc.h b/sysdeps/sparc/sparc-ifunc.h
index 4b1ea00..044fe36 100644
--- a/sysdeps/sparc/sparc-ifunc.h
+++ b/sysdeps/sparc/sparc-ifunc.h
@@ -161,10 +161,23 @@ END (__##name)
#else /* __ASSEMBLER__ */
+# define INIT_ARCH()
+
+# define sparc_libc_ifunc_redirected(redirected_name, name, expr) \
+ __ifunc (redirected_name, name, expr(hwcap), int hwcap, INIT_ARCH)
# define sparc_libm_ifunc(name, expr) \
__ifunc (name, name, expr, int hwcap, libm_ifunc_init)
# define sparc_libc_ifunc(name, expr) sparc_libm_ifunc (name, expr)
+/* It essentially does libc_hidden_builtin_def (name) and redirect
+ the internal redirected symbol to ifunc implementation. */
+# if defined SHARED
+# define sparc_ifunc_redirected_hidden_def(redirect_name, name) \
+ __hidden_ver1 (name, __GI_##name, redirect_name) \
+ __attribute__ ((visibility ("hidden")));
+# else
+# define sparc_ifunc_redirected_hidden_def(redirect_name, name)
+# endif
#endif /* __ASSEMBLER__ */
diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
index 4ad7aff..ca44798 100644
--- a/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
+++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
@@ -8,5 +8,6 @@ endif
ifeq ($(subdir),string)
sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \
- memset-niagara1 memcpy-niagara4 memset-niagara4
+ memset-niagara1 memcpy-niagara4 memset-niagara4 \
+ memcpy-ultra1
endif
diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-ultra1.S b/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-ultra1.S
new file mode 100644
index 0000000..ac0e7aa
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-ultra1.S
@@ -0,0 +1,32 @@
+/* Default SPARC32 memcpy implementation.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#if IS_IN (libc)
+# include <sysdep.h>
+
+# undef libc_hidden_builtin_def
+# define libc_hidden_builtin_def(name)
+# undef weak_alias
+# define weak_alias(x, y)
+# undef libc_hidden_def
+# define libc_hidden_def(name)
+
+# define memcpy __memcpy_ultra1
+# define __mempcpy __mempcpy_ultra1
+# include <sysdeps/sparc/sparc32/sparcv9/memcpy.S>
+#endif
diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.S b/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.S
deleted file mode 100644
index 14df91e..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.S
+++ /dev/null
@@ -1,4 +0,0 @@
-#define ASI_PNF 0x82
-#define ASI_BLK_P 0xf0
-#define XCC icc
-#include <sparc64/multiarch/memcpy.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.c b/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.c
new file mode 100644
index 0000000..369acac
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.c
@@ -0,0 +1 @@
+#include <sysdeps/sparc/sparc64/multiarch/memcpy.c>
diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/mempcpy.c b/sysdeps/sparc/sparc32/sparcv9/multiarch/mempcpy.c
new file mode 100644
index 0000000..616a538
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/mempcpy.c
@@ -0,0 +1 @@
+#include <sysdeps/sparc/sparc64/multiarch/mempcpy.c>
diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-mempcpy.S b/sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-mempcpy.S
new file mode 100644
index 0000000..f18c9f9
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-mempcpy.S
@@ -0,0 +1 @@
+/* rtld-mempcpy is implemented by rtld-memcpy.S. */
diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile
index 55b757f..4e52526 100644
--- a/sysdeps/sparc/sparc64/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/multiarch/Makefile
@@ -8,7 +8,8 @@ endif
ifeq ($(subdir),string)
sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \
- memset-niagara1 memcpy-niagara4 memset-niagara4
+ memset-niagara1 memcpy-niagara4 memset-niagara4 \
+ memcpy-ultra1
endif
ifeq ($(subdir),stdlib)
diff --git a/sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h b/sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h
new file mode 100644
index 0000000..46f3795
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h
@@ -0,0 +1,40 @@
+/* Common definition for memcpy and mempcpy implementation.
+ All versions must be listed in ifunc-impl-list.c.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <ifunc-init.h>
+
+extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara4) attribute_hidden;
+extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara2) attribute_hidden;
+extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara1) attribute_hidden;
+extern __typeof (REDIRECT_NAME) OPTIMIZE (ultra3) attribute_hidden;
+extern __typeof (REDIRECT_NAME) OPTIMIZE (ultra1) attribute_hidden;
+
+static inline void *
+IFUNC_SELECTOR (int hwcap)
+{
+ if (hwcap & HWCAP_SPARC_CRYPTO)
+ return OPTIMIZE (niagara4);
+ if (hwcap & HWCAP_SPARC_N2)
+ return OPTIMIZE (niagara2);
+ if (hwcap & HWCAP_SPARC_BLKINIT)
+ return OPTIMIZE (niagara1);
+ if (hwcap & HWCAP_SPARC_ULTRA3)
+ return OPTIMIZE (ultra3);
+ return OPTIMIZE (ultra1);
+}
diff --git a/sysdeps/sparc/sparc64/multiarch/memcpy-ultra1.S b/sysdeps/sparc/sparc64/multiarch/memcpy-ultra1.S
new file mode 100644
index 0000000..fc392c5
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/memcpy-ultra1.S
@@ -0,0 +1,33 @@
+/* Default SPARC64 memcpy implementation.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#if IS_IN (libc)
+# include <sysdep.h>
+
+# undef libc_hidden_builtin_def
+# define libc_hidden_builtin_def(name)
+# undef weak_alias
+# define weak_alias(x, y)
+# undef libc_hidden_def
+# define libc_hidden_def(name)
+
+# define memcpy __memcpy_ultra1
+# define __mempcpy __mempcpy_ultra1
+
+#include <sysdeps/sparc/sparc64/memcpy.S>
+#endif
diff --git a/sysdeps/sparc/sparc64/multiarch/memcpy.S b/sysdeps/sparc/sparc64/multiarch/memcpy.S
deleted file mode 100644
index b6396ee..0000000
--- a/sysdeps/sparc/sparc64/multiarch/memcpy.S
+++ /dev/null
@@ -1,167 +0,0 @@
-/* Multiple versions of memcpy
- All versions must be listed in ifunc-impl-list.c.
- Copyright (C) 2010-2017 Free Software Foundation, Inc.
- Contributed by David S. Miller (davem@davemloft.net)
- This file is part of the GNU C Library.
-
- The GNU C Library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Lesser General Public
- License as published by the Free Software Foundation; either
- version 2.1 of the License, or (at your option) any later version.
-
- The GNU C Library is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Lesser General Public License for more details.
-
- You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library; if not, see
- <http://www.gnu.org/licenses/>. */
-
-#include <sysdep.h>
-
-#if IS_IN (libc)
- .text
-ENTRY(memcpy)
- .type memcpy, @gnu_indirect_function
-# ifdef SHARED
- SETUP_PIC_REG_LEAF(o3, o5)
-# endif
- set HWCAP_SPARC_CRYPTO, %o1
- andcc %o0, %o1, %g0
- be 1f
- andcc %o0, HWCAP_SPARC_N2, %g0
-# ifdef SHARED
- sethi %gdop_hix22(__memcpy_niagara4), %o1
- xor %o1, %gdop_lox10(__memcpy_niagara4), %o1
-# else
- set __memcpy_niagara4, %o1
-# endif
- ba 10f
- nop
-1: be 1f
- andcc %o0, HWCAP_SPARC_BLKINIT, %g0
-# ifdef SHARED
- sethi %gdop_hix22(__memcpy_niagara2), %o1
- xor %o1, %gdop_lox10(__memcpy_niagara2), %o1
-# else
- set __memcpy_niagara2, %o1
-# endif
- ba 10f
- nop
-1: be 1f
- andcc %o0, HWCAP_SPARC_ULTRA3, %g0
-# ifdef SHARED
- sethi %gdop_hix22(__memcpy_niagara1), %o1
- xor %o1, %gdop_lox10(__memcpy_niagara1), %o1
-# else
- set __memcpy_niagara1, %o1
-# endif
- ba 10f
- nop
-1: be 9f
- nop
-# ifdef SHARED
- sethi %gdop_hix22(__memcpy_ultra3), %o1
- xor %o1, %gdop_lox10(__memcpy_ultra3), %o1
-# else
- set __memcpy_ultra3, %o1
-# endif
- ba 10f
- nop
-9:
-# ifdef SHARED
- sethi %gdop_hix22(__memcpy_ultra1), %o1
- xor %o1, %gdop_lox10(__memcpy_ultra1), %o1
-# else
- set __memcpy_ultra1, %o1
-# endif
-10:
-# ifdef SHARED
- add %o3, %o1, %o1
-# endif
- retl
- mov %o1, %o0
-END(memcpy)
-
-ENTRY(__mempcpy)
- .type __mempcpy, @gnu_indirect_function
-# ifdef SHARED
- SETUP_PIC_REG_LEAF(o3, o5)
-# endif
- set HWCAP_SPARC_CRYPTO, %o1
- andcc %o0, %o1, %g0
- be 1f
- andcc %o0, HWCAP_SPARC_N2, %g0
-# ifdef SHARED
- sethi %gdop_hix22(__mempcpy_niagara4), %o1
- xor %o1, %gdop_lox10(__mempcpy_niagara4), %o1
-# else
- set __mempcpy_niagara4, %o1
-# endif
- ba 10f
- nop
-1: be 1f
- andcc %o0, HWCAP_SPARC_BLKINIT, %g0
-# ifdef SHARED
- sethi %gdop_hix22(__mempcpy_niagara2), %o1
- xor %o1, %gdop_lox10(__mempcpy_niagara2), %o1
-# else
- set __mempcpy_niagara2, %o1
-# endif
- ba 10f
- nop
-1: be 1f
- andcc %o0, HWCAP_SPARC_ULTRA3, %g0
-# ifdef SHARED
- sethi %gdop_hix22(__mempcpy_niagara1), %o1
- xor %o1, %gdop_lox10(__mempcpy_niagara1), %o1
-# else
- set __mempcpy_niagara1, %o1
-# endif
- ba 10f
- nop
-1: be 9f
- nop
-# ifdef SHARED
- sethi %gdop_hix22(__mempcpy_ultra3), %o1
- xor %o1, %gdop_lox10(__mempcpy_ultra3), %o1
-# else
- set __mempcpy_ultra3, %o1
-# endif
- ba 10f
- nop
-9:
-# ifdef SHARED
- sethi %gdop_hix22(__mempcpy_ultra1), %o1
- xor %o1, %gdop_lox10(__mempcpy_ultra1), %o1
-# else
- set __mempcpy_ultra1, %o1
-# endif
-10:
-# ifdef SHARED
- add %o3, %o1, %o1
-# endif
- retl
- mov %o1, %o0
-END(__mempcpy)
-
-libc_hidden_builtin_def (memcpy)
-
-libc_hidden_def (__mempcpy)
-weak_alias (__mempcpy, mempcpy)
-libc_hidden_builtin_def (mempcpy)
-
-#undef libc_hidden_builtin_def
-#define libc_hidden_builtin_def(name)
-#undef weak_alias
-#define weak_alias(x, y)
-#undef libc_hidden_def
-#define libc_hidden_def(name)
-
-#define memcpy __memcpy_ultra1
-#define __mempcpy __mempcpy_ultra1
-
-#endif
-
-#include "../memcpy.S"
diff --git a/sysdeps/sparc/sparc64/multiarch/memcpy.c b/sysdeps/sparc/sparc64/multiarch/memcpy.c
new file mode 100644
index 0000000..5510e15
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/memcpy.c
@@ -0,0 +1,33 @@
+/* Multiple versions of memcpy.
+ All versions must be listed in ifunc-impl-list.c.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#if IS_IN (libc)
+# define memcpy __redirect_memcpy
+# include <string.h>
+# undef memcpy
+
+# include <sparc-ifunc.h>
+
+# define SYMBOL_NAME memcpy
+# include "ifunc-memcpy.h"
+
+sparc_libc_ifunc_redirected (__redirect_memcpy, memcpy, IFUNC_SELECTOR)
+
+sparc_ifunc_redirected_hidden_def (__redirect_memcpy, memcpy)
+#endif
diff --git a/sysdeps/sparc/sparc64/multiarch/mempcpy.c b/sysdeps/sparc/sparc64/multiarch/mempcpy.c
new file mode 100644
index 0000000..8a4b2a1
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/mempcpy.c
@@ -0,0 +1,39 @@
+/* Multiple versions of memcpy
+ All versions must be listed in ifunc-impl-list.c.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#if IS_IN (libc)
+# define mempcpy __redirect_mempcpy
+# define __mempcpy __redirect___mempcpy
+# define NO_MEMPCPY_STPCPY_REDIRECT
+# define __NO_STRING_INLINES
+# include <string.h>
+# undef mempcpy
+# undef __mempcpy
+
+# include <sparc-ifunc.h>
+
+# define SYMBOL_NAME mempcpy
+# include "ifunc-memcpy.h"
+
+sparc_libc_ifunc_redirected (__redirect_mempcpy, __mempcpy, IFUNC_SELECTOR)
+
+sparc_ifunc_redirected_hidden_def (__redirect___mempcpy, __mempcpy)
+weak_alias (__mempcpy, mempcpy)
+sparc_ifunc_redirected_hidden_def (__redirect_mempcpy, mempcpy)
+#endif
diff --git a/sysdeps/sparc/sparc64/multiarch/rtld-mempcpy.S b/sysdeps/sparc/sparc64/multiarch/rtld-mempcpy.S
new file mode 100644
index 0000000..f18c9f9
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/rtld-mempcpy.S
@@ -0,0 +1 @@
+/* rtld-mempcpy is implemented by rtld-memcpy.S. */
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=87f1d57c6f60fd884d0ae63d80290794cd56aa68
commit 87f1d57c6f60fd884d0ae63d80290794cd56aa68
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 6 12:59:32 2017 -0300
arm: Implement memchr ifunc selection in C
This patch refactor ARM memchr ifunc selector to a C implementation.
No functional change is expected, including ifunc resolution rules.
It also reorganize the ifunc options code:
1. The memchr_impl.S is renamed to memchr_neon.S and multiple
compilation options (which route to armv6t2/memchr one) is
removed. The code to build if __ARM_NEON__ is defined is
also simplified.
2. A memchr_noneon is added (which as build along previous ifunc
resolution) and includes the armv6t2 direct.
3. Same as 2. for loader object.
Alongside the aforementioned changes, it also some cleanus:
- Internal memchr definition (__GI_memcpy) is now a hidden
symbol.
- No need to create hidden definition for the ifunc variants.
Checked on armv7-linux-gnueabihf and with a build for arm-linux-gnueabi,
arm-linux-gnueabihf with and without multiarch support and with both
GCC 7.1 and GCC mainline.
* sysdeps/arm/armv7/multiarch/Makefile [$(subdir) = string]
(sysdeps_routines): Add memchr_noneon.
* sysdeps/arm/armv7/multiarch/ifunc-memchr.h: New file.
* sysdeps/arm/armv7/multiarch/memchr_noneon.S: Likewise.
* sysdeps/arm/armv7/multiarch/rtld-memchr.S: Likewise.
* sysdeps/arm/armv7/multiarch/memchr.S: Remove file.
* sysdeps/arm/armv7/multiarch/memchr.c: New file.
* sysdeps/arm/armv7/multiarch/memchr_impl.S: Move to ...
* sysdeps/arm/armv7/multiarch/memchr_neon.S: ... here.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 0a72651..2726db2 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,15 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+ * sysdeps/arm/armv7/multiarch/Makefile [$(subdir) = string]
+ (sysdeps_routines): Add memchr_noneon.
+ * sysdeps/arm/armv7/multiarch/ifunc-memchr.h: New file.
+ * sysdeps/arm/armv7/multiarch/memchr_noneon.S: Likewise.
+ * sysdeps/arm/armv7/multiarch/rtld-memchr.S: Likewise.
+ * sysdeps/arm/armv7/multiarch/memchr.S: Remove file.
+ * sysdeps/arm/armv7/multiarch/memchr.c: New file.
+ * sysdeps/arm/armv7/multiarch/memchr_impl.S: Move to ...
+ * sysdeps/arm/armv7/multiarch/memchr_neon.S: ... here.
+
* sysdeps/arm/arm-ifunc.h: New file.
* sysdeps/arm/armv7/multiarch/ifunc-memcpy.h: Likewise.
* sysdeps/arm/armv7/multiarch/memcpy.c: Likewise.
diff --git a/sysdeps/arm/armv7/multiarch/Makefile b/sysdeps/arm/armv7/multiarch/Makefile
index 1e62ef9..6e5851f 100644
--- a/sysdeps/arm/armv7/multiarch/Makefile
+++ b/sysdeps/arm/armv7/multiarch/Makefile
@@ -1,3 +1,4 @@
ifeq ($(subdir),string)
-sysdep_routines += memcpy_neon memcpy_vfp memchr_neon memcpy_arm
+sysdep_routines += memcpy_neon memcpy_vfp memchr_neon memcpy_arm \
+ memchr_noneon
endif
diff --git a/sysdeps/arm/armv7/multiarch/ifunc-memchr.h b/sysdeps/arm/armv7/multiarch/ifunc-memchr.h
new file mode 100644
index 0000000..42f89fa
--- /dev/null
+++ b/sysdeps/arm/armv7/multiarch/ifunc-memchr.h
@@ -0,0 +1,28 @@
+/* Common definition for memchr resolver.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+__typeof (REDIRECT_NAME) OPTIMIZE (neon) attribute_hidden;
+__typeof (REDIRECT_NAME) OPTIMIZE (noneon) attribute_hidden;
+
+static inline void *
+IFUNC_SELECTOR (int hwcap)
+{
+ if (hwcap & HWCAP_ARM_NEON)
+ return OPTIMIZE (neon);
+ return OPTIMIZE (noneon);
+}
diff --git a/sysdeps/arm/armv7/multiarch/memchr.S b/sysdeps/arm/armv7/multiarch/memchr.S
deleted file mode 100644
index 8e8097a..0000000
--- a/sysdeps/arm/armv7/multiarch/memchr.S
+++ /dev/null
@@ -1,59 +0,0 @@
-/* Multiple versions of memchr
- All versions must be listed in ifunc-impl-list.c.
- Copyright (C) 2013-2017 Free Software Foundation, Inc.
- This file is part of the GNU C Library.
-
- The GNU C Library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Lesser General Public
- License as published by the Free Software Foundation; either
- version 2.1 of the License, or (at your option) any later version.
-
- The GNU C Library is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Lesser General Public License for more details.
-
- You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library; if not, see
- <http://www.gnu.org/licenses/>. */
-
-#include <sysdep.h>
-#include <rtld-global-offsets.h>
-
-#if IS_IN (libc)
-/* Under __ARM_NEON__, memchr_neon.S defines the name memchr. */
-# ifndef __ARM_NEON__
- .text
- .arm
-ENTRY(memchr)
- .type memchr, %gnu_indirect_function
- ldr r1, .Lmemchr_noneon
- tst r0, #HWCAP_ARM_NEON
- ldrne r1, .Lmemchr_neon
-1:
- add r0, r1, pc
- DO_RET(lr)
-
-.Lmemchr_noneon:
- .long C_SYMBOL_NAME(__memchr_noneon) - 1b - 8
-.Lmemchr_neon:
- .long C_SYMBOL_NAME(__memchr_neon) - 1b - 8
-
-END(memchr)
-
-libc_hidden_builtin_def (memchr)
-# endif /* Not __ARM_NEON__. */
-libc_hidden_def (__memchr_noneon)
-
-# undef libc_hidden_builtin_def
-# define libc_hidden_builtin_def(name)
-# undef weak_alias
-# define weak_alias(x, y)
-# undef libc_hidden_def
-# define libc_hidden_def(name)
-
-# define memchr __memchr_noneon
-
-#endif
-
-#include "memchr_impl.S"
diff --git a/sysdeps/arm/armv7/multiarch/memchr.c b/sysdeps/arm/armv7/multiarch/memchr.c
new file mode 100644
index 0000000..906bcd5
--- /dev/null
+++ b/sysdeps/arm/armv7/multiarch/memchr.c
@@ -0,0 +1,35 @@
+/* Multiple versions of memchr.
+ All versions must be listed in ifunc-impl-list.c.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+/* For __ARM_NEON__ memchr_neon.S defines memchr directly and ifunc
+ is not used. */
+#if IS_IN (libc) && !defined (__ARM_NEON__)
+# define memchr __redirect_memchr
+# include <string.h>
+# undef memchr
+
+# include <arm-ifunc.h>
+
+# define SYMBOL_NAME memchr
+# include "ifunc-memchr.h"
+
+arm_libc_ifunc_redirected (__redirect_memchr, memchr, IFUNC_SELECTOR);
+
+arm_libc_ifunc_hidden_def (__redirect_memchr, memchr);
+#endif
diff --git a/sysdeps/arm/armv7/multiarch/memchr_impl.S b/sysdeps/arm/armv7/multiarch/memchr_impl.S
deleted file mode 100644
index e8cbb97..0000000
--- a/sysdeps/arm/armv7/multiarch/memchr_impl.S
+++ /dev/null
@@ -1,219 +0,0 @@
-/* memchr implemented using NEON.
- Copyright (C) 2011-2017 Free Software Foundation, Inc.
- This file is part of the GNU C Library.
-
- The GNU C Library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Lesser General Public
- License as published by the Free Software Foundation; either
- version 2.1 of the License, or (at your option) any later version.
-
- The GNU C Library is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Lesser General Public License for more details.
-
- You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library. If not, see
- <http://www.gnu.org/licenses/>. */
-
-#ifdef MEMCHR_NEON
-
-#include <sysdep.h>
-
- .arch armv7-a
- .fpu neon
-
-
-/* Arguments */
-#define srcin r0
-#define chrin r1
-#define cntin r2
-
-/* Retval */
-#define result r0 /* Live range does not overlap with srcin */
-
-/* Working registers */
-#define src r1 /* Live range does not overlap with chrin */
-#define tmp r3
-#define synd r0 /* No overlap with srcin or result */
-#define soff r12
-
-/* Working NEON registers */
-#define vrepchr q0
-#define vdata0 q1
-#define vdata0_0 d2 /* Lower half of vdata0 */
-#define vdata0_1 d3 /* Upper half of vdata0 */
-#define vdata1 q2
-#define vdata1_0 d4 /* Lower half of vhas_chr0 */
-#define vdata1_1 d5 /* Upper half of vhas_chr0 */
-#define vrepmask q3
-#define vrepmask0 d6
-#define vrepmask1 d7
-#define vend q4
-#define vend0 d8
-#define vend1 d9
-
-/*
- * Core algorithm:
- *
- * For each 32-byte chunk we calculate a 32-bit syndrome value, with one bit per
- * byte. Each bit is set if the relevant byte matched the requested character
- * and cleared otherwise. Since the bits in the syndrome reflect exactly the
- * order in which things occur in the original string, counting trailing zeros
- * allows to identify exactly which byte has matched.
- */
-
-#ifndef NO_THUMB
- .thumb_func
-#else
- .arm
-#endif
- .p2align 4,,15
-
-ENTRY(memchr)
- /* Use a simple loop if there are less than 8 bytes to search. */
- cmp cntin, #7
- bhi .Llargestr
- and chrin, chrin, #0xff
-
-.Lsmallstr:
- subs cntin, cntin, #1
- blo .Lnotfound /* Return not found if reached end. */
- ldrb tmp, [srcin], #1
- cmp tmp, chrin
- bne .Lsmallstr /* Loop again if not found. */
- /* Otherwise fixup address and return. */
- sub result, srcin, #1
- bx lr
-
-
-.Llargestr:
- vdup.8 vrepchr, chrin /* Duplicate char across all lanes. */
- /*
- * Magic constant 0x8040201008040201 allows us to identify which lane
- * matches the requested byte.
- */
- movw tmp, #0x0201
- movt tmp, #0x0804
- lsl soff, tmp, #4
- vmov vrepmask0, tmp, soff
- vmov vrepmask1, tmp, soff
- /* Work with aligned 32-byte chunks */
- bic src, srcin, #31
- ands soff, srcin, #31
- beq .Lloopintro /* Go straight to main loop if it's aligned. */
-
- /*
- * Input string is not 32-byte aligned. We calculate the syndrome
- * value for the aligned 32 bytes block containing the first bytes
- * and mask the irrelevant part.
- */
- vld1.8 {vdata0, vdata1}, [src:256]!
- sub tmp, soff, #32
- adds cntin, cntin, tmp
- vceq.i8 vdata0, vdata0, vrepchr
- vceq.i8 vdata1, vdata1, vrepchr
- vand vdata0, vdata0, vrepmask
- vand vdata1, vdata1, vrepmask
- vpadd.i8 vdata0_0, vdata0_0, vdata0_1
- vpadd.i8 vdata1_0, vdata1_0, vdata1_1
- vpadd.i8 vdata0_0, vdata0_0, vdata1_0
- vpadd.i8 vdata0_0, vdata0_0, vdata0_0
- vmov synd, vdata0_0[0]
-
- /* Clear the soff lower bits */
- lsr synd, synd, soff
- lsl synd, synd, soff
- /* The first block can also be the last */
- bls .Lmasklast
- /* Have we found something already? */
-#ifndef NO_THUMB
- cbnz synd, .Ltail
-#else
- cmp synd, #0
- bne .Ltail
-#endif
-
-
-.Lloopintro:
- vpush {vend}
- /* 264/265 correspond to d8/d9 for q4 */
- cfi_adjust_cfa_offset (16)
- cfi_rel_offset (264, 0)
- cfi_rel_offset (265, 8)
- .p2align 3,,7
-.Lloop:
- vld1.8 {vdata0, vdata1}, [src:256]!
- subs cntin, cntin, #32
- vceq.i8 vdata0, vdata0, vrepchr
- vceq.i8 vdata1, vdata1, vrepchr
- /* If we're out of data we finish regardless of the result. */
- bls .Lend
- /* Use a fast check for the termination condition. */
- vorr vend, vdata0, vdata1
- vorr vend0, vend0, vend1
- vmov synd, tmp, vend0
- orrs synd, synd, tmp
- /* We're not out of data, loop if we haven't found the character. */
- beq .Lloop
-
-.Lend:
- vpop {vend}
- cfi_adjust_cfa_offset (-16)
- cfi_restore (264)
- cfi_restore (265)
-
- /* Termination condition found, let's calculate the syndrome value. */
- vand vdata0, vdata0, vrepmask
- vand vdata1, vdata1, vrepmask
- vpadd.i8 vdata0_0, vdata0_0, vdata0_1
- vpadd.i8 vdata1_0, vdata1_0, vdata1_1
- vpadd.i8 vdata0_0, vdata0_0, vdata1_0
- vpadd.i8 vdata0_0, vdata0_0, vdata0_0
- vmov synd, vdata0_0[0]
-#ifndef NO_THUMB
- cbz synd, .Lnotfound
- bhi .Ltail /* Uses the condition code from
- subs cntin, cntin, #32 above. */
-#else
- cmp synd, #0
- beq .Lnotfound
- cmp cntin, #0
- bhi .Ltail
-#endif
-
-
-.Lmasklast:
- /* Clear the (-cntin) upper bits to avoid out-of-bounds matches. */
- neg cntin, cntin
- lsl synd, synd, cntin
- lsrs synd, synd, cntin
- it eq
- moveq src, #0 /* If no match, set src to 0 so the retval is 0. */
-
-
-.Ltail:
- /* Count the trailing zeros using bit reversing */
- rbit synd, synd
- /* Compensate the last post-increment */
- sub src, src, #32
- /* Count the leading zeros */
- clz synd, synd
- /* Compute the potential result and return */
- add result, src, synd
- bx lr
-
-
-.Lnotfound:
- /* Set result to NULL if not found and return */
- mov result, #0
- bx lr
-
-END(memchr)
-libc_hidden_builtin_def (memchr)
-
-#else
-
-#include "../../armv6t2/memchr.S"
-
-#endif
diff --git a/sysdeps/arm/armv7/multiarch/memchr_neon.S b/sysdeps/arm/armv7/multiarch/memchr_neon.S
index ee21818..a400033 100644
--- a/sysdeps/arm/armv7/multiarch/memchr_neon.S
+++ b/sysdeps/arm/armv7/multiarch/memchr_neon.S
@@ -1,9 +1,218 @@
-#ifdef __ARM_NEON__
-/* Under __ARM_NEON__, this file defines memchr directly. */
-libc_hidden_builtin_def (memchr)
-#else
+/* memchr implemented using NEON.
+ Copyright (C) 2011-2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+
+/* For __ARM_NEON__ this file defines memchr. */
+#ifndef __ARM_NEON__
# define memchr __memchr_neon
+# undef libc_hidden_builtin_def
+# define libc_hidden_builtin_def(a)
+#endif
+
+ .arch armv7-a
+ .fpu neon
+
+
+/* Arguments */
+#define srcin r0
+#define chrin r1
+#define cntin r2
+
+/* Retval */
+#define result r0 /* Live range does not overlap with srcin */
+
+/* Working registers */
+#define src r1 /* Live range does not overlap with chrin */
+#define tmp r3
+#define synd r0 /* No overlap with srcin or result */
+#define soff r12
+
+/* Working NEON registers */
+#define vrepchr q0
+#define vdata0 q1
+#define vdata0_0 d2 /* Lower half of vdata0 */
+#define vdata0_1 d3 /* Upper half of vdata0 */
+#define vdata1 q2
+#define vdata1_0 d4 /* Lower half of vhas_chr0 */
+#define vdata1_1 d5 /* Upper half of vhas_chr0 */
+#define vrepmask q3
+#define vrepmask0 d6
+#define vrepmask1 d7
+#define vend q4
+#define vend0 d8
+#define vend1 d9
+
+/*
+ * Core algorithm:
+ *
+ * For each 32-byte chunk we calculate a 32-bit syndrome value, with one bit per
+ * byte. Each bit is set if the relevant byte matched the requested character
+ * and cleared otherwise. Since the bits in the syndrome reflect exactly the
+ * order in which things occur in the original string, counting trailing zeros
+ * allows to identify exactly which byte has matched.
+ */
+
+#ifndef NO_THUMB
+ .thumb_func
+#else
+ .arm
+#endif
+ .p2align 4,,15
+
+ENTRY(memchr)
+ /* Use a simple loop if there are less than 8 bytes to search. */
+ cmp cntin, #7
+ bhi .Llargestr
+ and chrin, chrin, #0xff
+
+.Lsmallstr:
+ subs cntin, cntin, #1
+ blo .Lnotfound /* Return not found if reached end. */
+ ldrb tmp, [srcin], #1
+ cmp tmp, chrin
+ bne .Lsmallstr /* Loop again if not found. */
+ /* Otherwise fixup address and return. */
+ sub result, srcin, #1
+ bx lr
+
+
+.Llargestr:
+ vdup.8 vrepchr, chrin /* Duplicate char across all lanes. */
+ /*
+ * Magic constant 0x8040201008040201 allows us to identify which lane
+ * matches the requested byte.
+ */
+ movw tmp, #0x0201
+ movt tmp, #0x0804
+ lsl soff, tmp, #4
+ vmov vrepmask0, tmp, soff
+ vmov vrepmask1, tmp, soff
+ /* Work with aligned 32-byte chunks */
+ bic src, srcin, #31
+ ands soff, srcin, #31
+ beq .Lloopintro /* Go straight to main loop if it's aligned. */
+
+ /*
+ * Input string is not 32-byte aligned. We calculate the syndrome
+ * value for the aligned 32 bytes block containing the first bytes
+ * and mask the irrelevant part.
+ */
+ vld1.8 {vdata0, vdata1}, [src:256]!
+ sub tmp, soff, #32
+ adds cntin, cntin, tmp
+ vceq.i8 vdata0, vdata0, vrepchr
+ vceq.i8 vdata1, vdata1, vrepchr
+ vand vdata0, vdata0, vrepmask
+ vand vdata1, vdata1, vrepmask
+ vpadd.i8 vdata0_0, vdata0_0, vdata0_1
+ vpadd.i8 vdata1_0, vdata1_0, vdata1_1
+ vpadd.i8 vdata0_0, vdata0_0, vdata1_0
+ vpadd.i8 vdata0_0, vdata0_0, vdata0_0
+ vmov synd, vdata0_0[0]
+
+ /* Clear the soff lower bits */
+ lsr synd, synd, soff
+ lsl synd, synd, soff
+ /* The first block can also be the last */
+ bls .Lmasklast
+ /* Have we found something already? */
+#ifndef NO_THUMB
+ cbnz synd, .Ltail
+#else
+ cmp synd, #0
+ bne .Ltail
#endif
-#define MEMCHR_NEON
-#include "memchr_impl.S"
+
+.Lloopintro:
+ vpush {vend}
+ /* 264/265 correspond to d8/d9 for q4 */
+ cfi_adjust_cfa_offset (16)
+ cfi_rel_offset (264, 0)
+ cfi_rel_offset (265, 8)
+ .p2align 3,,7
+.Lloop:
+ vld1.8 {vdata0, vdata1}, [src:256]!
+ subs cntin, cntin, #32
+ vceq.i8 vdata0, vdata0, vrepchr
+ vceq.i8 vdata1, vdata1, vrepchr
+ /* If we're out of data we finish regardless of the result. */
+ bls .Lend
+ /* Use a fast check for the termination condition. */
+ vorr vend, vdata0, vdata1
+ vorr vend0, vend0, vend1
+ vmov synd, tmp, vend0
+ orrs synd, synd, tmp
+ /* We're not out of data, loop if we haven't found the character. */
+ beq .Lloop
+
+.Lend:
+ vpop {vend}
+ cfi_adjust_cfa_offset (-16)
+ cfi_restore (264)
+ cfi_restore (265)
+
+ /* Termination condition found, let's calculate the syndrome value. */
+ vand vdata0, vdata0, vrepmask
+ vand vdata1, vdata1, vrepmask
+ vpadd.i8 vdata0_0, vdata0_0, vdata0_1
+ vpadd.i8 vdata1_0, vdata1_0, vdata1_1
+ vpadd.i8 vdata0_0, vdata0_0, vdata1_0
+ vpadd.i8 vdata0_0, vdata0_0, vdata0_0
+ vmov synd, vdata0_0[0]
+#ifndef NO_THUMB
+ cbz synd, .Lnotfound
+ bhi .Ltail /* Uses the condition code from
+ subs cntin, cntin, #32 above. */
+#else
+ cmp synd, #0
+ beq .Lnotfound
+ cmp cntin, #0
+ bhi .Ltail
+#endif
+
+
+.Lmasklast:
+ /* Clear the (-cntin) upper bits to avoid out-of-bounds matches. */
+ neg cntin, cntin
+ lsl synd, synd, cntin
+ lsrs synd, synd, cntin
+ it eq
+ moveq src, #0 /* If no match, set src to 0 so the retval is 0. */
+
+
+.Ltail:
+ /* Count the trailing zeros using bit reversing */
+ rbit synd, synd
+ /* Compensate the last post-increment */
+ sub src, src, #32
+ /* Count the leading zeros */
+ clz synd, synd
+ /* Compute the potential result and return */
+ add result, src, synd
+ bx lr
+
+
+.Lnotfound:
+ /* Set result to NULL if not found and return */
+ mov result, #0
+ bx lr
+
+END(memchr)
+libc_hidden_builtin_def (memchr)
diff --git a/sysdeps/arm/armv7/multiarch/memchr_noneon.S b/sysdeps/arm/armv7/multiarch/memchr_noneon.S
new file mode 100644
index 0000000..b1fb540
--- /dev/null
+++ b/sysdeps/arm/armv7/multiarch/memchr_noneon.S
@@ -0,0 +1,5 @@
+#define memchr __memchr_noneon
+#undef libc_hidden_builtin_def
+#define libc_hidden_builtin_def(name)
+
+#include <sysdeps/arm/armv6t2/memchr.S>
diff --git a/sysdeps/arm/armv7/multiarch/rtld-memchr.S b/sysdeps/arm/armv7/multiarch/rtld-memchr.S
new file mode 100644
index 0000000..ae8e5f0
--- /dev/null
+++ b/sysdeps/arm/armv7/multiarch/rtld-memchr.S
@@ -0,0 +1 @@
+#include <sysdeps/arm/armv6t2/memchr.S>
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=098edeed6f66d9c4a08ffb713158f224147a9cb0
commit 098edeed6f66d9c4a08ffb713158f224147a9cb0
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Wed Oct 4 17:44:08 2017 -0300
arm: Implement memcpy ifunc selection in C
This patch refactor ARM memcpy ifunc selector to a C implementation.
No functional change is expected, including ifunc resolution rules.
It also adds some cleanup:
- Internal memcpy hidden definition (__GI_memcpy) is now a hidden
symbol.
- No need to create hidden definition for the ifunc variants.
Checked on armv7-linux-gnueabihf and with a build for arm-linux-gnueabi,
arm-linux-gnueabihf with and without multiarch support and with both
GCC 7.1 and GCC mainline. I also checked with the some possible
multiarch different configurations that trigger different memcpy
buids (__ARM_NEON__ && !__SOFT_FP__, !__ARM_NEON__ && !__SOFT_FP__, and
!__ARM_NEON__ && __SOFT_FP__).
* sysdeps/arm/arm-ifunc.h: New file.
* sysdeps/arm/armv7/multiarch/ifunc-memcpy.h: Likewise.
* sysdeps/arm/armv7/multiarch/memcpy.c: Likewise.
* sysdeps/arm/armv7/multiarch/memcpy_arm.S: Likewise.
* sysdeps/arm/armv7/multiarch/rtld-memcpy.S: Likewise.
* sysdeps/arm/armv7/multiarch/memcpy_neon.S [!__ARM_NEON__]
(__memcpy_neon): Avoid create hidden alias.
* sysdeps/arm/armv7/multiarch/memcpy_vfp.S [!__ARM_NEON_]
(__memcpy_vfp): Likewise.
* sysdeps/arm/armv7/multiarch/Makefile [$(subdir) = string]
(sysdep_routines): Add memcpy_arm.
* sysdeps/arm/armv7/multiarch/memcpy.S: Remove file.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 4448c3d..0a72651 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,20 @@
2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+ * sysdeps/arm/arm-ifunc.h: New file.
+ * sysdeps/arm/armv7/multiarch/ifunc-memcpy.h: Likewise.
+ * sysdeps/arm/armv7/multiarch/memcpy.c: Likewise.
+ * sysdeps/arm/armv7/multiarch/memcpy_arm.S: Likewise.
+ * sysdeps/arm/armv7/multiarch/rtld-memcpy.S: Likewise.
+ * sysdeps/arm/armv7/multiarch/memcpy_neon.S [!__ARM_NEON__]
+ (__memcpy_neon): Avoid create hidden alias.
+ * sysdeps/arm/armv7/multiarch/memcpy_vfp.S [!__ARM_NEON_]
+ (__memcpy_vfp): Likewise.
+ * sysdeps/arm/armv7/multiarch/Makefile [$(subdir) = string]
+ (sysdep_routines): Add memcpy_arm.
+ * sysdeps/arm/armv7/multiarch/memcpy.S: Remove file.
+
+2017-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+
* sysdeps/unix/sysv/linux/spawni.c (__spawnix): Use 0 instead of
WNOHANG in waitpid call.
diff --git a/sysdeps/arm/arm-ifunc.h b/sysdeps/arm/arm-ifunc.h
new file mode 100644
index 0000000..52cb533
--- /dev/null
+++ b/sysdeps/arm/arm-ifunc.h
@@ -0,0 +1,33 @@
+/* Common definition for ifunc resolvers. Linux/ARM version.
+ This file is part of the GNU C Library.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+#include <ifunc-init.h>
+
+#define INIT_ARCH()
+
+#define arm_libc_ifunc_redirected(redirected_name, name, expr) \
+ __ifunc (redirected_name, name, expr(hwcap), int hwcap, INIT_ARCH)
+
+#if defined SHARED
+# define arm_libc_ifunc_hidden_def(redirect_name, name) \
+ __hidden_ver1 (name, __GI_##name, redirect_name) \
+ __attribute__ ((visibility ("hidden")))
+#else
+# define arm_libc_ifunc_hidden_def(redirect_name, name)
+#endif
diff --git a/sysdeps/arm/armv7/multiarch/Makefile b/sysdeps/arm/armv7/multiarch/Makefile
index 9e1e61c..1e62ef9 100644
--- a/sysdeps/arm/armv7/multiarch/Makefile
+++ b/sysdeps/arm/armv7/multiarch/Makefile
@@ -1,3 +1,3 @@
ifeq ($(subdir),string)
-sysdep_routines += memcpy_neon memcpy_vfp memchr_neon
+sysdep_routines += memcpy_neon memcpy_vfp memchr_neon memcpy_arm
endif
diff --git a/sysdeps/arm/armv7/multiarch/ifunc-memcpy.h b/sysdeps/arm/armv7/multiarch/ifunc-memcpy.h
new file mode 100644
index 0000000..78cef2a
--- /dev/null
+++ b/sysdeps/arm/armv7/multiarch/ifunc-memcpy.h
@@ -0,0 +1,37 @@
+/* Common definition for memcpy resolver.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifdef __SOFTFP__
+__typeof (REDIRECT_NAME) OPTIMIZE (arm) attribute_hidden;
+#endif
+__typeof (REDIRECT_NAME) OPTIMIZE (vfp) attribute_hidden;
+__typeof (REDIRECT_NAME) OPTIMIZE (neon) attribute_hidden;
+
+static inline void *
+IFUNC_SELECTOR (int hwcap)
+{
+ if (hwcap & HWCAP_ARM_NEON)
+ return OPTIMIZE (neon);
+#ifdef __SOFTFP__
+ if (hwcap & HWCAP_ARM_VFP)
+ return OPTIMIZE (vfp);
+ return OPTIMIZE (arm);
+#else
+ return OPTIMIZE (vfp);
+#endif
+}
diff --git a/sysdeps/arm/armv7/multiarch/memcpy.S b/sysdeps/arm/armv7/multiarch/memcpy.S
deleted file mode 100644
index 8a53bda..0000000
--- a/sysdeps/arm/armv7/multiarch/memcpy.S
+++ /dev/null
@@ -1,76 +0,0 @@
-/* Multiple versions of memcpy
- All versions must be listed in ifunc-impl-list.c.
- Copyright (C) 2013-2017 Free Software Foundation, Inc.
- This file is part of the GNU C Library.
-
- The GNU C Library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Lesser General Public
- License as published by the Free Software Foundation; either
- version 2.1 of the License, or (at your option) any later version.
-
- The GNU C Library is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Lesser General Public License for more details.
-
- You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library; if not, see
- <http://www.gnu.org/licenses/>. */
-
-/* Thumb requires excess IT instructions here. */
-#define NO_THUMB
-#include <sysdep.h>
-#include <rtld-global-offsets.h>
-
-#if IS_IN (libc)
-/* Under __ARM_NEON__, memcpy_neon.S defines the name memcpy. */
-# ifndef __ARM_NEON__
- .text
-ENTRY(memcpy)
- .type memcpy, %gnu_indirect_function
-# ifdef __SOFTFP__
- ldr r1, .Lmemcpy_arm
- tst r0, #HWCAP_ARM_VFP
- ldrne r1, .Lmemcpy_vfp
-# else
- ldr r1, .Lmemcpy_vfp
-# endif
- tst r0, #HWCAP_ARM_NEON
- ldrne r1, .Lmemcpy_neon
-1:
- add r0, r1, pc
- DO_RET(lr)
-
-# ifdef __SOFTFP__
-.Lmemcpy_arm:
- .long C_SYMBOL_NAME(__memcpy_arm) - 1b - PC_OFS
-# endif
-.Lmemcpy_neon:
- .long C_SYMBOL_NAME(__memcpy_neon) - 1b - PC_OFS
-.Lmemcpy_vfp:
- .long C_SYMBOL_NAME(__memcpy_vfp) - 1b - PC_OFS
-
-END(memcpy)
-
-libc_hidden_builtin_def (memcpy)
-#endif /* Not __ARM_NEON__. */
-
-/* These versions of memcpy are defined not to clobber any VFP or NEON
- registers so they must always call the ARM variant of the memcpy code. */
-strong_alias (__memcpy_arm, __aeabi_memcpy)
-strong_alias (__memcpy_arm, __aeabi_memcpy4)
-strong_alias (__memcpy_arm, __aeabi_memcpy8)
-libc_hidden_def (__memcpy_arm)
-
-#undef libc_hidden_builtin_def
-#define libc_hidden_builtin_def(name)
-#undef weak_alias
-#define weak_alias(x, y)
-#undef libc_hidden_def
-#define libc_hidden_def(name)
-
-#define memcpy __memcpy_arm
-
-#endif
-
-#include "memcpy_impl.S"
diff --git a/sysdeps/arm/armv7/multiarch/memcpy.c b/sysdeps/arm/armv7/multiarch/memcpy.c
new file mode 100644
index 0000000..b94a017
--- /dev/null
+++ b/sysdeps/arm/armv7/multiarch/memcpy.c
@@ -0,0 +1,35 @@
+/* Multiple versions of memcpy.
+ All versions must be listed in ifunc-impl-list.c.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+/* For __ARM_NEON__ memchr_neon.S defines memchr directly and ifunc
+ is not used. */
+#if IS_IN (libc) && !defined (__ARM_NEON__)
+# define memcpy __redirect_memcpy
+# include <string.h>
+# undef memcpy
+
+# include <arm-ifunc.h>
+
+# define SYMBOL_NAME memcpy
+# include "ifunc-memcpy.h"
+
+arm_libc_ifunc_redirected (__redirect_memcpy, memcpy, IFUNC_SELECTOR);
+
+arm_libc_ifunc_hidden_def (__redirect_memcpy, memcpy);
+#endif
diff --git a/sysdeps/arm/armv7/multiarch/memcpy_arm.S b/sysdeps/arm/armv7/multiarch/memcpy_arm.S
new file mode 100644
index 0000000..e4a9a68
--- /dev/null
+++ b/sysdeps/arm/armv7/multiarch/memcpy_arm.S
@@ -0,0 +1,10 @@
+#define memcpy __memcpy_arm
+#undef libc_hidden_builtin_def
+#define libc_hidden_builtin_def(a)
+#include "memcpy_impl.S"
+
+/* These versions of memcpy are defined not to clobber any VFP or NEON
+ registers so they must always call the ARM variant of the memcpy code. */
+strong_alias (__memcpy_arm, __aeabi_memcpy)
+strong_alias (__memcpy_arm, __aeabi_memcpy4)
+strong_alias (__memcpy_arm, __aeabi_memcpy8)
diff --git a/sysdeps/arm/armv7/multiarch/memcpy_neon.S b/sysdeps/arm/armv7/multiarch/memcpy_neon.S
index e60d1cc..1a8d8bb 100644
--- a/sysdeps/arm/armv7/multiarch/memcpy_neon.S
+++ b/sysdeps/arm/armv7/multiarch/memcpy_neon.S
@@ -1,8 +1,8 @@
-#ifdef __ARM_NEON__
-/* Under __ARM_NEON__, this file defines memcpy directly. */
-libc_hidden_builtin_def (memcpy)
-#else
+/* For __ARM_NEON__ this file defines memcpy. */
+#ifndef __ARM_NEON__
# define memcpy __memcpy_neon
+# undef libc_hidden_builtin_def
+# define libc_hidden_builtin_def(a)
#endif
#define MEMCPY_NEON
diff --git a/sysdeps/arm/armv7/multiarch/memcpy_vfp.S b/sysdeps/arm/armv7/multiarch/memcpy_vfp.S
index e008c04..d1e9ede 100644
--- a/sysdeps/arm/armv7/multiarch/memcpy_vfp.S
+++ b/sysdeps/arm/armv7/multiarch/memcpy_vfp.S
@@ -1,7 +1,9 @@
-/* Under __ARM_NEON__, memcpy_neon.S defines memcpy directly
+/* Under __ARM_NEON__ memcpy_neon.S defines memcpy directly
and the __memcpy_vfp code will never be used. */
#ifndef __ARM_NEON__
# define MEMCPY_VFP
# define memcpy __memcpy_vfp
+# undef libc_hidden_builtin_def
+# define libc_hidden_builtin_def(a)
# include "memcpy_impl.S"
#endif
diff --git a/sysdeps/arm/armv7/multiarch/rtld-memcpy.S b/sysdeps/arm/armv7/multiarch/rtld-memcpy.S
new file mode 100644
index 0000000..ca23875
--- /dev/null
+++ b/sysdeps/arm/armv7/multiarch/rtld-memcpy.S
@@ -0,0 +1 @@
+#include <sysdeps/arm/armv7/multiarch/memcpy_impl.S>
-----------------------------------------------------------------------
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