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GNU C Library master sources branch gentoo/2.23 updated. glibc-2.23-94-gb099b9c
- From: vapier at sourceware dot org
- To: glibc-cvs at sourceware dot org
- Date: 8 Dec 2016 19:27:29 -0000
- Subject: GNU C Library master sources branch gentoo/2.23 updated. glibc-2.23-94-gb099b9c
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http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=b099b9c11b003927010b18fe7adf66b5f1c1817c
commit b099b9c11b003927010b18fe7adf66b5f1c1817c
Author: Aurelien Jarno <aurelien@aurel32.net>
Date: Tue Aug 2 09:18:59 2016 +0200
alpha: fix trunc for big input values
The alpha specific version of trunc and truncf always add and subtract
0x1.0p23 or 0x1.0p52 even for big values. This causes this kind of
errors in the testsuite:
Failure: Test: trunc_towardzero (0x1p107)
Result:
is: 1.6225927682921334e+32 0x1.fffffffffffffp+106
should be: 1.6225927682921336e+32 0x1.0000000000000p+107
difference: 1.8014398509481984e+16 0x1.0000000000000p+54
ulp : 0.5000
max.ulp : 0.0000
Change this by returning the input value when its absolute value is
greater than 0x1.0p23 or 0x1.0p52. NaN have to go through the add and
subtract operations to get possibly silenced.
Finally remove the code to handle inexact exception, trunc should never
generate such an exception.
Changelog:
* sysdeps/alpha/fpu/s_trunc.c (__trunc): Return the input value
when its absolute value is greater than 0x1.0p52.
[_IEEE_FP_INEXACT] Remove.
* sysdeps/alpha/fpu/s_truncf.c (__truncf): Return the input value
when its absolute value is greater than 0x1.0p23.
[_IEEE_FP_INEXACT] Remove.
(cherry picked from commit b74d259fe793499134eb743222cd8dd7c74a31ce)
(cherry picked from commit 3a5aa2ee4ffc515c8e7e615ea38d6b3b20ed0a30)
diff --git a/sysdeps/alpha/fpu/s_trunc.c b/sysdeps/alpha/fpu/s_trunc.c
index 16cb114..4b986a6 100644
--- a/sysdeps/alpha/fpu/s_trunc.c
+++ b/sysdeps/alpha/fpu/s_trunc.c
@@ -28,12 +28,11 @@ __trunc (double x)
double two52 = copysign (0x1.0p52, x);
double r, tmp;
+ if (isgreaterequal (fabs (x), 0x1.0p52))
+ return x;
+
__asm (
-#ifdef _IEEE_FP_INEXACT
- "addt/suic %2, %3, %1\n\tsubt/suic %1, %3, %0"
-#else
"addt/suc %2, %3, %1\n\tsubt/suc %1, %3, %0"
-#endif
: "=&f"(r), "=&f"(tmp)
: "f"(x), "f"(two52));
diff --git a/sysdeps/alpha/fpu/s_truncf.c b/sysdeps/alpha/fpu/s_truncf.c
index 2290f28..3e93356 100644
--- a/sysdeps/alpha/fpu/s_truncf.c
+++ b/sysdeps/alpha/fpu/s_truncf.c
@@ -27,12 +27,11 @@ __truncf (float x)
float two23 = copysignf (0x1.0p23, x);
float r, tmp;
+ if (isgreaterequal (fabsf (x), 0x1.0p23))
+ return x;
+
__asm (
-#ifdef _IEEE_FP_INEXACT
- "adds/suic %2, %3, %1\n\tsubs/suic %1, %3, %0"
-#else
"adds/suc %2, %3, %1\n\tsubs/suc %1, %3, %0"
-#endif
: "=&f"(r), "=&f"(tmp)
: "f"(x), "f"(two23));
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=201fca8584b5aca30e807890b607064f16ef38ef
commit 201fca8584b5aca30e807890b607064f16ef38ef
Author: Aurelien Jarno <aurelien@aurel32.net>
Date: Tue Aug 2 09:18:59 2016 +0200
alpha: fix rint on sNaN input
The alpha version of rint wrongly return sNaN for sNaN input. Fix that
by checking for NaN and by returning the input value added with itself
in that case.
Changelog:
* sysdeps/alpha/fpu/s_rint.c (__rint): Add argument with itself
when it is a NaN.
* sysdeps/alpha/fpu/s_rintf.c (__rintf): Likewise.
(cherry picked from commit cb7f9d63b921ea1a1cbb4ab377a8484fd5da9a2b)
(cherry picked from commit 51a313c50445eded2cfbbb60da2bbb98f3e9b219)
diff --git a/sysdeps/alpha/fpu/s_rint.c b/sysdeps/alpha/fpu/s_rint.c
index f33fe72..259348a 100644
--- a/sysdeps/alpha/fpu/s_rint.c
+++ b/sysdeps/alpha/fpu/s_rint.c
@@ -23,6 +23,9 @@
double
__rint (double x)
{
+ if (isnan (x))
+ return x + x;
+
if (isless (fabs (x), 9007199254740992.0)) /* 1 << DBL_MANT_DIG */
{
double tmp1, new_x;
diff --git a/sysdeps/alpha/fpu/s_rintf.c b/sysdeps/alpha/fpu/s_rintf.c
index 1400dfe..645728a 100644
--- a/sysdeps/alpha/fpu/s_rintf.c
+++ b/sysdeps/alpha/fpu/s_rintf.c
@@ -22,6 +22,9 @@
float
__rintf (float x)
{
+ if (isnanf (x))
+ return x + x;
+
if (isless (fabsf (x), 16777216.0f)) /* 1 << FLT_MANT_DIG */
{
/* Note that Alpha S_Floating is stored in registers in a
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=61198b4bc5499ecd70d9890361aa5be96582070e
commit 61198b4bc5499ecd70d9890361aa5be96582070e
Author: Aurelien Jarno <aurelien@aurel32.net>
Date: Tue Aug 2 09:18:59 2016 +0200
alpha: fix floor on sNaN input
The alpha version of floor wrongly return sNaN for sNaN input. Fix that
by checking for NaN and by returning the input value added with itself
in that case.
Finally remove the code to handle inexact exception, floor should never
generate such an exception.
Changelog:
* sysdeps/alpha/fpu/s_floor.c (__floor): Add argument with itself
when it is a NaN.
[_IEEE_FP_INEXACT] Remove.
* sysdeps/alpha/fpu/s_floorf.c (__floorf): Likewise.
(cherry picked from commit 65cc568cf57156e5230db9a061645e54ff028a41)
(cherry picked from commit 12bf4f130d46a075c628a2c948b31973b2a12222)
diff --git a/sysdeps/alpha/fpu/s_floor.c b/sysdeps/alpha/fpu/s_floor.c
index 1a6f8c4..9930f6b 100644
--- a/sysdeps/alpha/fpu/s_floor.c
+++ b/sysdeps/alpha/fpu/s_floor.c
@@ -27,16 +27,15 @@
double
__floor (double x)
{
+ if (isnan (x))
+ return x + x;
+
if (isless (fabs (x), 9007199254740992.0)) /* 1 << DBL_MANT_DIG */
{
double tmp1, new_x;
__asm (
-#ifdef _IEEE_FP_INEXACT
- "cvttq/svim %2,%1\n\t"
-#else
"cvttq/svm %2,%1\n\t"
-#endif
"cvtqt/m %1,%0\n\t"
: "=f"(new_x), "=&f"(tmp1)
: "f"(x));
diff --git a/sysdeps/alpha/fpu/s_floorf.c b/sysdeps/alpha/fpu/s_floorf.c
index 8cd80e2..015c04f 100644
--- a/sysdeps/alpha/fpu/s_floorf.c
+++ b/sysdeps/alpha/fpu/s_floorf.c
@@ -26,6 +26,9 @@
float
__floorf (float x)
{
+ if (isnanf (x))
+ return x + x;
+
if (isless (fabsf (x), 16777216.0f)) /* 1 << FLT_MANT_DIG */
{
/* Note that Alpha S_Floating is stored in registers in a
@@ -36,11 +39,7 @@ __floorf (float x)
float tmp1, tmp2, new_x;
__asm ("cvtst/s %3,%2\n\t"
-#ifdef _IEEE_FP_INEXACT
- "cvttq/svim %2,%1\n\t"
-#else
"cvttq/svm %2,%1\n\t"
-#endif
"cvtqt/m %1,%0\n\t"
: "=f"(new_x), "=&f"(tmp1), "=&f"(tmp2)
: "f"(x));
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=d0ce1ce9bd252b3c60bee8a088354cf8d3d0510f
commit d0ce1ce9bd252b3c60bee8a088354cf8d3d0510f
Author: Aurelien Jarno <aurelien@aurel32.net>
Date: Tue Aug 2 09:18:59 2016 +0200
alpha: fix ceil on sNaN input
The alpha version of ceil wrongly return sNaN for sNaN input. Fix that
by checking for NaN and by returning the input value added with itself
in that case.
Finally remove the code to handle inexact exception, ceil should never
generate such an exception.
Changelog:
* sysdeps/alpha/fpu/s_ceil.c (__ceil): Add argument with itself
when it is a NaN.
[_IEEE_FP_INEXACT] Remove.
* sysdeps/alpha/fpu/s_ceilf.c (__ceilf): Likewise.
(cherry picked from commit 062e53c195b4a87754632c7d51254867247698b4)
(cherry picked from commit 85186de4f422170e4aff108200d96ffa60d61081)
diff --git a/sysdeps/alpha/fpu/s_ceil.c b/sysdeps/alpha/fpu/s_ceil.c
index c1ff864..e9c350a 100644
--- a/sysdeps/alpha/fpu/s_ceil.c
+++ b/sysdeps/alpha/fpu/s_ceil.c
@@ -26,17 +26,16 @@
double
__ceil (double x)
{
+ if (isnan (x))
+ return x + x;
+
if (isless (fabs (x), 9007199254740992.0)) /* 1 << DBL_MANT_DIG */
{
double tmp1, new_x;
new_x = -x;
__asm (
-#ifdef _IEEE_FP_INEXACT
- "cvttq/svim %2,%1\n\t"
-#else
"cvttq/svm %2,%1\n\t"
-#endif
"cvtqt/m %1,%0\n\t"
: "=f"(new_x), "=&f"(tmp1)
: "f"(new_x));
diff --git a/sysdeps/alpha/fpu/s_ceilf.c b/sysdeps/alpha/fpu/s_ceilf.c
index 7e63a6f..77e01a9 100644
--- a/sysdeps/alpha/fpu/s_ceilf.c
+++ b/sysdeps/alpha/fpu/s_ceilf.c
@@ -25,6 +25,9 @@
float
__ceilf (float x)
{
+ if (isnanf (x))
+ return x + x;
+
if (isless (fabsf (x), 16777216.0f)) /* 1 << FLT_MANT_DIG */
{
/* Note that Alpha S_Floating is stored in registers in a
@@ -36,11 +39,7 @@ __ceilf (float x)
new_x = -x;
__asm ("cvtst/s %3,%2\n\t"
-#ifdef _IEEE_FP_INEXACT
- "cvttq/svim %2,%1\n\t"
-#else
"cvttq/svm %2,%1\n\t"
-#endif
"cvtqt/m %1,%0\n\t"
: "=f"(new_x), "=&f"(tmp1), "=&f"(tmp2)
: "f"(new_x));
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=6f37754bf262c0301572314e42f75b84d8e04a2b
commit 6f37754bf262c0301572314e42f75b84d8e04a2b
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Thu Nov 17 19:15:51 2016 +0000
MIPS: Add `.insn' to ensure a text label is defined as code not data
Avoid a build error with microMIPS compilation and recent versions of
GAS which complain if a branch targets a label which is marked as data
rather than microMIPS code:
../sysdeps/mips/mips32/crti.S: Assembler messages:
../sysdeps/mips/mips32/crti.S:72: Error: branch to a symbol in another ISA mode
make[2]: *** [.../csu/crti.o] Error 1
as commit 9d862524f6ae ("MIPS: Verify the ISA mode and alignment of
branch and jump targets") closed a hole in branch processing, making
relocation calculation respect the ISA mode of the symbol referred.
This allowed diagnosing the situation where an attempt is made to pass
control from code assembled for one ISA mode to code assembled for a
different ISA mode and either relaxing the branch to a cross-mode jump
or if that is not possible, then reporting this as an error rather than
letting such code build and then fail unpredictably at the run time.
This however requires the correct annotation of branch targets as code,
because the ISA mode is not relevant for data symbols and is therefore
not recorded for them. The `.insn' pseudo-op is used for this purpose
and has been supported by GAS since:
Wed Feb 12 14:36:29 1997 Ian Lance Taylor <ian@cygnus.com>
* config/tc-mips.c (mips_pseudo_table): Add "insn".
(s_insn): New static function.
* doc/c-mips.texi: Document .insn.
so there has been no reason to avoid it where required. More recently
this pseudo-op has been documented, by the microMIPS architecture
specification[1][2], as required for the correct interpretation of any
code label which is not followed by an actual instruction in an assembly
source.
Use it in our crti.S files then, to mark that the trailing label there
with no instructions following is indeed not a code bug and the branch
is legitimate.
References:
[1] "MIPS Architecture for Programmers, Volume II-B: The microMIPS32
Instruction Set", MIPS Technologies, Inc., Document Number: MD00582,
Revision 5.04, January 15, 2014, Section 7.1 "Assembly-Level
Compatibility", p. 533
[2] "MIPS Architecture for Programmers, Volume II-B: The microMIPS64
Instruction Set", MIPS Technologies, Inc., Document Number: MD00594,
Revision 5.04, January 15, 2014, Section 8.1 "Assembly-Level
Compatibility", p. 623
2016-11-23 Matthew Fortune <Matthew.Fortune@imgtec.com>
Maciej W. Rozycki <macro@imgtec.com>
* sysdeps/mips/mips32/crti.S (_init): Add `.insn' pseudo-op at
`.Lno_weak_fn' label.
* sysdeps/mips/mips64/n32/crti.S (_init): Likewise.
* sysdeps/mips/mips64/n64/crti.S (_init): Likewise.
(cherry picked from commit cfaf1949ff1f8336b54c43796d0e2531bc8a40a2)
(cherry picked from commit 8ee1ecb99cd8928b767b9b50f31b5618d046f0f2)
diff --git a/sysdeps/mips/mips32/crti.S b/sysdeps/mips/mips32/crti.S
index 5c0ad73..dfbbdc4 100644
--- a/sysdeps/mips/mips32/crti.S
+++ b/sysdeps/mips/mips32/crti.S
@@ -74,6 +74,7 @@ _init:
.reloc 1f,R_MIPS_JALR,PREINIT_FUNCTION
1: jalr $25
.Lno_weak_fn:
+ .insn
#else
lw $25,%got(PREINIT_FUNCTION)($28)
.reloc 1f,R_MIPS_JALR,PREINIT_FUNCTION
diff --git a/sysdeps/mips/mips64/n32/crti.S b/sysdeps/mips/mips64/n32/crti.S
index 00b89f3..afe6d8e 100644
--- a/sysdeps/mips/mips64/n32/crti.S
+++ b/sysdeps/mips/mips64/n32/crti.S
@@ -74,6 +74,7 @@ _init:
.reloc 1f,R_MIPS_JALR,PREINIT_FUNCTION
1: jalr $25
.Lno_weak_fn:
+ .insn
#else
lw $25,%got_disp(PREINIT_FUNCTION)($28)
.reloc 1f,R_MIPS_JALR,PREINIT_FUNCTION
diff --git a/sysdeps/mips/mips64/n64/crti.S b/sysdeps/mips/mips64/n64/crti.S
index f59b20c..4049d29 100644
--- a/sysdeps/mips/mips64/n64/crti.S
+++ b/sysdeps/mips/mips64/n64/crti.S
@@ -74,6 +74,7 @@ _init:
.reloc 1f,R_MIPS_JALR,PREINIT_FUNCTION
1: jalr $25
.Lno_weak_fn:
+ .insn
#else
ld $25,%got_disp(PREINIT_FUNCTION)($28)
.reloc 1f,R_MIPS_JALR,PREINIT_FUNCTION
-----------------------------------------------------------------------
Summary of changes:
sysdeps/alpha/fpu/s_ceil.c | 7 +++----
sysdeps/alpha/fpu/s_ceilf.c | 7 +++----
sysdeps/alpha/fpu/s_floor.c | 7 +++----
sysdeps/alpha/fpu/s_floorf.c | 7 +++----
sysdeps/alpha/fpu/s_rint.c | 3 +++
sysdeps/alpha/fpu/s_rintf.c | 3 +++
sysdeps/alpha/fpu/s_trunc.c | 7 +++----
sysdeps/alpha/fpu/s_truncf.c | 7 +++----
sysdeps/mips/mips32/crti.S | 1 +
sysdeps/mips/mips64/n32/crti.S | 1 +
sysdeps/mips/mips64/n64/crti.S | 1 +
11 files changed, 27 insertions(+), 24 deletions(-)
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