Re: none

[Eli Zaretskii <eliz at gnu dot org>]

> So, does the compiler use separate numbers in the debug for MMX
> registers and FP stack registers, or the same numbers?
> 
> If the compiler uses separate register numbers, then we have the
> problems discussed before: as far as I can tell, GDB simply isn't set
> up to cope with the idea that certain bits might be part of two
> registers.
> 
> If the compiler uses the same register numbers, how can the
> architecture-specific code tell whether GDB is accessing MM0 (which
> lives in R0) or ST(0) (which lives in R(TOS))?

The architecture-specific code knows about TOS, right?  It's part of
the status word, so it's available to GDB.  Since TOS is handled the
same by all x86 platforms, we could use the value of TOS to define two
x86-specific functions to map between ST(i) and the corresponding MMj
register and back.

Given these mapping functions, the code which implements the MMX view
of the FP registers could allow both reading and writing MMX registers
by accessing the corresponding ST(i) registers, each time using the
current value of TOS.

Am I missing something obvious?  If so, perhaps I don't understand how
the register views are (or would be) implemented.