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[PATCH 0/3 v3] [AArch64] Support tagged pointer
- From: Yao Qi <qiyaoltc at gmail dot com>
- To: gdb-patches at sourceware dot org
- Date: Fri, 8 Dec 2017 10:04:28 +0000
- Subject: [PATCH 0/3 v3] [AArch64] Support tagged pointer
- Authentication-results: sourceware.org; auth=none
ARMv8 supports tagged address, that is, the top one byte in address
is ignored. It is always enabled on aarch64-linux. See
https://www.kernel.org/doc/Documentation/arm64/tagged-pointers.txt
Some parts of GDB related to address are updated in this patch series,
- Memory access, like command 'x',
- Setting hw breakpoint on some address,
- Setting watchpoint on some address,
Address tag is treated as non-significant bits of address, so this patch
series add a new gdbarch significant_addr_bit, and use it in gdbarch to
get rid of non-significant bits. This was the suggestion in the v2 review.
(https://sourceware.org/ml/gdb-patches/2017-10/msg00792.html)
When I test this patch series, and I find a regression in linespec. I
posted the fix https://sourceware.org/ml/gdb-patches/2017-12/msg00158.html
Without this fix, this series causes a regression.
*** BLURB HERE ***
Yao Qi (3):
Clear non-significant bits of address on memory access
Adjust breakpoint address by clearing non-significant bits
Clear non-significant bits of address in watchpoint
gdb/aarch64-linux-tdep.c | 2 +
gdb/breakpoint.c | 22 ++---
gdb/gdbarch.c | 22 +++++
gdb/gdbarch.h | 8 ++
gdb/gdbarch.sh | 6 ++
gdb/target.c | 2 +
gdb/testsuite/gdb.arch/aarch64-tagged-pointer.c | 57 ++++++++++++
gdb/testsuite/gdb.arch/aarch64-tagged-pointer.exp | 105 ++++++++++++++++++++++
gdb/utils.c | 17 ++++
gdb/utils.h | 3 +
10 files changed, 233 insertions(+), 11 deletions(-)
create mode 100644 gdb/testsuite/gdb.arch/aarch64-tagged-pointer.c
create mode 100644 gdb/testsuite/gdb.arch/aarch64-tagged-pointer.exp
--
1.9.1