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[PATCH 2/5] Fix spelling in comments in Assembler files (sim)
- From: Ambrogino Modigliani <ambrogino dot modigliani at gmail dot com>
- To: gdb-patches at sourceware dot org, pedro_alves at portugalmail dot pt, ambrogino dot modigliani at gmail dot com, ambrogino dot modigliani at mail dot com
- Date: Fri, 25 Nov 2016 20:46:07 +0100
- Subject: [PATCH 2/5] Fix spelling in comments in Assembler files (sim)
- Authentication-results: sourceware.org; auth=none
- References: <1480103170-9627-1-git-send-email-ambrogino.modigliani@mail.com>
sim/testsuite/ChangeLog:
* d10v-elf/t-macros.i: Fix spelling in comments.
* sim/bfin/divq.s: Fix spelling in comments.
* sim/bfin/se_illegalcombination.S: Fix spelling in comments.
* sim/bfin/se_undefinedinstruction1.S: Fix spelling in comments.
* sim/bfin/se_undefinedinstruction2.S: Fix spelling in comments.
* sim/fr30/addsp.cgs: Fix spelling in comments.
* sim/fr30/bc.cgs: Fix spelling in comments.
* sim/fr30/beq.cgs: Fix spelling in comments.
* sim/fr30/bge.cgs: Fix spelling in comments.
* sim/fr30/bgt.cgs: Fix spelling in comments.
* sim/fr30/bhi.cgs: Fix spelling in comments.
* sim/fr30/ble.cgs: Fix spelling in comments.
* sim/fr30/bls.cgs: Fix spelling in comments.
* sim/fr30/blt.cgs: Fix spelling in comments.
* sim/fr30/bn.cgs: Fix spelling in comments.
* sim/fr30/bnc.cgs: Fix spelling in comments.
* sim/fr30/bne.cgs: Fix spelling in comments.
* sim/fr30/bno.cgs: Fix spelling in comments.
* sim/fr30/bnv.cgs: Fix spelling in comments.
* sim/fr30/bp.cgs: Fix spelling in comments.
* sim/fr30/bra.cgs: Fix spelling in comments.
* sim/fr30/bv.cgs: Fix spelling in comments.
* sim/fr30/copld.cgs: Fix spelling in comments.
* sim/fr30/copop.cgs: Fix spelling in comments.
* sim/fr30/copst.cgs: Fix spelling in comments.
* sim/fr30/copsv.cgs: Fix spelling in comments.
* sim/fr30/enter.cgs: Fix spelling in comments.
* sim/fr30/extsb.cgs: Fix spelling in comments.
* sim/fr30/extsh.cgs: Fix spelling in comments.
* sim/fr30/extub.cgs: Fix spelling in comments.
* sim/fr30/extuh.cgs: Fix spelling in comments.
* sim/fr30/ldres.cgs: Fix spelling in comments.
* sim/fr30/leave.cgs: Fix spelling in comments.
* sim/fr30/nop.cgs: Fix spelling in comments.
* sim/fr30/stres.cgs: Fix spelling in comments.
* sim/fr30/xchb.cgs: Fix spelling in comments.
* sim/h8300/ldc.s: Fix spelling in comments.
* sim/h8300/stc.s: Fix spelling in comments.
* sim/mips/hilo-hazard-3.s: Fix spelling in comments.
* sim/mips/hilo-hazard-4.s: Fix spelling in comments.
* sim/sh/fipr.s: Fix spelling in comments.
---
sim/testsuite/d10v-elf/t-macros.i | 2 +-
sim/testsuite/sim/bfin/divq.s | 2 +-
sim/testsuite/sim/bfin/se_illegalcombination.S | 2 +-
sim/testsuite/sim/bfin/se_undefinedinstruction1.S | 2 +-
sim/testsuite/sim/bfin/se_undefinedinstruction2.S | 4 +-
sim/testsuite/sim/fr30/addsp.cgs | 6 +--
sim/testsuite/sim/fr30/bc.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/beq.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bge.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bgt.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bhi.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/ble.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bls.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/blt.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bn.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bnc.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bne.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bno.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bnv.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bp.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bra.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/bv.cgs | 64 +++++++++++------------
sim/testsuite/sim/fr30/copld.cgs | 4 +-
sim/testsuite/sim/fr30/copop.cgs | 4 +-
sim/testsuite/sim/fr30/copst.cgs | 4 +-
sim/testsuite/sim/fr30/copsv.cgs | 4 +-
sim/testsuite/sim/fr30/enter.cgs | 4 +-
sim/testsuite/sim/fr30/extsb.cgs | 8 +--
sim/testsuite/sim/fr30/extsh.cgs | 12 ++---
sim/testsuite/sim/fr30/extub.cgs | 10 ++--
sim/testsuite/sim/fr30/extuh.cgs | 14 ++---
sim/testsuite/sim/fr30/ldres.cgs | 4 +-
sim/testsuite/sim/fr30/leave.cgs | 2 +-
sim/testsuite/sim/fr30/nop.cgs | 2 +-
sim/testsuite/sim/fr30/stres.cgs | 4 +-
sim/testsuite/sim/fr30/xchb.cgs | 2 +-
sim/testsuite/sim/h8300/ldc.s | 4 +-
sim/testsuite/sim/h8300/stc.s | 4 +-
sim/testsuite/sim/mips/hilo-hazard-3.s | 2 +-
sim/testsuite/sim/mips/hilo-hazard-4.s | 2 +-
sim/testsuite/sim/sh/fipr.s | 2 +-
41 files changed, 567 insertions(+), 567 deletions(-)
diff --git a/sim/testsuite/d10v-elf/t-macros.i b/sim/testsuite/d10v-elf/t-macros.i
index f424acf..0de38d4 100644
--- a/sim/testsuite/d10v-elf/t-macros.i
+++ b/sim/testsuite/d10v-elf/t-macros.i
@@ -170,7 +170,7 @@ _start:
.data
1: ldi r1, 2f@word
jmp r1
-;;; Successfull trap jumps back to here
+;;; Successful trap jumps back to here
.text
;;; Verify the PSW
2: mvfc r2, cr0
diff --git a/sim/testsuite/sim/bfin/divq.s b/sim/testsuite/sim/bfin/divq.s
index 6cb881b..61880c7 100644
--- a/sim/testsuite/sim/bfin/divq.s
+++ b/sim/testsuite/sim/bfin/divq.s
@@ -7,7 +7,7 @@
start
/*
- * Evaluate given a signed integer dividend and signed interger divisor
+ * Evaluate given a signed integer dividend and signed integer divisor
* input is:
* r0 = dividend, or numerator
* r1 = divisor, or denominator
diff --git a/sim/testsuite/sim/bfin/se_illegalcombination.S b/sim/testsuite/sim/bfin/se_illegalcombination.S
index 0fe5f27..bd8f333 100644
--- a/sim/testsuite/sim/bfin/se_illegalcombination.S
+++ b/sim/testsuite/sim/bfin/se_illegalcombination.S
@@ -2,7 +2,7 @@
// Description: Multi-issue Illegal Combinations
# mach: bfin
# sim: --environment operating
-# xfail: "missing a few checks; hardware doesnt seem to match PRM?" bfin-*
+# xfail: "missing a few checks; hardware doesn't seem to match PRM?" bfin-*
#include "test.h"
.include "testutils.inc"
diff --git a/sim/testsuite/sim/bfin/se_undefinedinstruction1.S b/sim/testsuite/sim/bfin/se_undefinedinstruction1.S
index 5337a74..fa1ab72 100644
--- a/sim/testsuite/sim/bfin/se_undefinedinstruction1.S
+++ b/sim/testsuite/sim/bfin/se_undefinedinstruction1.S
@@ -200,7 +200,7 @@ BEGIN:
.dw 0x21 ;
.dw 0x22 ;
.dw 0x26 ;
- .dw 0x27 ; // XXX: hardware doesnt trigger illegal exception ?
+ .dw 0x27 ; // XXX: hardware doesn't trigger illegal exception ?
.dw 0x28 ;
.dw 0x29 ;
.dw 0x2A ;
diff --git a/sim/testsuite/sim/bfin/se_undefinedinstruction2.S b/sim/testsuite/sim/bfin/se_undefinedinstruction2.S
index d21e375..9d68ccb 100644
--- a/sim/testsuite/sim/bfin/se_undefinedinstruction2.S
+++ b/sim/testsuite/sim/bfin/se_undefinedinstruction2.S
@@ -175,12 +175,12 @@ BEGIN:
.dw 0x10E ;
.dw 0x124 ;
.ifndef BFIN_HW
- // XXX: hardware doesnt trigger illegal exception ?
+ // XXX: hardware doesn't trigger illegal exception ?
.dw 0x125 ;
.endif
.dw 0x164 ;
.ifndef BFIN_HW
- // XXX: hardware doesnt trigger illegal exception ?
+ // XXX: hardware doesn't trigger illegal exception ?
.dw 0x165 ;
.endif
.dw 0x128 ;
diff --git a/sim/testsuite/sim/fr30/addsp.cgs b/sim/testsuite/sim/fr30/addsp.cgs
index da5bc36..d12eefd 100644
--- a/sim/testsuite/sim/fr30/addsp.cgs
+++ b/sim/testsuite/sim/fr30/addsp.cgs
@@ -11,18 +11,18 @@ addsp:
; Test addsp $s10
mvr_h_gr sp,r7 ; save stack pointer permanently
mvr_h_gr sp,r8 ; Shadow updated sp
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
addsp 508
test_cc 1 1 1 1
inci_h_gr 508,r8
testr_h_gr r8,sp
- set_cc 0x0e ; Condition codes are irrelevent
+ set_cc 0x0e ; Condition codes are irrelevant
addsp 0
test_cc 1 1 1 0
testr_h_gr r8,sp
- set_cc 0x0d ; Condition codes are irrelevent
+ set_cc 0x0d ; Condition codes are irrelevant
addsp -512
test_cc 1 1 0 1
inci_h_gr -512,r8
diff --git a/sim/testsuite/sim/fr30/bc.cgs b/sim/testsuite/sim/fr30/bc.cgs
index 0502625..e2233a1 100644
--- a/sim/testsuite/sim/fr30/bc.cgs
+++ b/sim/testsuite/sim/fr30/bc.cgs
@@ -9,101 +9,101 @@
.global bc
bc:
; Test bc $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch bc
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch bc
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch bc
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch bc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch bc
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch bc
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch bc
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch bc
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch bc
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch bc
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch bc
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch bc
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch bc
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch bc
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch bc
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch bc
; Test bc:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch_d bc:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch_d bc:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch_d bc:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch_d bc:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch_d bc:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch_d bc:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch_d bc:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch_d bc:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch_d bc:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch_d bc:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch_d bc:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch_d bc:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch_d bc:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch_d bc:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch_d bc:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch_d bc:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/beq.cgs b/sim/testsuite/sim/fr30/beq.cgs
index edd797e..443ebbe 100644
--- a/sim/testsuite/sim/fr30/beq.cgs
+++ b/sim/testsuite/sim/fr30/beq.cgs
@@ -9,101 +9,101 @@
.global beq
beq:
; Test beq $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch beq
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch beq
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch beq
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch beq
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch beq
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch beq
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch beq
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch beq
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch beq
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch beq
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch beq
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch beq
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch beq
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch beq
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch beq
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch beq
; Test beq:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch_d beq:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch_d beq:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch_d beq:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch_d beq:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch_d beq:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch_d beq:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch_d beq:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch_d beq:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch_d beq:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch_d beq:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch_d beq:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch_d beq:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch_d beq:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch_d beq:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch_d beq:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch_d beq:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bge.cgs b/sim/testsuite/sim/fr30/bge.cgs
index dd7796c..6db3f3e 100644
--- a/sim/testsuite/sim/fr30/bge.cgs
+++ b/sim/testsuite/sim/fr30/bge.cgs
@@ -9,101 +9,101 @@
.global bge
bge:
; Test bge $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch bge
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch bge
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch bge
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch bge
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch bge
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch bge
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch bge
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch bge
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch bge
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch bge
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch bge
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch bge
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch bge
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch bge
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch bge
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch bge
; Test bge:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch_d bge:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch_d bge:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch_d bge:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch_d bge:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch_d bge:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch_d bge:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch_d bge:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch_d bge:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch_d bge:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch_d bge:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch_d bge:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch_d bge:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch_d bge:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch_d bge:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch_d bge:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch_d bge:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bgt.cgs b/sim/testsuite/sim/fr30/bgt.cgs
index 525ac2e..f4924eb 100644
--- a/sim/testsuite/sim/fr30/bgt.cgs
+++ b/sim/testsuite/sim/fr30/bgt.cgs
@@ -9,101 +9,101 @@
.global bgt
bgt:
; Test bgt $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch bgt
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch bgt
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch bgt
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch bgt
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch bgt
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch bgt
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch bgt
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch bgt
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch bgt
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch bgt
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch bgt
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch bgt
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch bgt
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch bgt
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch bgt
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch bgt
; Test bgt:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch_d bgt:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch_d bgt:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch_d bgt:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch_d bgt:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch_d bgt:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch_d bgt:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch_d bgt:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch_d bgt:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch_d bgt:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch_d bgt:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch_d bgt:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch_d bgt:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch_d bgt:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch_d bgt:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch_d bgt:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch_d bgt:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bhi.cgs b/sim/testsuite/sim/fr30/bhi.cgs
index f5a1549..fb2bebf 100644
--- a/sim/testsuite/sim/fr30/bhi.cgs
+++ b/sim/testsuite/sim/fr30/bhi.cgs
@@ -9,101 +9,101 @@
.global bhi
bhi:
; Test bhi $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch bhi
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch bhi
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch bhi
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch bhi
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch bhi
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch bhi
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch bhi
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch bhi
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch bhi
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch bhi
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch bhi
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch bhi
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch bhi
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch bhi
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch bhi
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch bhi
; Test bhi:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch_d bhi:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch_d bhi:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch_d bhi:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch_d bhi:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch_d bhi:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch_d bhi:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch_d bhi:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch_d bhi:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch_d bhi:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch_d bhi:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch_d bhi:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch_d bhi:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch_d bhi:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch_d bhi:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch_d bhi:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch_d bhi:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/ble.cgs b/sim/testsuite/sim/fr30/ble.cgs
index 1a33f78..ae361bb 100644
--- a/sim/testsuite/sim/fr30/ble.cgs
+++ b/sim/testsuite/sim/fr30/ble.cgs
@@ -9,101 +9,101 @@
.global ble
ble:
; Test ble $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch ble
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch ble
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch ble
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch ble
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch ble
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch ble
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch ble
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch ble
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch ble
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch ble
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch ble
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch ble
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch ble
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch ble
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch ble
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch ble
; Test ble:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch_d ble:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch_d ble:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch_d ble:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch_d ble:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch_d ble:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch_d ble:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch_d ble:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch_d ble:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch_d ble:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch_d ble:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch_d ble:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch_d ble:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch_d ble:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch_d ble:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch_d ble:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch_d ble:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bls.cgs b/sim/testsuite/sim/fr30/bls.cgs
index c0148b7..bd13fd5 100644
--- a/sim/testsuite/sim/fr30/bls.cgs
+++ b/sim/testsuite/sim/fr30/bls.cgs
@@ -9,101 +9,101 @@
.global bls
bls:
; Test bls $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch bls
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch bls
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch bls
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch bls
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch bls
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch bls
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch bls
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch bls
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch bls
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch bls
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch bls
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch bls
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch bls
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch bls
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch bls
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch bls
; Test bls:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch_d bls:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch_d bls:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch_d bls:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch_d bls:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch_d bls:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch_d bls:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch_d bls:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch_d bls:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch_d bls:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch_d bls:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch_d bls:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch_d bls:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch_d bls:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch_d bls:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch_d bls:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch_d bls:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/blt.cgs b/sim/testsuite/sim/fr30/blt.cgs
index f7b6ff1..3b1222b 100644
--- a/sim/testsuite/sim/fr30/blt.cgs
+++ b/sim/testsuite/sim/fr30/blt.cgs
@@ -9,101 +9,101 @@
.global blt
blt:
; Test blt $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch blt
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch blt
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch blt
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch blt
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch blt
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch blt
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch blt
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch blt
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch blt
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch blt
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch blt
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch blt
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch blt
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch blt
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch blt
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch blt
; Test blt:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch_d blt:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch_d blt:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch_d blt:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch_d blt:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch_d blt:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch_d blt:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch_d blt:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch_d blt:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch_d blt:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch_d blt:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch_d blt:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch_d blt:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch_d blt:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch_d blt:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch_d blt:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch_d blt:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bn.cgs b/sim/testsuite/sim/fr30/bn.cgs
index 45858fc..10e57ad 100644
--- a/sim/testsuite/sim/fr30/bn.cgs
+++ b/sim/testsuite/sim/fr30/bn.cgs
@@ -9,101 +9,101 @@
.global bn
bn:
; Test bn $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch bn
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch bn
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch bn
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch bn
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch bn
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch bn
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch bn
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch bn
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch bn
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch bn
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch bn
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch bn
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch bn
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch bn
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch bn
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch bn
; Test bn:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch_d bn:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch_d bn:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch_d bn:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch_d bn:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch_d bn:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch_d bn:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch_d bn:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch_d bn:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch_d bn:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch_d bn:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch_d bn:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch_d bn:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch_d bn:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch_d bn:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch_d bn:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch_d bn:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bnc.cgs b/sim/testsuite/sim/fr30/bnc.cgs
index 9968c43..5d86cee 100644
--- a/sim/testsuite/sim/fr30/bnc.cgs
+++ b/sim/testsuite/sim/fr30/bnc.cgs
@@ -9,101 +9,101 @@
.global bnc
bc:
; Test bnc $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch bnc
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch bnc
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch bnc
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch bnc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch bnc
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch bnc
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch bnc
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch bnc
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch bnc
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch bnc
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch bnc
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch bnc
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch bnc
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch bnc
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch bnc
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch bnc
; Test bnc:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch_d bnc:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch_d bnc:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch_d bnc:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch_d bnc:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch_d bnc:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch_d bnc:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch_d bnc:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch_d bnc:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch_d bnc:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch_d bnc:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch_d bnc:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch_d bnc:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch_d bnc:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch_d bnc:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch_d bnc:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch_d bnc:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bne.cgs b/sim/testsuite/sim/fr30/bne.cgs
index 58971de..6ada810 100644
--- a/sim/testsuite/sim/fr30/bne.cgs
+++ b/sim/testsuite/sim/fr30/bne.cgs
@@ -9,101 +9,101 @@
.global bne
bne:
; Test bne $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch bne
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch bne
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch bne
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch bne
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch bne
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch bne
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch bne
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch bne
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch bne
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch bne
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch bne
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch bne
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch bne
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch bne
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch bne
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch bne
; Test bne:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch_d bne:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch_d bne:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch_d bne:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch_d bne:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch_d bne:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch_d bne:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch_d bne:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch_d bne:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch_d bne:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch_d bne:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch_d bne:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch_d bne:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch_d bne:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch_d bne:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch_d bne:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch_d bne:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bno.cgs b/sim/testsuite/sim/fr30/bno.cgs
index faef9ba..17f1356 100644
--- a/sim/testsuite/sim/fr30/bno.cgs
+++ b/sim/testsuite/sim/fr30/bno.cgs
@@ -9,101 +9,101 @@
.global bno
bno:
; Test bno $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch bno
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch bno
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch bno
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch bno
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch bno
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch bno
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch bno
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch bno
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch bno
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch bno
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch bno
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch bno
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch bno
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch bno
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch bno
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch bno
; Test bno:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch_d bno:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch_d bno:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch_d bno:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch_d bno:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch_d bno:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch_d bno:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch_d bno:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch_d bno:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch_d bno:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch_d bno:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch_d bno:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch_d bno:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch_d bno:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch_d bno:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch_d bno:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch_d bno:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bnv.cgs b/sim/testsuite/sim/fr30/bnv.cgs
index 7615abd..995dbb4 100644
--- a/sim/testsuite/sim/fr30/bnv.cgs
+++ b/sim/testsuite/sim/fr30/bnv.cgs
@@ -9,101 +9,101 @@
.global bnv
bnv:
; Test bnv $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch bnv
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch bnv
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch bnv
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch bnv
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch bnv
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch bnv
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch bnv
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch bnv
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch bnv
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch bnv
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch bnv
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch bnv
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch bnv
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch bnv
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch bnv
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch bnv
; Test bnv:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch_d bnv:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch_d bnv:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch_d bnv:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch_d bnv:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch_d bnv:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch_d bnv:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch_d bnv:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch_d bnv:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
no_branch_d bnv:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
no_branch_d bnv:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch_d bnv:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch_d bnv:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
no_branch_d bnv:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
no_branch_d bnv:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch_d bnv:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch_d bnv:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bp.cgs b/sim/testsuite/sim/fr30/bp.cgs
index 3753283..e89426a 100644
--- a/sim/testsuite/sim/fr30/bp.cgs
+++ b/sim/testsuite/sim/fr30/bp.cgs
@@ -9,101 +9,101 @@
.global bp
bp:
; Test bp $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch bp
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch bp
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch bp
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch bp
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch bp
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch bp
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch bp
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch bp
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch bp
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch bp
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch bp
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch bp
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch bp
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch bp
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch bp
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch bp
; Test bp:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
no_branch_d bp:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
no_branch_d bp:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch_d bp:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch_d bp:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
no_branch_d bp:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
no_branch_d bp:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch_d bp:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch_d bp:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch_d bp:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch_d bp:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch_d bp:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch_d bp:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch_d bp:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch_d bp:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch_d bp:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch_d bp:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bra.cgs b/sim/testsuite/sim/fr30/bra.cgs
index 3732f74..4afc585 100644
--- a/sim/testsuite/sim/fr30/bra.cgs
+++ b/sim/testsuite/sim/fr30/bra.cgs
@@ -9,101 +9,101 @@
.global bra
bra:
; Test bra $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch bra
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch bra
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch bra
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch bra
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch bra
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch bra
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch bra
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch bra
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch bra
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch bra
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch bra
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch bra
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch bra
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch bra
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch bra
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch bra
; Test bra:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch_d bra:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch_d bra:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
take_branch_d bra:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
take_branch_d bra:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch_d bra:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch_d bra:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
take_branch_d bra:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
take_branch_d bra:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch_d bra:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch_d bra:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
take_branch_d bra:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
take_branch_d bra:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch_d bra:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch_d bra:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
take_branch_d bra:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
take_branch_d bra:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/bv.cgs b/sim/testsuite/sim/fr30/bv.cgs
index 68cb9acf..0a421e5 100644
--- a/sim/testsuite/sim/fr30/bv.cgs
+++ b/sim/testsuite/sim/fr30/bv.cgs
@@ -9,101 +9,101 @@
.global bv
bv:
; Test bv $label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch bv
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch bv
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch bv
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch bv
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch bv
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch bv
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch bv
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch bv
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch bv
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch bv
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch bv
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch bv
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch bv
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch bv
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch bv
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch bv
; Test bv:d label9
- set_cc 0x0f ; condition codes are irrelevent
+ set_cc 0x0f ; condition codes are irrelevant
take_branch_d bv:d 0xf
- set_cc 0x0e ; condition codes are irrelevent
+ set_cc 0x0e ; condition codes are irrelevant
take_branch_d bv:d 0xe
- set_cc 0x0d ; condition codes are irrelevent
+ set_cc 0x0d ; condition codes are irrelevant
no_branch_d bv:d 0xd
- set_cc 0x0c ; condition codes are irrelevent
+ set_cc 0x0c ; condition codes are irrelevant
no_branch_d bv:d 0xc
- set_cc 0x0b ; condition codes are irrelevent
+ set_cc 0x0b ; condition codes are irrelevant
take_branch_d bv:d 0xb
- set_cc 0x0a ; condition codes are irrelevent
+ set_cc 0x0a ; condition codes are irrelevant
take_branch_d bv:d 0xa
- set_cc 0x09 ; condition codes are irrelevent
+ set_cc 0x09 ; condition codes are irrelevant
no_branch_d bv:d 0x9
- set_cc 0x08 ; condition codes are irrelevent
+ set_cc 0x08 ; condition codes are irrelevant
no_branch_d bv:d 0x8
- set_cc 0x07 ; condition codes are irrelevent
+ set_cc 0x07 ; condition codes are irrelevant
take_branch_d bv:d 0x7
- set_cc 0x06 ; condition codes are irrelevent
+ set_cc 0x06 ; condition codes are irrelevant
take_branch_d bv:d 0x6
- set_cc 0x05 ; condition codes are irrelevent
+ set_cc 0x05 ; condition codes are irrelevant
no_branch_d bv:d 0x5
- set_cc 0x04 ; condition codes are irrelevent
+ set_cc 0x04 ; condition codes are irrelevant
no_branch_d bv:d 0x4
- set_cc 0x03 ; condition codes are irrelevent
+ set_cc 0x03 ; condition codes are irrelevant
take_branch_d bv:d 0x3
- set_cc 0x02 ; condition codes are irrelevent
+ set_cc 0x02 ; condition codes are irrelevant
take_branch_d bv:d 0x2
- set_cc 0x01 ; condition codes are irrelevent
+ set_cc 0x01 ; condition codes are irrelevant
no_branch_d bv:d 0x1
- set_cc 0x00 ; condition codes are irrelevent
+ set_cc 0x00 ; condition codes are irrelevant
no_branch_d bv:d 0x0
pass
diff --git a/sim/testsuite/sim/fr30/copld.cgs b/sim/testsuite/sim/fr30/copld.cgs
index e0ababb..2273243 100644
--- a/sim/testsuite/sim/fr30/copld.cgs
+++ b/sim/testsuite/sim/fr30/copld.cgs
@@ -10,11 +10,11 @@
copld:
; Test copld copld $u4,$cc,$Rj,CRi
; The current implementation is a noop
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
copld 0,0,r0,cr15
test_cc 1 1 1 1
- set_cc 0x0e ; Condition codes are irrelevent
+ set_cc 0x0e ; Condition codes are irrelevant
copld 15,255,r15,cr0
test_cc 1 1 1 0
diff --git a/sim/testsuite/sim/fr30/copop.cgs b/sim/testsuite/sim/fr30/copop.cgs
index b0afd77..3fe785a 100644
--- a/sim/testsuite/sim/fr30/copop.cgs
+++ b/sim/testsuite/sim/fr30/copop.cgs
@@ -10,11 +10,11 @@
copop:
; Test copop copop $u4,$cc,$CRj,CRi
; The current implementation is a noop
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
copop 0,0,cr0,cr15
test_cc 1 1 1 1
- set_cc 0x0e ; Condition codes are irrelevent
+ set_cc 0x0e ; Condition codes are irrelevant
copop 15,255,cr0,cr15
test_cc 1 1 1 0
diff --git a/sim/testsuite/sim/fr30/copst.cgs b/sim/testsuite/sim/fr30/copst.cgs
index 00120b2..034b920 100644
--- a/sim/testsuite/sim/fr30/copst.cgs
+++ b/sim/testsuite/sim/fr30/copst.cgs
@@ -10,11 +10,11 @@
copst:
; Test copst copst $u4,$cc,$CRj,Ri
; The current implementation is a noop
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
copst 0,0,cr0,r15
test_cc 1 1 1 1
- set_cc 0x0e ; Condition codes are irrelevent
+ set_cc 0x0e ; Condition codes are irrelevant
copst 15,255,cr15,r0
test_cc 1 1 1 0
diff --git a/sim/testsuite/sim/fr30/copsv.cgs b/sim/testsuite/sim/fr30/copsv.cgs
index e00a4f5..45b3e98 100644
--- a/sim/testsuite/sim/fr30/copsv.cgs
+++ b/sim/testsuite/sim/fr30/copsv.cgs
@@ -10,11 +10,11 @@
copsv:
; Test copsv copsv $u4,$cc,$CRj,Ri
; The current implementation is a noop
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
copsv 0,0,cr0,r15
test_cc 1 1 1 1
- set_cc 0x0e ; Condition codes are irrelevent
+ set_cc 0x0e ; Condition codes are irrelevant
copsv 15,255,cr15,r0
test_cc 1 1 1 0
diff --git a/sim/testsuite/sim/fr30/enter.cgs b/sim/testsuite/sim/fr30/enter.cgs
index ae75e16..7d20845 100644
--- a/sim/testsuite/sim/fr30/enter.cgs
+++ b/sim/testsuite/sim/fr30/enter.cgs
@@ -12,7 +12,7 @@ enter:
mvr_h_gr sp,r7 ; save stack pointer
mvr_h_gr sp,r8 ; shadow stack pointer
mvr_h_gr sp,r14 ; Initialize
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
enter 0
test_cc 1 1 1 1
testr_h_gr r8,sp
@@ -22,7 +22,7 @@ enter:
mvr_h_gr sp,r8 ; shadow stack pointer
mvr_h_gr r14,r9 ; save
- set_cc 0x0e ; Condition codes are irrelevent
+ set_cc 0x0e ; Condition codes are irrelevant
enter 0x3fc
test_cc 1 1 1 0
inci_h_gr -4,r8
diff --git a/sim/testsuite/sim/fr30/extsb.cgs b/sim/testsuite/sim/fr30/extsb.cgs
index 6a18d7e..8d4158a 100644
--- a/sim/testsuite/sim/fr30/extsb.cgs
+++ b/sim/testsuite/sim/fr30/extsb.cgs
@@ -10,25 +10,25 @@
extsb:
; Test extsb $Ri
mvi_h_gr 0,r7
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
extsb r7
test_cc 1 1 1 1
test_h_gr 0,r7
mvi_h_gr 0x7f,r7
- set_cc 0x0e ; Condition codes are irrelevent
+ set_cc 0x0e ; Condition codes are irrelevant
extsb r7
test_cc 1 1 1 0
test_h_gr 0x7f,r7
mvi_h_gr 0x80,r7
- set_cc 0x0d ; Condition codes are irrelevent
+ set_cc 0x0d ; Condition codes are irrelevant
extsb r7
test_cc 1 1 0 1
test_h_gr 0xffffff80,r7
mvi_h_gr 0xffffff7f,r7
- set_cc 0x0c ; Condition codes are irrelevent
+ set_cc 0x0c ; Condition codes are irrelevant
extsb r7
test_cc 1 1 0 0
test_h_gr 0x7f,r7
diff --git a/sim/testsuite/sim/fr30/extsh.cgs b/sim/testsuite/sim/fr30/extsh.cgs
index eb12fd0..1e575ee 100644
--- a/sim/testsuite/sim/fr30/extsh.cgs
+++ b/sim/testsuite/sim/fr30/extsh.cgs
@@ -10,37 +10,37 @@
extsh:
; Test extsh $Ri
mvi_h_gr 0,r7
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
extsh r7
test_cc 1 1 1 1
test_h_gr 0,r7
mvi_h_gr 0x7f,r7
- set_cc 0x0e ; Condition codes are irrelevent
+ set_cc 0x0e ; Condition codes are irrelevant
extsh r7
test_cc 1 1 1 0
test_h_gr 0x7f,r7
mvi_h_gr 0x80,r7
- set_cc 0x0d ; Condition codes are irrelevent
+ set_cc 0x0d ; Condition codes are irrelevant
extsh r7
test_cc 1 1 0 1
test_h_gr 0x80,r7
mvi_h_gr 0x7fff,r7
- set_cc 0x0c ; Condition codes are irrelevent
+ set_cc 0x0c ; Condition codes are irrelevant
extsh r7
test_cc 1 1 0 0
test_h_gr 0x7fff,r7
mvi_h_gr 0x8000,r7
- set_cc 0x0b ; Condition codes are irrelevent
+ set_cc 0x0b ; Condition codes are irrelevant
extsh r7
test_cc 1 0 1 1
test_h_gr 0xffff8000,r7
mvi_h_gr 0xffff7fff,r7
- set_cc 0x0a ; Condition codes are irrelevent
+ set_cc 0x0a ; Condition codes are irrelevant
extsh r7
test_cc 1 0 1 0
test_h_gr 0x7fff,r7
diff --git a/sim/testsuite/sim/fr30/extub.cgs b/sim/testsuite/sim/fr30/extub.cgs
index ddcc683..846f95f 100644
--- a/sim/testsuite/sim/fr30/extub.cgs
+++ b/sim/testsuite/sim/fr30/extub.cgs
@@ -10,31 +10,31 @@
extub:
; Test extub $Ri
mvi_h_gr 0,r7
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
extub r7
test_cc 1 1 1 1
test_h_gr 0,r7
mvi_h_gr 0x7f,r7
- set_cc 0x0e ; Condition codes are irrelevent
+ set_cc 0x0e ; Condition codes are irrelevant
extub r7
test_cc 1 1 1 0
test_h_gr 0x7f,r7
mvi_h_gr 0x80,r7
- set_cc 0x0d ; Condition codes are irrelevent
+ set_cc 0x0d ; Condition codes are irrelevant
extub r7
test_cc 1 1 0 1
test_h_gr 0x80,r7
mvi_h_gr 0xffffff7f,r7
- set_cc 0x0c ; Condition codes are irrelevent
+ set_cc 0x0c ; Condition codes are irrelevant
extub r7
test_cc 1 1 0 0
test_h_gr 0x7f,r7
mvi_h_gr 0xffffff80,r7
- set_cc 0x0b ; Condition codes are irrelevent
+ set_cc 0x0b ; Condition codes are irrelevant
extub r7
test_cc 1 0 1 1
test_h_gr 0x80,r7
diff --git a/sim/testsuite/sim/fr30/extuh.cgs b/sim/testsuite/sim/fr30/extuh.cgs
index fa2579e..c4ed4ad 100644
--- a/sim/testsuite/sim/fr30/extuh.cgs
+++ b/sim/testsuite/sim/fr30/extuh.cgs
@@ -10,43 +10,43 @@
extuh:
; Test extuh $Ri
mvi_h_gr 0,r7
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
extuh r7
test_cc 1 1 1 1
test_h_gr 0,r7
mvi_h_gr 0x7f,r7
- set_cc 0x0e ; Condition codes are irrelevent
+ set_cc 0x0e ; Condition codes are irrelevant
extuh r7
test_cc 1 1 1 0
test_h_gr 0x7f,r7
mvi_h_gr 0x80,r7
- set_cc 0x0d ; Condition codes are irrelevent
+ set_cc 0x0d ; Condition codes are irrelevant
extuh r7
test_cc 1 1 0 1
test_h_gr 0x80,r7
mvi_h_gr 0x7fff,r7
- set_cc 0x0e ; Condition codes are irrelevent
+ set_cc 0x0e ; Condition codes are irrelevant
extuh r7
test_cc 1 1 1 0
test_h_gr 0x7fff,r7
mvi_h_gr 0x8000,r7
- set_cc 0x0d ; Condition codes are irrelevent
+ set_cc 0x0d ; Condition codes are irrelevant
extuh r7
test_cc 1 1 0 1
test_h_gr 0x8000,r7
mvi_h_gr 0xffff7fff,r7
- set_cc 0x0c ; Condition codes are irrelevent
+ set_cc 0x0c ; Condition codes are irrelevant
extuh r7
test_cc 1 1 0 0
test_h_gr 0x7fff,r7
mvi_h_gr 0xffff8000,r7
- set_cc 0x0b ; Condition codes are irrelevent
+ set_cc 0x0b ; Condition codes are irrelevant
extuh r7
test_cc 1 0 1 1
test_h_gr 0x8000,r7
diff --git a/sim/testsuite/sim/fr30/ldres.cgs b/sim/testsuite/sim/fr30/ldres.cgs
index 0083489..c03e341 100644
--- a/sim/testsuite/sim/fr30/ldres.cgs
+++ b/sim/testsuite/sim/fr30/ldres.cgs
@@ -11,13 +11,13 @@ ldres:
; Test ldres $@Ri+,$u4
; The current implementation simply increments Ri
mvi_h_gr 0x1000,r7
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
ldres @r7+,0
test_cc 1 1 1 1
test_h_gr 0x1004,r7
mvi_h_gr 0x1000,r7
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
ldres @r7+,0xf
test_cc 1 1 1 1
test_h_gr 0x1004,r7
diff --git a/sim/testsuite/sim/fr30/leave.cgs b/sim/testsuite/sim/fr30/leave.cgs
index 4d3dd70..225d3ed 100644
--- a/sim/testsuite/sim/fr30/leave.cgs
+++ b/sim/testsuite/sim/fr30/leave.cgs
@@ -14,7 +14,7 @@ leave:
inci_h_gr -4,r14
mvi_h_mem 0xdeadbeef,r14
mvi_h_gr 0xbeefdead,r15
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
leave
test_cc 1 1 1 1
testr_h_gr sp,r7
diff --git a/sim/testsuite/sim/fr30/nop.cgs b/sim/testsuite/sim/fr30/nop.cgs
index 885c55c..10848ae 100644
--- a/sim/testsuite/sim/fr30/nop.cgs
+++ b/sim/testsuite/sim/fr30/nop.cgs
@@ -9,7 +9,7 @@
.global nop
nop:
; Test nop
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
nop
test_cc 1 1 1 1
diff --git a/sim/testsuite/sim/fr30/stres.cgs b/sim/testsuite/sim/fr30/stres.cgs
index a85fdf3..fd9c07e 100644
--- a/sim/testsuite/sim/fr30/stres.cgs
+++ b/sim/testsuite/sim/fr30/stres.cgs
@@ -11,13 +11,13 @@ stres:
; Test stres $@Ri+,$u4
; The current implementation simply increments Ri
mvi_h_gr 0x1000,r7
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
stres 0,@r7+
test_cc 1 1 1 1
test_h_gr 0x1004,r7
mvi_h_gr 0x1000,r7
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
stres 0xf,@r7+
test_cc 1 1 1 1
test_h_gr 0x1004,r7
diff --git a/sim/testsuite/sim/fr30/xchb.cgs b/sim/testsuite/sim/fr30/xchb.cgs
index 3450a2e..08b8fb5 100644
--- a/sim/testsuite/sim/fr30/xchb.cgs
+++ b/sim/testsuite/sim/fr30/xchb.cgs
@@ -11,7 +11,7 @@ xchb:
; Test xchb @$Rj,Ri
mvi_h_mem 0xdeadbeef,sp
mvi_h_gr 0xbeefdead,r0
- set_cc 0x0f ; Condition codes are irrelevent
+ set_cc 0x0f ; Condition codes are irrelevant
xchb @sp,r0
test_cc 1 1 1 1
test_h_gr 0xde,r0
diff --git a/sim/testsuite/sim/h8300/ldc.s b/sim/testsuite/sim/h8300/ldc.s
index 3712a6c..56eb949 100644
--- a/sim/testsuite/sim/h8300/ldc.s
+++ b/sim/testsuite/sim/h8300/ldc.s
@@ -341,7 +341,7 @@ ldc_reg_sbr:
mov #0xaaaaaaaa, er0
ldc er0, sbr ; set sbr to 0xaaaaaaaa
- stc sbr, er1 ; retreive and check sbr value
+ stc sbr, er1 ; retrieve and check sbr value
test_h_gr32 0xaaaaaaaa er1
test_h_gr32 0xaaaaaaaa er0 ; Register 0 modified by test procedure.
@@ -358,7 +358,7 @@ ldc_reg_vbr:
mov #0xaaaaaaaa, er0
ldc er0, vbr ; set sbr to 0xaaaaaaaa
- stc vbr, er1 ; retreive and check sbr value
+ stc vbr, er1 ; retrieve and check sbr value
test_h_gr32 0xaaaaaaaa er1
test_h_gr32 0xaaaaaaaa er0 ; Register 0 modified by test procedure.
diff --git a/sim/testsuite/sim/h8300/stc.s b/sim/testsuite/sim/h8300/stc.s
index 232bd5a..4b86ff3 100644
--- a/sim/testsuite/sim/h8300/stc.s
+++ b/sim/testsuite/sim/h8300/stc.s
@@ -304,7 +304,7 @@ stc_sbr_reg:
mov #0xaaaaaaaa, er0
ldc er0, sbr ; set sbr to 0xaaaaaaaa
- stc sbr, er1 ; retreive and check sbr value
+ stc sbr, er1 ; retrieve and check sbr value
test_h_gr32 0xaaaaaaaa er1
test_h_gr32 0xaaaaaaaa er0 ; Register 0 modified by test procedure.
@@ -321,7 +321,7 @@ stc_vbr_reg:
mov #0xaaaaaaaa, er0
ldc er0, vbr ; set sbr to 0xaaaaaaaa
- stc vbr, er1 ; retreive and check sbr value
+ stc vbr, er1 ; retrieve and check sbr value
test_h_gr32 0xaaaaaaaa er1
test_h_gr32 0xaaaaaaaa er0 ; Register 0 modified by test procedure.
diff --git a/sim/testsuite/sim/mips/hilo-hazard-3.s b/sim/testsuite/sim/mips/hilo-hazard-3.s
index 1a0949d..e9a1595 100644
--- a/sim/testsuite/sim/mips/hilo-hazard-3.s
+++ b/sim/testsuite/sim/mips/hilo-hazard-3.s
@@ -1,4 +1,4 @@
-# Test for mf{hi,lo} -> mult/div/mt{hi,lo} with 2 nops inbetween.
+# Test for mf{hi,lo} -> mult/div/mt{hi,lo} with 2 nops in between.
#
# mach: all
# as: -mabi=eabi
diff --git a/sim/testsuite/sim/mips/hilo-hazard-4.s b/sim/testsuite/sim/mips/hilo-hazard-4.s
index 8a4c888..ba298b4 100644
--- a/sim/testsuite/sim/mips/hilo-hazard-4.s
+++ b/sim/testsuite/sim/mips/hilo-hazard-4.s
@@ -1,4 +1,4 @@
-# Test for mf{hi,lo} -> mult/div/mt{hi,lo} with 2 nops inbetween.
+# Test for mf{hi,lo} -> mult/div/mt{hi,lo} with 2 nops in between.
#
# mach: all
# as: -mabi=eabi -mmicromips
diff --git a/sim/testsuite/sim/sh/fipr.s b/sim/testsuite/sim/sh/fipr.s
index 6a949aa..50bbc5c 100644
--- a/sim/testsuite/sim/sh/fipr.s
+++ b/sim/testsuite/sim/sh/fipr.s
@@ -58,7 +58,7 @@ test_infp:
# fr11 should be plus infinity
assert_fpreg_x 0x7f800000, fr11
test_infm:
- # Test negitive infinity
+ # Test negative infinity
fldi0 fr11
mov.l infm, r0
lds r0, fpul
--
2.7.4