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On 24 Apr 2015 14:53, Mike Frysinger wrote: > On 24 Apr 2015 15:42, Nick Clifton wrote: > > --- a/sim/bfin/bfin-sim.c > > +++ b/sim/bfin/bfin-sim.c > > @@ -4318,7 +4318,7 @@ decode_dsp32alu_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1) > > SET_AREG (1, 0); > > } > > else if ((aop == 0 || aop == 1 || aop == 2) && s == 1 && aopcde == 8 > > - && x == 0 && s == 1 && HL == 0) > > + && x == 0 && HL == 0) > > { > > bs40 acc0 = get_extended_acc (cpu, 0); > > bs40 acc1 = get_extended_acc (cpu, 1); > > this one i was sitting on until i could go through the ISA and figure out the > exact matching. it is duplicated as-is, but it might have been a typo and > should have been checking a different field. but i'll follow up on that > independently. looks like deleting the check is fine. all the other fields in the encoding are covered here or earlier. thanks! -mike
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