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Re: [PATCH] MIPS: Handle MIPS-3D and DSP ASE branch instructions
- From: Joel Brobecker <brobecker at adacore dot com>
- To: "Maciej W. Rozycki" <macro at codesourcery dot com>
- Cc: gdb-patches at sourceware dot org
- Date: Mon, 5 Dec 2011 12:14:28 +0100
- Subject: Re: [PATCH] MIPS: Handle MIPS-3D and DSP ASE branch instructions
- References: <alpine.DEB.1.10.1111231911431.4191@tp.orcam.me.uk>
> 2011-11-23 Maciej W. Rozycki <macro@codesourcery.com>
>
> gdb/
> * mips-tdep.c (mips32_bc1_pc): New function, factored out from...
> (mips32_next_pc): ... here. Handle BC1ANY2F, BC1ANY2T, BC1ANY4F,
> BC1ANY4T, BPOSGE32 and BPOSGE64 instructions.
> (deal_with_atomic_sequence): Likewise.
> (mips32_instruction_has_delay_slot): Likewise.
Pre-approved with one minor coding-style change...
> + return (op >> 2 == 5) /* BEQL, BNEL, BLEZL, BGTZL: bits 0101xx */
> + || (op == 29) /* JALX: bits 011101 */
> + || ((op == 17)
> + && ((rs == 8)
> /* BC1F, BC1FL, BC1T, BC1TL: 010001 01000 */
> + || ((rs == 9) && ((rt & 0x2) == 0))
> + /* BC1ANY2F, BC1ANY2T: bits 010001 01001 */
> + || ((rs == 10) && ((rt & 0x2) == 0))));
> + /* BC1ANY4F, BC1ANY4T: bits 010001 01010 */
Use an extra pair of parentheses around the entire condition...
--
Joel