This is the mail archive of the gdb-patches@sources.redhat.com mailing list for the GDB project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

PATCH RFA: Use non-standard MIPS quiet NaN value in simulator


MIPS processors use a non-standard value for a quiet NaN, as described
here:
    http://gcc.gnu.org/ml/gcc-patches/2003-03/msg02061.html

This patch makes a similar change to the MIPS simulator, so that it
more correctly emulates the hardware.  This is needed for the gcc test
gcc.c-torture/execute/ieee/copysign1.c to pass.

OK for mainline?

Ian


sim/common/ChangeLog:

2005-07-07  Ian Lance Taylor  <ian@airs.com>

	* sim-fpu.c (pack_fpu): If SIM_QUIET_NAN_NEGATED is defined, use a
	different fraction for a quiet NaN.
	(unpack_fpu): Likewise.

sim/mips/ChangeLog:

2005-07-07  Ian Lance Taylor  <ian@airs.com>

	* tconfig.in (SIM_QUIET_NAN_NEGATED): Define.


Index: common/sim-fpu.c
===================================================================
RCS file: /cvs/src/src/sim/common/sim-fpu.c,v
retrieving revision 1.8
diff -p -u -r1.8 sim-fpu.c
--- common/sim-fpu.c	22 Jun 2003 13:36:26 -0000	1.8
+++ common/sim-fpu.c	8 Jul 2005 05:05:12 -0000
@@ -201,7 +201,11 @@ pack_fpu (const sim_fpu *src,
       /* force fraction to correct class */
       fraction = src->fraction;
       fraction >>= NR_GUARDS;
+#ifdef SIM_QUIET_NAN_NEGATED
+      fraction |= QUIET_NAN - 1;
+#else
       fraction |= QUIET_NAN;
+#endif
       break;
     case sim_fpu_class_snan:
       sign = src->sign;
@@ -362,10 +366,17 @@ unpack_fpu (sim_fpu *dst, unsigned64 pac
 	}
       else
 	{
+	  int qnan;
+
 	  /* Non zero fraction, means NaN */
 	  dst->sign = sign;
 	  dst->fraction = (fraction << NR_GUARDS);
-	  if (fraction >= QUIET_NAN)
+#ifdef SIM_QUIET_NAN_NEGATED
+	  qnan = (fraction & QUIET_NAN) == 0;
+#else
+	  qnan = fraction >= QUIET_NAN;
+#endif
+	  if (qnan)
 	    dst->class = sim_fpu_class_qnan;
 	  else
 	    dst->class = sim_fpu_class_snan;
Index: mips/tconfig.in
===================================================================
RCS file: /cvs/src/src/sim/mips/tconfig.in,v
retrieving revision 1.2
diff -p -u -r1.2 tconfig.in
--- mips/tconfig.in	17 Dec 2002 07:27:53 -0000	1.2
+++ mips/tconfig.in	8 Jul 2005 05:05:12 -0000
@@ -31,3 +31,6 @@ MODULE_INSTALL_FN dv_sockser_install;
 /* Define this if the target cpu is bi-endian
    and the simulator supports it.  */
 #define SIM_HAVE_BIENDIAN
+
+/* MIPS uses an unusual format for floating point quiet NaNs.  */
+#define SIM_QUIET_NAN_NEGATED


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]