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Re: RFA: handle missing fpregs
Kevin Buettner <kevinb@redhat.com> writes:
> This portion of the above ChangeLog entry...
>
> > (ppc_supply_fpregset, ppc_collect_fpregset,
> > rs6000_push_dummy_call, rs6000_extract_return_value,
> > rs6000_store_return_value): Assert that we have floating-point
>
> ...should be formated differently:
>
> (ppc_supply_fpregset, ppc_collect_fpregset)
> (rs6000_push_dummy_call, rs6000_extract_return_value)
> (rs6000_store_return_value): Assert that we have floating-point
>
> Personally, I prefer the way you did it, but I've been told that emacs
> likes the other form better.
Thanks very much. I knew this rule, and missed that. I've fixed the
other instances of comma-terminated ChangeLog lines.
> Regarding:
> > *** gdb/ppc-tdep.h 2004-05-06 14:18:00.000000000 -0500
> > --- gdb/ppc-tdep.h 2004-05-06 14:35:11.000000000 -0500
> [...]
> > *************** struct gdbarch_tdep
> > *** 150,158 ****
> > --- 150,162 ----
> > int ppc_lr_regnum; /* Link register */
> > int ppc_ctr_regnum; /* Count register */
> > int ppc_xer_regnum; /* Integer exception register */
> > +
> > + /* On RS6000 variants that have no floating-point registers, the
> > + next two members will be -1. */
>
> I'm not comfortable with the term "RS6000 variants" here. I'd be happier
> with "PPC variants", though that's probably not strictly correct either.
> I suppose you could just say "On cores that have no floating-point
> registers...".
The issue is that people might not immediately see all PPC's as RS6000
variants, right? Fair enough. "RS6000 variants" is historically
correct, but it's not like anyone has fabricated an RS6000 in recent
history. I've changed that to "On PPC and RS6000 variants that ...".
> Regarding:
>
> > *** gdb/rs6000-nat.c 2004-05-06 14:18:00.000000000 -0500
> > --- gdb/rs6000-nat.c 2004-05-06 14:35:11.000000000 -0500
> [...]
> > *************** fetch_core_registers (char *core_reg_sec
> > *** 583,591 ****
> > for (regi = 0; regi < 32; regi++)
> > supply_register (regi, (char *) ®s->r64.gpr[regi]);
> >
> > ! for (regi = 0; regi < 32; regi++)
> > ! supply_register (tdep->ppc_fp0_regnum + regi,
> > ! (char *) ®s->r64.fpr[regi]);
> >
> > supply_register (PC_REGNUM, (char *) ®s->r64.iar);
> > supply_register (tdep->ppc_ps_regnum, (char *) ®s->r64.msr);
> > --- 589,598 ----
> > for (regi = 0; regi < 32; regi++)
> > supply_register (regi, (char *) ®s->r64.gpr[regi]);
> >
> > ! if (tdep->ppc_fp0_regnum >= 0)
> > ! for (regi = 0; regi < 32; regi++)
> > ! supply_register (tdep->ppc_fp0_regnum + regi,
> > ! (char *) ®s->r64.fpr[regi]);
> >
> > supply_register (PC_REGNUM, (char *) ®s->r64.iar);
> > supply_register (tdep->ppc_ps_regnum, (char *) ®s->r64.msr);
>
> I know it's not really related to this patch, but I happened to notice
> that constant 32 in the above (and elsewhere too). If you get a
> chance, could you change these to use either ppc_num_fprs or
> ppc_num_gprs? (I mention this because I noticed that you had made
> this kind of change at several points elsewhere in the current patch.
> A separate patch which addressed these remaining occurrences would
> certainly be welcome.)
Sure --- I was actually thinking about doing that; now I definitely
will.
Here is the revised patch.
2004-05-06 Jim Blandy <jimb@redhat.com>
* ppc-tdep.h (struct gdbarch_tdep): Change definition of
ppc_fp0_regnum and ppc_fpscr_regnum: if they are -1, then this
processor variant lacks those registers.
(ppc_floating_point_unit_p): Change description to make it clear
that this returns info about the ISA, not the ABI.
* rs6000-tdep.c (ppc_floating_point_unit_p): Decide whether to
return true or false by checking tdep->ppc_fp0_regnum and
tdep->ppc_fpscr_regnum. The original code replicated the BFD
arch/mach switching done in rs6000_gdbarch_init; it's better to
keep that logic there, and just check the results here.
(rs6000_gdbarch_init): On the E500, set tdep->ppc_fp0_regnum and
tdep->ppc_fpscr_regnum to -1 to indicate that we have no
floating-point registers.
(ppc_supply_fpregset, ppc_collect_fpregset)
(rs6000_push_dummy_call, rs6000_extract_return_value)
(rs6000_store_return_value): Assert that we have floating-point
registers.
(rs6000_dwarf2_stab_reg_to_regnum): Add FIXME.
(rs6000_frame_cache): Don't note the locations at which
floating-point registers were saved if we have no fprs.
* aix-thread.c (supply_fprs, fill_fprs): Assert that we have FP
registers.
(fetch_regs_user_thread, fetch_regs_kernel_thread)
(store_regs_user_thread, store_regs_kernel_thread): Only call
supply_fprs / fill_fprs if we actually have floating-point
registers.
(special_register_p): Check ppc_fpscr_regnum before matching
against it.
(supply_sprs64, supply_sprs32, fill_sprs64, fill_sprs32): Don't
supply / collect fpscr if we don't have it.
* ppc-bdm.c: #include "gdb_assert.h".
(bdm_ppc_fetch_registers, bdm_ppc_store_registers): Assert that we
have floating-point registers, since I can't test this code on
FP-free systems to adapt it.
* ppc-linux-nat.c (ppc_register_u_addr): Don't match against the
fpscr and floating point register numbers if they don't exist.
(fetch_register): Assert that we have floating-point registers
before we reach the code that handles them.
(store_register): Same. And use tdep instead of calling
gdbarch_tdep again.
(fill_fpregset): Don't try to collect FP registers and fpscr if we
don't have them.
(ppc_linux_sigtramp_cache): Don't record the saved locations of
fprs and fpscr if we don't have them.
(ppc_linux_supply_fpregset): Don't supply fp regs and fpscr if we
don't have them.
* ppcnbsd-nat.c: #include "gdb_assert.h".
(getfpregs_supplies): Assert that we have floating-point registers.
* ppcnbsd-tdep.c (ppcnbsd_supply_fpreg, ppcnbsd_fill_fpreg): Same.
* ppcobsd-tdep.c: #include "gdb_assert.h".
(ppcobsd_supply_gregset, ppcobsd_collect_gregset): Assert that we
have floating-point registers.
* rs6000-nat.c (regmap): Don't match against the fpscr and
floating point register numbers if they don't exist.
(fetch_inferior_registers, store_inferior_registers,
fetch_core_registers): Only fetch / store / supply the
floating-point registers and the fpscr if we have them.
* Makefile.in (ppc-bdm.o, ppc-linux-nat.o, ppcnbsd-nat.o)
(ppcobsd-tdep.o): Update dependencies.
Index: gdb/aix-thread.c
===================================================================
RCS file: /cvs/src/src/gdb/aix-thread.c,v
retrieving revision 1.20
diff -c -p -r1.20 aix-thread.c
*** gdb/aix-thread.c 7 May 2004 20:50:37 -0000 1.20
--- gdb/aix-thread.c 7 May 2004 21:03:48 -0000
*************** supply_fprs (double *vals)
*** 1023,1028 ****
--- 1023,1032 ----
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
int regno;
+ /* This function should never be called on architectures without
+ floating-point registers. */
+ gdb_assert (ppc_floating_point_p (current_gdbarch));
+
for (regno = 0; regno < 32; regno++)
supply_register (regno + tdep->ppc_fp0_regnum, (char *) (vals + regno));
}
*************** special_register_p (int regno)
*** 1039,1045 ****
|| regno == tdep->ppc_lr_regnum
|| regno == tdep->ppc_ctr_regnum
|| regno == tdep->ppc_xer_regnum
! || regno == tdep->ppc_fpscr_regnum
|| (tdep->ppc_mq_regnum >= 0 && regno == tdep->ppc_mq_regnum);
}
--- 1043,1049 ----
|| regno == tdep->ppc_lr_regnum
|| regno == tdep->ppc_ctr_regnum
|| regno == tdep->ppc_xer_regnum
! || (tdep->ppc_fpscr_regnum >= 0 && regno == tdep->ppc_fpscr_regnum)
|| (tdep->ppc_mq_regnum >= 0 && regno == tdep->ppc_mq_regnum);
}
*************** supply_sprs64 (uint64_t iar, uint64_t ms
*** 1060,1066 ****
supply_register (tdep->ppc_lr_regnum, (char *) &lr);
supply_register (tdep->ppc_ctr_regnum, (char *) &ctr);
supply_register (tdep->ppc_xer_regnum, (char *) &xer);
! supply_register (tdep->ppc_fpscr_regnum, (char *) &fpscr);
}
/* Record that the special registers contain the specified 32-bit
--- 1064,1071 ----
supply_register (tdep->ppc_lr_regnum, (char *) &lr);
supply_register (tdep->ppc_ctr_regnum, (char *) &ctr);
supply_register (tdep->ppc_xer_regnum, (char *) &xer);
! if (tdep->ppc_fpscr_regnum >= 0)
! supply_register (tdep->ppc_fpscr_regnum, (char *) &fpscr);
}
/* Record that the special registers contain the specified 32-bit
*************** supply_sprs32 (uint32_t iar, uint32_t ms
*** 1079,1085 ****
supply_register (tdep->ppc_lr_regnum, (char *) &lr);
supply_register (tdep->ppc_ctr_regnum, (char *) &ctr);
supply_register (tdep->ppc_xer_regnum, (char *) &xer);
! supply_register (tdep->ppc_fpscr_regnum, (char *) &fpscr);
}
/* Fetch all registers from pthread PDTID, which doesn't have a kernel
--- 1084,1091 ----
supply_register (tdep->ppc_lr_regnum, (char *) &lr);
supply_register (tdep->ppc_ctr_regnum, (char *) &ctr);
supply_register (tdep->ppc_xer_regnum, (char *) &xer);
! if (tdep->ppc_fpscr_regnum >= 0)
! supply_register (tdep->ppc_fpscr_regnum, (char *) &fpscr);
}
/* Fetch all registers from pthread PDTID, which doesn't have a kernel
*************** fetch_regs_user_thread (pthdb_pthread_t
*** 1113,1119 ****
/* Floating-point registers. */
! supply_fprs (ctx.fpr);
/* Special registers. */
--- 1119,1126 ----
/* Floating-point registers. */
! if (ppc_floating_point_p (current_gdbarch))
! supply_fprs (ctx.fpr);
/* Special registers. */
*************** fetch_regs_kernel_thread (int regno, pth
*** 1179,1187 ****
/* Floating-point registers. */
! if (regno == -1
! || (regno >= tdep->ppc_fp0_regnum
! && regno < tdep->ppc_fp0_regnum + ppc_num_fprs))
{
if (!ptrace32 (PTT_READ_FPRS, tid, (int *) fprs, 0, NULL))
memset (fprs, 0, sizeof (fprs));
--- 1186,1195 ----
/* Floating-point registers. */
! if (ppc_floating_point_unit_p (current_gdbarch)
! && (regno == -1
! || (regno >= tdep->ppc_fp0_regnum
! && regno < tdep->ppc_fp0_regnum + ppc_num_fprs)))
{
if (!ptrace32 (PTT_READ_FPRS, tid, (int *) fprs, 0, NULL))
memset (fprs, 0, sizeof (fprs));
*************** fill_fprs (double *vals)
*** 1271,1276 ****
--- 1279,1288 ----
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
int regno;
+ /* This function should never be called on architectures without
+ floating-point registers. */
+ gdb_assert (ppc_floating_point_p (current_gdbarch));
+
for (regno = tdep->ppc_fp0_regnum;
regno < tdep->ppc_fp0_regnum + ppc_num_fprs;
regno++)
*************** fill_sprs64 (uint64_t *iar, uint64_t *ms
*** 1307,1313 ****
regcache_collect (tdep->ppc_ctr_regnum, ctr);
if (register_cached (tdep->ppc_xer_regnum))
regcache_collect (tdep->ppc_xer_regnum, xer);
! if (register_cached (tdep->ppc_fpscr_regnum))
regcache_collect (tdep->ppc_fpscr_regnum, fpscr);
}
--- 1319,1326 ----
regcache_collect (tdep->ppc_ctr_regnum, ctr);
if (register_cached (tdep->ppc_xer_regnum))
regcache_collect (tdep->ppc_xer_regnum, xer);
! if (tdep->ppc_fpscr_regnum >= 0
! && register_cached (tdep->ppc_fpscr_regnum))
regcache_collect (tdep->ppc_fpscr_regnum, fpscr);
}
*************** fill_sprs32 (unsigned long *iar, unsigne
*** 1342,1348 ****
regcache_collect (tdep->ppc_ctr_regnum, ctr);
if (register_cached (tdep->ppc_xer_regnum))
regcache_collect (tdep->ppc_xer_regnum, xer);
! if (register_cached (tdep->ppc_fpscr_regnum))
regcache_collect (tdep->ppc_fpscr_regnum, fpscr);
}
--- 1355,1362 ----
regcache_collect (tdep->ppc_ctr_regnum, ctr);
if (register_cached (tdep->ppc_xer_regnum))
regcache_collect (tdep->ppc_xer_regnum, xer);
! if (tdep->ppc_fpscr_regnum >= 0
! && register_cached (tdep->ppc_fpscr_regnum))
regcache_collect (tdep->ppc_fpscr_regnum, fpscr);
}
*************** store_regs_user_thread (pthdb_pthread_t
*** 1390,1396 ****
}
/* Collect floating-point register values from the regcache. */
! fill_fprs (ctx.fpr);
/* Special registers (always kept in ctx as 64 bits). */
if (arch64)
--- 1404,1411 ----
}
/* Collect floating-point register values from the regcache. */
! if (ppc_floating_point_p (current_gdbarch))
! fill_fprs (ctx.fpr);
/* Special registers (always kept in ctx as 64 bits). */
if (arch64)
*************** store_regs_kernel_thread (int regno, pth
*** 1480,1488 ****
/* Floating-point registers. */
! if (regno == -1
! || (regno >= tdep->ppc_fp0_regnum
! && regno < tdep->ppc_fp0_regnum + ppc_num_fprs))
{
/* Pre-fetch: some regs may not be in the cache. */
ptrace32 (PTT_READ_FPRS, tid, (int *) fprs, 0, NULL);
--- 1495,1504 ----
/* Floating-point registers. */
! if (ppc_floating_point_unit_p (current_gdbarch)
! && (regno == -1
! || (regno >= tdep->ppc_fp0_regnum
! && regno < tdep->ppc_fp0_regnum + ppc_num_fprs)))
{
/* Pre-fetch: some regs may not be in the cache. */
ptrace32 (PTT_READ_FPRS, tid, (int *) fprs, 0, NULL);
Index: gdb/ppc-bdm.c
===================================================================
RCS file: /cvs/src/src/gdb/ppc-bdm.c,v
retrieving revision 1.20
diff -c -p -r1.20 ppc-bdm.c
*** gdb/ppc-bdm.c 5 May 2004 01:46:55 -0000 1.20
--- gdb/ppc-bdm.c 7 May 2004 21:03:48 -0000
***************
*** 37,42 ****
--- 37,43 ----
#include "ocd.h"
#include "ppc-tdep.h"
#include "regcache.h"
+ #include "gdb_assert.h"
static void bdm_ppc_open (char *name, int from_tty);
*************** bdm_ppc_fetch_registers (int regno)
*** 193,198 ****
--- 194,205 ----
return; /* Unsupported register */
}
+ /* FIXME: jimb/2004-05-04: I'm not sure how to adapt this code to
+ processors that lack floating point registers, and I don't have
+ have the equipment to test it. So we'll leave that case for the
+ next person who encounters it. */
+ gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
+
#if 1
/* Can't ask for floating point regs on ppc 8xx, also need to
avoid asking for the mq register. */
*************** bdm_ppc_store_registers (int regno)
*** 286,291 ****
--- 293,304 ----
if (first_bdm_regno == -1)
return; /* Unsupported register */
+
+ /* FIXME: jimb/2004-05-04: I'm not sure how to adapt this code to
+ processors that lack floating point registers, and I don't have
+ have the equipment to test it. So we'll leave that case for the
+ next person who encounters it. */
+ gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
for (i = first_regno; i <= last_regno; i++)
{
Index: gdb/ppc-linux-nat.c
===================================================================
RCS file: /cvs/src/src/gdb/ppc-linux-nat.c,v
retrieving revision 1.34
diff -c -p -r1.34 ppc-linux-nat.c
*** gdb/ppc-linux-nat.c 5 May 2004 01:48:37 -0000 1.34
--- gdb/ppc-linux-nat.c 7 May 2004 21:03:48 -0000
***************
*** 26,31 ****
--- 26,32 ----
#include "inferior.h"
#include "gdbcore.h"
#include "regcache.h"
+ #include "gdb_assert.h"
#include <sys/types.h>
#include <sys/param.h>
*************** ppc_register_u_addr (int regno)
*** 139,145 ****
/* Floating point regs: eight bytes each in both 32- and 64-bit
ptrace interfaces. Thus, two slots each in 32-bit interface, one
slot each in 64-bit interface. */
! if (regno >= tdep->ppc_fp0_regnum
&& regno < tdep->ppc_fp0_regnum + ppc_num_fprs)
u_addr = (PT_FPR0 * wordsize) + ((regno - tdep->ppc_fp0_regnum) * 8);
--- 140,147 ----
/* Floating point regs: eight bytes each in both 32- and 64-bit
ptrace interfaces. Thus, two slots each in 32-bit interface, one
slot each in 64-bit interface. */
! if (tdep->ppc_fp0_regnum >= 0
! && regno >= tdep->ppc_fp0_regnum
&& regno < tdep->ppc_fp0_regnum + ppc_num_fprs)
u_addr = (PT_FPR0 * wordsize) + ((regno - tdep->ppc_fp0_regnum) * 8);
*************** ppc_register_u_addr (int regno)
*** 160,166 ****
#endif
if (regno == tdep->ppc_ps_regnum)
u_addr = PT_MSR * wordsize;
! if (regno == tdep->ppc_fpscr_regnum)
u_addr = PT_FPSCR * wordsize;
return u_addr;
--- 162,169 ----
#endif
if (regno == tdep->ppc_ps_regnum)
u_addr = PT_MSR * wordsize;
! if (tdep->ppc_fpscr_regnum >= 0
! && regno == tdep->ppc_fpscr_regnum)
u_addr = PT_FPSCR * wordsize;
return u_addr;
*************** fetch_register (int tid, int regno)
*** 234,239 ****
--- 237,247 ----
return;
}
+ /* If the current architecture has no floating-point registers, we
+ should never reach this point: ppc_register_u_addr should have
+ returned -1, and we should have caught that above. */
+ gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
+
/* Read the raw register using PTRACE_XFER_TYPE sized chunks. On a
32-bit platform, 64-bit floating-point registers will require two
transfers. */
*************** store_register (int tid, int regno)
*** 412,417 ****
--- 420,430 ----
if (regaddr == -1)
return;
+ /* If the current architecture has no floating-point registers, we
+ should never reach this point: ppc_register_u_addr should have
+ returned -1, and we should have caught that above. */
+ gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
+
/* First collect the register value from the regcache. Be careful
to to convert the regcache's wordsize into ptrace's wordsize. */
memset (buf, 0, sizeof buf);
*************** store_register (int tid, int regno)
*** 436,442 ****
regaddr += sizeof (PTRACE_XFER_TYPE);
if (errno == EIO
! && regno == gdbarch_tdep (current_gdbarch)->ppc_fpscr_regnum)
{
/* Some older kernel versions don't allow fpscr to be written. */
continue;
--- 449,455 ----
regaddr += sizeof (PTRACE_XFER_TYPE);
if (errno == EIO
! && regno == tdep->ppc_fpscr_regnum)
{
/* Some older kernel versions don't allow fpscr to be written. */
continue;
*************** fill_fpregset (gdb_fpregset_t *fpregsetp
*** 620,630 ****
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
bfd_byte *fpp = (void *) fpregsetp;
! for (regi = 0; regi < 32; regi++)
{
! if ((regno == -1) || (regno == tdep->ppc_fp0_regnum + regi))
! regcache_collect (tdep->ppc_fp0_regnum + regi, fpp + 8 * regi);
}
- if ((regno == -1) || regno == tdep->ppc_fpscr_regnum)
- right_fill_reg (tdep->ppc_fpscr_regnum, (fpp + 8 * 32));
}
--- 633,646 ----
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
bfd_byte *fpp = (void *) fpregsetp;
! if (ppc_floating_point_unit_p (current_gdbarch))
{
! for (regi = 0; regi < ppc_num_fprs; regi++)
! {
! if ((regno == -1) || (regno == tdep->ppc_fp0_regnum + regi))
! regcache_collect (tdep->ppc_fp0_regnum + regi, fpp + 8 * regi);
! }
! if (regno == -1 || regno == tdep->ppc_fpscr_regnum)
! right_fill_reg (tdep->ppc_fpscr_regnum, (fpp + 8 * 32));
}
}
Index: gdb/ppc-linux-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/ppc-linux-tdep.c,v
retrieving revision 1.58
diff -c -p -r1.58 ppc-linux-tdep.c
*** gdb/ppc-linux-tdep.c 5 May 2004 01:46:55 -0000 1.58
--- gdb/ppc-linux-tdep.c 7 May 2004 21:03:49 -0000
*************** ppc_linux_sigtramp_cache (struct frame_i
*** 944,955 ****
cache->saved_regs[tdep->ppc_cr_regnum].addr = gpregs + 38 * tdep->wordsize;
/* Floating point registers. */
! for (i = 0; i < 32; i++)
{
! int regnum = i + tdep->ppc_fp0_regnum;
! cache->saved_regs[regnum].addr = fpregs + i * tdep->wordsize;
}
- cache->saved_regs[tdep->ppc_fpscr_regnum].addr = fpregs + 32 * tdep->wordsize;
return cache;
}
--- 944,959 ----
cache->saved_regs[tdep->ppc_cr_regnum].addr = gpregs + 38 * tdep->wordsize;
/* Floating point registers. */
! if (ppc_floating_point_unit_p (gdbarch))
{
! for (i = 0; i < ppc_num_fprs; i++)
! {
! int regnum = i + tdep->ppc_fp0_regnum;
! cache->saved_regs[regnum].addr = fpregs + i * tdep->wordsize;
! }
! cache->saved_regs[tdep->ppc_fpscr_regnum].addr
! = fpregs + 32 * tdep->wordsize;
}
return cache;
}
*************** ppc_linux_supply_fpregset (const struct
*** 1018,1032 ****
struct gdbarch_tdep *regcache_tdep = gdbarch_tdep (regcache_arch);
const bfd_byte *buf = fpset;
! for (regi = 0; regi < 32; regi++)
regcache_raw_supply (regcache,
regcache_tdep->ppc_fp0_regnum + regi,
buf + 8 * regi);
! /* The FPSCR is stored in the low order word of the last doubleword in the
! fpregset. */
regcache_raw_supply (regcache, regcache_tdep->ppc_fpscr_regnum,
! buf + 8 * 32 + 4);
}
static struct regset ppc_linux_fpregset = { NULL, ppc_linux_supply_fpregset };
--- 1022,1039 ----
struct gdbarch_tdep *regcache_tdep = gdbarch_tdep (regcache_arch);
const bfd_byte *buf = fpset;
! if (! ppc_floating_point_unit_p (regcache_arch))
! return;
!
! for (regi = 0; regi < ppc_num_fprs; regi++)
regcache_raw_supply (regcache,
regcache_tdep->ppc_fp0_regnum + regi,
buf + 8 * regi);
! /* The FPSCR is stored in the low order word of the last
! doubleword in the fpregset. */
regcache_raw_supply (regcache, regcache_tdep->ppc_fpscr_regnum,
! buf + 8 * 32 + 4);
}
static struct regset ppc_linux_fpregset = { NULL, ppc_linux_supply_fpregset };
Index: gdb/ppc-tdep.h
===================================================================
RCS file: /cvs/src/src/gdb/ppc-tdep.h,v
retrieving revision 1.31
diff -c -p -r1.31 ppc-tdep.h
*** gdb/ppc-tdep.h 5 May 2004 01:46:55 -0000 1.31
--- gdb/ppc-tdep.h 7 May 2004 21:03:49 -0000
*************** enum return_value_convention ppc64_sysv_
*** 74,81 ****
/* From rs6000-tdep.c... */
int altivec_register_p (int regno);
! /* Return non-zero when the architecture has an FPU (or at least when
! the ABI is using the FPU). */
int ppc_floating_point_unit_p (struct gdbarch *gdbarch);
/* Register set description. */
--- 74,81 ----
/* From rs6000-tdep.c... */
int altivec_register_p (int regno);
! /* Return non-zero if the architecture described by GDBARCH has
! floating-point registers (f0 --- f31 and fpscr). */
int ppc_floating_point_unit_p (struct gdbarch *gdbarch);
/* Register set description. */
*************** struct gdbarch_tdep
*** 150,158 ****
--- 150,162 ----
int ppc_lr_regnum; /* Link register */
int ppc_ctr_regnum; /* Count register */
int ppc_xer_regnum; /* Integer exception register */
+
+ /* On PPC and RS6000 variants that have no floating-point
+ registers, the next two members will be -1. */
int ppc_fp0_regnum; /* floating-point register 0 */
int ppc_fpscr_regnum; /* Floating point status and condition
register */
+
int ppc_mq_regnum; /* Multiply/Divide extension register */
int ppc_vr0_regnum; /* First AltiVec register */
int ppc_vrsave_regnum; /* Last AltiVec register */
Index: gdb/ppcnbsd-nat.c
===================================================================
RCS file: /cvs/src/src/gdb/ppcnbsd-nat.c,v
retrieving revision 1.11
diff -c -p -r1.11 ppcnbsd-nat.c
*** gdb/ppcnbsd-nat.c 5 May 2004 01:46:55 -0000 1.11
--- gdb/ppcnbsd-nat.c 7 May 2004 21:03:49 -0000
***************
*** 25,30 ****
--- 25,31 ----
#include "defs.h"
#include "inferior.h"
+ #include "gdb_assert.h"
#include "ppc-tdep.h"
#include "ppcnbsd-tdep.h"
*************** static int
*** 48,53 ****
--- 49,62 ----
getfpregs_supplies (int regno)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+
+ /* FIXME: jimb/2004-05-05: Some PPC variants don't have
+ floating-point registers. For such variants,
+ tdep->ppc_fp0_regnum and tdep->ppc_fpscr_regnum will be -1. I
+ don't think NetBSD runs on any of those chips, but we can at
+ least make sure that if someone tries it, they'll get a proper
+ notification. */
+ gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
return ((regno >= tdep->ppc_fp0_regnum
&& regno < tdep->ppc_fp0_regnum + ppc_num_fprs)
Index: gdb/ppcnbsd-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/ppcnbsd-tdep.c,v
retrieving revision 1.16
diff -c -p -r1.16 ppcnbsd-tdep.c
*** gdb/ppcnbsd-tdep.c 5 May 2004 01:46:55 -0000 1.16
--- gdb/ppcnbsd-tdep.c 7 May 2004 21:03:50 -0000
*************** ppcnbsd_supply_fpreg (char *fpregs, int
*** 111,116 ****
--- 111,124 ----
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
int i;
+ /* FIXME: jimb/2004-05-05: Some PPC variants don't have
+ floating-point registers. For such variants,
+ tdep->ppc_fp0_regnum and tdep->ppc_fpscr_regnum will be -1. I
+ don't think NetBSD runs on any of those chips, but we can at
+ least make sure that if someone tries it, they'll get a proper
+ notification. */
+ gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
+
for (i = 0; i < ppc_num_fprs; i++)
{
if (regno == tdep->ppc_fp0_regnum + i || regno == -1)
*************** ppcnbsd_fill_fpreg (char *fpregs, int re
*** 127,132 ****
--- 135,148 ----
{
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
int i;
+
+ /* FIXME: jimb/2004-05-05: Some PPC variants don't have
+ floating-point registers. For such variants,
+ tdep->ppc_fp0_regnum and tdep->ppc_fpscr_regnum will be -1. I
+ don't think NetBSD runs on any of those chips, but we can at
+ least make sure that if someone tries it, they'll get a proper
+ notification. */
+ gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
for (i = 0; i < ppc_num_fprs; i++)
{
Index: gdb/ppcobsd-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/ppcobsd-tdep.c,v
retrieving revision 1.1
diff -c -p -r1.1 ppcobsd-tdep.c
*** gdb/ppcobsd-tdep.c 22 Apr 2004 21:13:06 -0000 1.1
--- gdb/ppcobsd-tdep.c 7 May 2004 21:03:50 -0000
***************
*** 24,29 ****
--- 24,30 ----
#include "osabi.h"
#include "regcache.h"
#include "regset.h"
+ #include "gdb_assert.h"
#include "gdb_string.h"
*************** ppcobsd_supply_gregset (const struct reg
*** 46,51 ****
--- 47,60 ----
struct regcache *regcache, int regnum,
const void *gregs, size_t len)
{
+ /* FIXME: jimb/2004-05-05: Some PPC variants don't have
+ floating-point registers. For such variants,
+ tdep->ppc_fp0_regnum and tdep->ppc_fpscr_regnum will be -1. I
+ don't think OpenBSD runs on any of those chips, but we can at
+ least make sure that if someone tries it, they'll get a proper
+ notification. */
+ gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
+
ppc_supply_gregset (regset, regcache, regnum, gregs, len);
ppc_supply_fpregset (regset, regcache, regnum, gregs, len);
}
*************** ppcobsd_collect_gregset (const struct re
*** 60,65 ****
--- 69,82 ----
const struct regcache *regcache, int regnum,
void *gregs, size_t len)
{
+ /* FIXME: jimb/2004-05-05: Some PPC variants don't have
+ floating-point registers. For such variants,
+ tdep->ppc_fp0_regnum and tdep->ppc_fpscr_regnum will be -1. I
+ don't think OpenBSD runs on any of those chips, but we can at
+ least make sure that if someone tries it, they'll get a proper
+ notification. */
+ gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
+
ppc_collect_gregset (regset, regcache, regnum, gregs, len);
ppc_collect_fpregset (regset, regcache, regnum, gregs, len);
}
Index: gdb/rs6000-nat.c
===================================================================
RCS file: /cvs/src/src/gdb/rs6000-nat.c,v
retrieving revision 1.43
diff -c -p -r1.43 rs6000-nat.c
*** gdb/rs6000-nat.c 5 May 2004 01:46:55 -0000 1.43
--- gdb/rs6000-nat.c 7 May 2004 21:03:50 -0000
*************** regmap (int regno, int *isfloat)
*** 159,165 ****
if (tdep->ppc_gp0_regnum <= regno
&& regno < tdep->ppc_gp0_regnum + ppc_num_gprs)
return regno;
! else if (tdep->ppc_fp0_regnum <= regno
&& regno < tdep->ppc_fp0_regnum + ppc_num_fprs)
{
*isfloat = 1;
--- 159,166 ----
if (tdep->ppc_gp0_regnum <= regno
&& regno < tdep->ppc_gp0_regnum + ppc_num_gprs)
return regno;
! else if (tdep->ppc_fp0_regnum >= 0
! && tdep->ppc_fp0_regnum <= regno
&& regno < tdep->ppc_fp0_regnum + ppc_num_fprs)
{
*isfloat = 1;
*************** regmap (int regno, int *isfloat)
*** 177,183 ****
return CTR;
else if (regno == tdep->ppc_xer_regnum)
return XER;
! else if (regno == tdep->ppc_fpscr_regnum)
return FPSCR;
else if (tdep->ppc_mq_regnum >= 0 && regno == tdep->ppc_mq_regnum)
return MQ;
--- 178,185 ----
return CTR;
else if (regno == tdep->ppc_xer_regnum)
return XER;
! else if (tdep->ppc_fpscr_regnum >= 0
! && regno == tdep->ppc_fpscr_regnum)
return FPSCR;
else if (tdep->ppc_mq_regnum >= 0 && regno == tdep->ppc_mq_regnum)
return MQ;
*************** fetch_inferior_registers (int regno)
*** 359,366 ****
}
/* Read general purpose floating point registers. */
! for (regno = 0; regno < ppc_num_fprs; regno++)
! fetch_register (tdep->ppc_fp0_regnum + regno);
/* Read special registers. */
fetch_register (PC_REGNUM);
--- 361,369 ----
}
/* Read general purpose floating point registers. */
! if (tdep->ppc_fp0_regnum >= 0)
! for (regno = 0; regno < ppc_num_fprs; regno++)
! fetch_register (tdep->ppc_fp0_regnum + regno);
/* Read special registers. */
fetch_register (PC_REGNUM);
*************** fetch_inferior_registers (int regno)
*** 369,375 ****
fetch_register (tdep->ppc_lr_regnum);
fetch_register (tdep->ppc_ctr_regnum);
fetch_register (tdep->ppc_xer_regnum);
! fetch_register (tdep->ppc_fpscr_regnum);
if (tdep->ppc_mq_regnum >= 0)
fetch_register (tdep->ppc_mq_regnum);
}
--- 372,379 ----
fetch_register (tdep->ppc_lr_regnum);
fetch_register (tdep->ppc_ctr_regnum);
fetch_register (tdep->ppc_xer_regnum);
! if (tdep->ppc_fpscr_regnum >= 0)
! fetch_register (tdep->ppc_fpscr_regnum);
if (tdep->ppc_mq_regnum >= 0)
fetch_register (tdep->ppc_mq_regnum);
}
*************** store_inferior_registers (int regno)
*** 398,405 ****
}
/* Write floating point registers. */
! for (regno = 0; regno < ppc_num_fprs; regno++)
! store_register (tdep->ppc_fp0_regnum + regno);
/* Write special registers. */
store_register (PC_REGNUM);
--- 402,410 ----
}
/* Write floating point registers. */
! if (tdep->ppc_fp0_regnum >= 0)
! for (regno = 0; regno < ppc_num_fprs; regno++)
! store_register (tdep->ppc_fp0_regnum + regno);
/* Write special registers. */
store_register (PC_REGNUM);
*************** store_inferior_registers (int regno)
*** 408,414 ****
store_register (tdep->ppc_lr_regnum);
store_register (tdep->ppc_ctr_regnum);
store_register (tdep->ppc_xer_regnum);
! store_register (tdep->ppc_fpscr_regnum);
if (tdep->ppc_mq_regnum >= 0)
store_register (tdep->ppc_mq_regnum);
}
--- 413,420 ----
store_register (tdep->ppc_lr_regnum);
store_register (tdep->ppc_ctr_regnum);
store_register (tdep->ppc_xer_regnum);
! if (tdep->ppc_fpscr_regnum >= 0)
! store_register (tdep->ppc_fpscr_regnum);
if (tdep->ppc_mq_regnum >= 0)
store_register (tdep->ppc_mq_regnum);
}
*************** fetch_core_registers (char *core_reg_sec
*** 583,591 ****
for (regi = 0; regi < 32; regi++)
supply_register (regi, (char *) ®s->r64.gpr[regi]);
! for (regi = 0; regi < 32; regi++)
! supply_register (tdep->ppc_fp0_regnum + regi,
! (char *) ®s->r64.fpr[regi]);
supply_register (PC_REGNUM, (char *) ®s->r64.iar);
supply_register (tdep->ppc_ps_regnum, (char *) ®s->r64.msr);
--- 589,598 ----
for (regi = 0; regi < 32; regi++)
supply_register (regi, (char *) ®s->r64.gpr[regi]);
! if (tdep->ppc_fp0_regnum >= 0)
! for (regi = 0; regi < 32; regi++)
! supply_register (tdep->ppc_fp0_regnum + regi,
! (char *) ®s->r64.fpr[regi]);
supply_register (PC_REGNUM, (char *) ®s->r64.iar);
supply_register (tdep->ppc_ps_regnum, (char *) ®s->r64.msr);
*************** fetch_core_registers (char *core_reg_sec
*** 593,608 ****
supply_register (tdep->ppc_lr_regnum, (char *) ®s->r64.lr);
supply_register (tdep->ppc_ctr_regnum, (char *) ®s->r64.ctr);
supply_register (tdep->ppc_xer_regnum, (char *) ®s->r64.xer);
! supply_register (tdep->ppc_fpscr_regnum, (char *) ®s->r64.fpscr);
}
else
{
for (regi = 0; regi < 32; regi++)
supply_register (regi, (char *) ®s->r32.gpr[regi]);
! for (regi = 0; regi < 32; regi++)
! supply_register (tdep->ppc_fp0_regnum + regi,
! (char *) ®s->r32.fpr[regi]);
supply_register (PC_REGNUM, (char *) ®s->r32.iar);
supply_register (tdep->ppc_ps_regnum, (char *) ®s->r32.msr);
--- 600,617 ----
supply_register (tdep->ppc_lr_regnum, (char *) ®s->r64.lr);
supply_register (tdep->ppc_ctr_regnum, (char *) ®s->r64.ctr);
supply_register (tdep->ppc_xer_regnum, (char *) ®s->r64.xer);
! if (tdep->ppc_fpscr_regnum >= 0)
! supply_register (tdep->ppc_fpscr_regnum, (char *) ®s->r64.fpscr);
}
else
{
for (regi = 0; regi < 32; regi++)
supply_register (regi, (char *) ®s->r32.gpr[regi]);
! if (tdep->ppc_fp0_regnum >= 0)
! for (regi = 0; regi < 32; regi++)
! supply_register (tdep->ppc_fp0_regnum + regi,
! (char *) ®s->r32.fpr[regi]);
supply_register (PC_REGNUM, (char *) ®s->r32.iar);
supply_register (tdep->ppc_ps_regnum, (char *) ®s->r32.msr);
*************** fetch_core_registers (char *core_reg_sec
*** 610,616 ****
supply_register (tdep->ppc_lr_regnum, (char *) ®s->r32.lr);
supply_register (tdep->ppc_ctr_regnum, (char *) ®s->r32.ctr);
supply_register (tdep->ppc_xer_regnum, (char *) ®s->r32.xer);
! supply_register (tdep->ppc_fpscr_regnum, (char *) ®s->r32.fpscr);
if (tdep->ppc_mq_regnum >= 0)
supply_register (tdep->ppc_mq_regnum, (char *) ®s->r32.mq);
}
--- 619,626 ----
supply_register (tdep->ppc_lr_regnum, (char *) ®s->r32.lr);
supply_register (tdep->ppc_ctr_regnum, (char *) ®s->r32.ctr);
supply_register (tdep->ppc_xer_regnum, (char *) ®s->r32.xer);
! if (tdep->ppc_fpscr_regnum >= 0)
! supply_register (tdep->ppc_fpscr_regnum, (char *) ®s->r32.fpscr);
if (tdep->ppc_mq_regnum >= 0)
supply_register (tdep->ppc_mq_regnum, (char *) ®s->r32.mq);
}
Index: gdb/rs6000-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/rs6000-tdep.c,v
retrieving revision 1.196
diff -c -p -r1.196 rs6000-tdep.c
*** gdb/rs6000-tdep.c 5 May 2004 01:46:55 -0000 1.196
--- gdb/rs6000-tdep.c 7 May 2004 21:03:52 -0000
*************** altivec_register_p (int regno)
*** 140,155 ****
return (regno >= tdep->ppc_vr0_regnum && regno <= tdep->ppc_vrsave_regnum);
}
! /* Use the architectures FP registers? */
int
ppc_floating_point_unit_p (struct gdbarch *gdbarch)
{
! const struct bfd_arch_info *info = gdbarch_bfd_arch_info (gdbarch);
! if (info->arch == bfd_arch_powerpc)
! return (info->mach != bfd_mach_ppc_e500);
! if (info->arch == bfd_arch_rs6000)
! return 1;
! return 0;
}
--- 140,155 ----
return (regno >= tdep->ppc_vr0_regnum && regno <= tdep->ppc_vrsave_regnum);
}
!
! /* Return non-zero if the architecture described by GDBARCH has
! floating-point registers (f0 --- f31 and fpscr). */
int
ppc_floating_point_unit_p (struct gdbarch *gdbarch)
{
! struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
!
! return (tdep->ppc_fp0_regnum >= 0
! && tdep->ppc_fpscr_regnum >= 0);
}
*************** ppc_supply_fpregset (const struct regset
*** 226,231 ****
--- 226,233 ----
size_t offset;
int i;
+ gdb_assert (ppc_floating_point_unit_p (gdbarch));
+
offset = offsets->f0_offset;
for (i = tdep->ppc_fp0_regnum;
i < tdep->ppc_fp0_regnum + ppc_num_fprs;
*************** ppc_collect_fpregset (const struct regse
*** 301,306 ****
--- 303,310 ----
size_t offset;
int i;
+ gdb_assert (ppc_floating_point_unit_p (gdbarch));
+
offset = offsets->f0_offset;
for (i = tdep->ppc_fp0_regnum;
i <= tdep->ppc_fp0_regnum + ppc_num_fprs;
*************** rs6000_push_dummy_call (struct gdbarch *
*** 1190,1195 ****
--- 1194,1204 ----
CORE_ADDR saved_sp;
+ /* The calling convention this function implements assumes the
+ processor has floating-point registers. We shouldn't be using it
+ on PPC variants that lack them. */
+ gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
+
/* The first eight words of ther arguments are passed in registers.
Copy them appropriately. */
ii = 0;
*************** rs6000_extract_return_value (struct type
*** 1416,1421 ****
--- 1425,1435 ----
int offset = 0;
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+ /* The calling convention this function implements assumes the
+ processor has floating-point registers. We shouldn't be using it
+ on PPC variants that lack them. */
+ gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
+
if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
{
*************** rs6000_dwarf2_stab_reg_to_regnum (int nu
*** 1727,1732 ****
--- 1741,1749 ----
if (0 <= num && num <= 31)
return tdep->ppc_gp0_regnum + num;
else if (32 <= num && num <= 63)
+ /* FIXME: jimb/2004-05-05: What should we do when the debug info
+ specifies registers the architecture doesn't have? Our
+ callers don't check the value we return. */
return tdep->ppc_fp0_regnum + (num - 32);
else if (1200 <= num && num < 1200 + 32)
return tdep->ppc_ev0_regnum + (num - 1200);
*************** rs6000_store_return_value (struct type *
*** 1765,1770 ****
--- 1782,1792 ----
{
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+ /* The calling convention this function implements assumes the
+ processor has floating-point registers. We shouldn't be using it
+ on PPC variants that lack them. */
+ gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
+
if (TYPE_CODE (type) == TYPE_CODE_FLT)
/* Floating point values are returned starting from FPR1 and up.
*************** rs6000_frame_cache (struct frame_info *n
*** 2445,2455 ****
{
int i;
CORE_ADDR fpr_addr = cache->base + fdata.fpr_offset;
! for (i = fdata.saved_fpr; i < 32; i++)
! {
! cache->saved_regs[tdep->ppc_fp0_regnum + i].addr = fpr_addr;
! fpr_addr += 8;
! }
}
/* if != -1, fdata.saved_gpr is the smallest number of saved_gpr.
--- 2467,2483 ----
{
int i;
CORE_ADDR fpr_addr = cache->base + fdata.fpr_offset;
!
! /* If skip_prologue says floating-point registers were saved,
! but the current architecture has no floating-point registers,
! then that's strange. But we have no indices to even record
! the addresses under, so we just ignore it. */
! if (ppc_floating_point_unit_p (gdbarch))
! for (i = fdata.saved_fpr; i < 32; i++)
! {
! cache->saved_regs[tdep->ppc_fp0_regnum + i].addr = fpr_addr;
! fpr_addr += 8;
! }
}
/* if != -1, fdata.saved_gpr is the smallest number of saved_gpr.
*************** rs6000_gdbarch_init (struct gdbarch_info
*** 2763,2768 ****
--- 2791,2798 ----
tdep->ppc_xer_regnum = 5;
tdep->ppc_ev0_regnum = 7;
tdep->ppc_ev31_regnum = 38;
+ tdep->ppc_fp0_regnum = -1;
+ tdep->ppc_fpscr_regnum = -1;
set_gdbarch_pc_regnum (gdbarch, 0);
set_gdbarch_sp_regnum (gdbarch, tdep->ppc_gp0_regnum + 1);
set_gdbarch_deprecated_fp_regnum (gdbarch, tdep->ppc_gp0_regnum + 1);
Index: gdb/Makefile.in
===================================================================
RCS file: /cvs/src/src/gdb/Makefile.in,v
retrieving revision 1.561
diff -c -p -r1.561 Makefile.in
*** gdb/Makefile.in 7 May 2004 05:48:48 -0000 1.561
--- gdb/Makefile.in 7 May 2004 21:03:47 -0000
*************** p-lang.o: p-lang.c $(defs_h) $(gdb_strin
*** 2141,2166 ****
ppc-bdm.o: ppc-bdm.c $(defs_h) $(gdbcore_h) $(gdb_string_h) $(frame_h) \
$(inferior_h) $(bfd_h) $(symfile_h) $(target_h) $(gdbcmd_h) \
$(objfiles_h) $(gdb_stabs_h) $(serial_h) $(ocd_h) $(ppc_tdep_h) \
! $(regcache_h)
ppcbug-rom.o: ppcbug-rom.c $(defs_h) $(gdbcore_h) $(target_h) $(monitor_h) \
$(serial_h) $(regcache_h)
ppc-linux-nat.o: ppc-linux-nat.c $(defs_h) $(gdb_string_h) $(frame_h) \
! $(inferior_h) $(gdbcore_h) $(regcache_h) $(gdb_wait_h) $(gregset_h) \
! $(ppc_tdep_h)
ppc-linux-tdep.o: ppc-linux-tdep.c $(defs_h) $(frame_h) $(inferior_h) \
$(symtab_h) $(target_h) $(gdbcore_h) $(gdbcmd_h) $(symfile_h) \
$(objfiles_h) $(regcache_h) $(value_h) $(osabi_h) $(regset_h) \
$(solib_svr4_h) $(ppc_tdep_h) $(trad_frame_h) $(frame_unwind_h)
ppcnbsd-nat.o: ppcnbsd-nat.c $(defs_h) $(inferior_h) $(ppc_tdep_h) \
! $(ppcnbsd_tdep_h)
ppcnbsd-tdep.o: ppcnbsd-tdep.c $(defs_h) $(gdbcore_h) $(regcache_h) \
$(target_h) $(breakpoint_h) $(value_h) $(osabi_h) $(ppc_tdep_h) \
$(ppcnbsd_tdep_h) $(nbsd_tdep_h) $(solib_svr4_h)
ppcobsd-nat.o: ppcobsd-nat.c $(defs_h) $(inferior_h) $(regcache_h) \
$(ppc_tdep_h) $(ppcobsd_tdep_h)
ppcobsd-tdep.o: ppcobsd-tdep.c $(defs_h) $(arch_utils_h) $(osabi_h) \
! $(regcache_h) $(regset_h) $(gdb_string_h) $(ppc_tdep_h) \
! $(ppcobsd_tdep_h) $(solib_svr4_h)
ppc-sysv-tdep.o: ppc-sysv-tdep.c $(defs_h) $(gdbcore_h) $(inferior_h) \
$(regcache_h) $(value_h) $(gdb_string_h) $(gdb_assert_h) \
$(ppc_tdep_h) $(target_h) $(objfiles_h)
--- 2141,2166 ----
ppc-bdm.o: ppc-bdm.c $(defs_h) $(gdbcore_h) $(gdb_string_h) $(frame_h) \
$(inferior_h) $(bfd_h) $(symfile_h) $(target_h) $(gdbcmd_h) \
$(objfiles_h) $(gdb_stabs_h) $(serial_h) $(ocd_h) $(ppc_tdep_h) \
! $(regcache_h) $(gdb_assert_h)
ppcbug-rom.o: ppcbug-rom.c $(defs_h) $(gdbcore_h) $(target_h) $(monitor_h) \
$(serial_h) $(regcache_h)
ppc-linux-nat.o: ppc-linux-nat.c $(defs_h) $(gdb_string_h) $(frame_h) \
! $(inferior_h) $(gdbcore_h) $(regcache_h) $(gdb_assert_h) \
! $(gdb_wait_h) $(gregset_h) $(ppc_tdep_h)
ppc-linux-tdep.o: ppc-linux-tdep.c $(defs_h) $(frame_h) $(inferior_h) \
$(symtab_h) $(target_h) $(gdbcore_h) $(gdbcmd_h) $(symfile_h) \
$(objfiles_h) $(regcache_h) $(value_h) $(osabi_h) $(regset_h) \
$(solib_svr4_h) $(ppc_tdep_h) $(trad_frame_h) $(frame_unwind_h)
ppcnbsd-nat.o: ppcnbsd-nat.c $(defs_h) $(inferior_h) $(ppc_tdep_h) \
! $(ppcnbsd_tdep_h) $(gdb_assert_h)
ppcnbsd-tdep.o: ppcnbsd-tdep.c $(defs_h) $(gdbcore_h) $(regcache_h) \
$(target_h) $(breakpoint_h) $(value_h) $(osabi_h) $(ppc_tdep_h) \
$(ppcnbsd_tdep_h) $(nbsd_tdep_h) $(solib_svr4_h)
ppcobsd-nat.o: ppcobsd-nat.c $(defs_h) $(inferior_h) $(regcache_h) \
$(ppc_tdep_h) $(ppcobsd_tdep_h)
ppcobsd-tdep.o: ppcobsd-tdep.c $(defs_h) $(arch_utils_h) $(osabi_h) \
! $(regcache_h) $(regset_h) $(gdb_assert_h) $(gdb_string_h) \
! $(ppc_tdep_h) $(ppcobsd_tdep_h) $(solib_svr4_h)
ppc-sysv-tdep.o: ppc-sysv-tdep.c $(defs_h) $(gdbcore_h) $(inferior_h) \
$(regcache_h) $(value_h) $(gdb_string_h) $(gdb_assert_h) \
$(ppc_tdep_h) $(target_h) $(objfiles_h)