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sh64 simulator register numbers
- From: Joern Rennecke <joern dot rennecke at superh dot com>
- To: gdb-patches at sources dot redhat dot com
- Cc: Elena Zannoni <ezannoni at redhat dot com>, Andrew Cagney <ac131313 at redhat dot com>
- Date: Wed, 17 Jul 2002 20:36:23 +0100
- Subject: sh64 simulator register numbers
- Organization: SuperH UK Ltd.
AFAICS the sh64 simulator doesn't need any changes for this renumbering,
while gdb would need some decoupling from the simulator's register numbers.
Should we create a header file that describes the register numbers when
talking to hardware, and make gdb use that for its internal numbers?
Or should it define the numbers inside sh-tdep.c ?
--
--------------------------
SuperH
2430 Aztec West / Almondsbury / BRISTOL / BS32 4AQ
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Index: sim-sh.h
===================================================================
RCS file: /cvs/src/src/include/gdb/sim-sh.h,v
retrieving revision 1.2
diff -p -r1.2 sim-sh.h
*** sim-sh.h 17 Jul 2002 18:43:26 -0000 1.2
--- sim-sh.h 17 Jul 2002 19:26:54 -0000
*************** enum
*** 131,154 ****
SIM_SH_R6_BANK_REGNUM,
SIM_SH_R7_BANK_REGNUM
/* 100..127: room for expansion. */
- };
! enum
! {
! SIM_SH64_R0_REGNUM = 0,
! SIM_SH64_SP_REGNUM = 15,
! SIM_SH64_PC_REGNUM = 64,
! SIM_SH64_SR_REGNUM = 65,
! SIM_SH64_SSR_REGNUM = 66,
! SIM_SH64_SPC_REGNUM = 67,
! SIM_SH64_TR0_REGNUM = 68,
! SIM_SH64_FPCSR_REGNUM = 76,
! SIM_SH64_FR0_REGNUM = 77
};
enum
{
! SIM_SH64_NR_REGS = 141, /* total number of architectural registers */
SIM_SH64_NR_R_REGS = 64, /* number of general registers */
SIM_SH64_NR_TR_REGS = 8, /* number of target registers */
SIM_SH64_NR_FP_REGS = 64 /* number of floating point registers */
--- 131,174 ----
SIM_SH_R6_BANK_REGNUM,
SIM_SH_R7_BANK_REGNUM
/* 100..127: room for expansion. */
! /* SHmedia */
! SIM_SH64_R0_REGNUM = 128,
! SIM_SH64_SP_REGNUM = SIM_SH64_R0_REGNUM+15,
! SIM_SH64_PC_REGNUM = SIM_SH64_R0_REGNUM+64,
! /* 64 64-bit control registers */
! SIM_SH64_CR0_REGNUM = SIM_SH64_R0_REGNUM+65,
! /* Some of these have specific names. */
! SIM_SH64_SR_REGNUM = SIM_SH64_CR0_REGNUM, /* Status reg */
! SIM_SH64_SSR_REGNUM = SIM_SH64_CR0_REGNUM+1, /* Saved status reg */
! SIM_SH64_PSSR_REGNUM = SIM_SH64_CR0_REGNUM+2, /* Panic-saved status reg*/
! SIM_SH64_INTEVT_REGNUM=SIM_SH64_CR0_REGNUM+4, /* Interrupt event reg */
! SIM_SH64_EXPEVT_REGNUM=SIM_SH64_CR0_REGNUM+5, /* Exception event reg */
! SIM_SH64_PEXPEVT_REGNUM= SIM_SH64_CR0_REGNUM+6,/* Panic-saved Exception
! event reg */
! SIM_SH64_TRA_REGNUM = SIM_SH64_CR0_REGNUM+7, /* TRAP exception reg */
! SIM_SH64_SPC_REGNUM = SIM_SH64_CR0_REGNUM+8, /* Saved program counter */
! SIM_SH64_PSPC_REGNUM = SIM_SH64_CR0_REGNUM+9, /* Panic-saved program
! counter */
! SIM_SH64_RESVEC_REGNUM=SIM_SH64_CR0_REGNUM+10, /* Reset vector */
! SIM_SH64_VBR_REGNUM = SIM_SH64_CR0_REGNUM+11, /* Vector base register */
! SIM_SH64_TEA_REGNUM = SIM_SH64_CR0_REGNUM+13, /* Faulting effective
! address register */
! SIM_SH64_DCR_REGNUM = SIM_SH64_CR0_REGNUM+16, /* Debug control reg */
! SIM_SH64_KCR0_REGNUM = SIM_SH64_CR0_REGNUM+17, /* Kernel register 0 */
! SIM_SH64_KCR1_REGNUM = SIM_SH64_CR0_REGNUM+18, /* Kernel register 1 */
! SIM_SH64_CTC_REGNUM = SIM_SH64_CR0_REGNUM+62, /* Clock tick counter */
! SIM_SH64_USR_REGNUM = SIM_SH64_CR0_REGNUM+63, /* User-accessible
! status register */
! SIM_SH64_CR63_REGNUM = SIM_SH64_R0_REGNUM+128,
! SIM_SH64_TR0_REGNUM = SIM_SH64_R0_REGNUM+129,
! SIM_SH64_FPSCR_REGNUM= SIM_SH64_R0_REGNUM+137,
! SIM_SH64_FR0_REGNUM = SIM_SH64_R0_REGNUM+138
};
enum
{
! SIM_SH64_NR_REGS = 202, /* total number of architectural registers */
SIM_SH64_NR_R_REGS = 64, /* number of general registers */
SIM_SH64_NR_TR_REGS = 8, /* number of target registers */
SIM_SH64_NR_FP_REGS = 64 /* number of floating point registers */