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# HG changeset patch
# User Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
# Date 1249478632 -7200
# Node ID 367156067ce8543c8654fabcf9c417169041f6fa
# Parent 8ad2773e7ae3931568206e2b112c58624b366519
gcc: add patch to fix PR37436
When compiling some C++ code, GCC 4.3.x fails with an internal
compiler error. The bug report is available at
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=37436. The included patch
is the one that has been merged in the trunk of gcc.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
diff -r 8ad2773e7ae3 -r 367156067ce8 patches/gcc/4.3.2/380-pr37436.patch
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/patches/gcc/4.3.2/380-pr37436.patch Wed Aug 05 15:23:52 2009 +0200
@@ -0,0 +1,86 @@
+gcc svn 142778:
+
+PR target/37436
+* arm.c (arm_legitimate_index): Only accept addresses that are in
+canonical form.
+* predicates.md (arm_reg_or_extendqisi_mem_op): New predicate.
+* arm.md (extendqihi2): Use arm_reg_or_extendqisi_mem_op predicate
+for operand1.
+(extendqisi2): Likewise.
+(arm_extendqisi, arm_extendqisi_v6): Use arm_extendqisi_mem_op
+predicate for operand1.
+
+diff -Nura gcc-4.3.3.orig/gcc/config/arm/arm.c gcc-4.3.3/gcc/config/arm/arm.c
+--- gcc-4.3.3.orig/gcc/config/arm/arm.c 2008-06-11 07:52:55.000000000 -0300
++++ gcc-4.3.3/gcc/config/arm/arm.c 2009-05-21 16:06:45.000000000 -0300
+@@ -3769,6 +3769,7 @@
+ rtx xop1 = XEXP (x, 1);
+
+ return ((arm_address_register_rtx_p (xop0, strict_p)
++ && GET_CODE(xop1) == CONST_INT
+ && arm_legitimate_index_p (mode, xop1, outer, strict_p))
+ || (arm_address_register_rtx_p (xop1, strict_p)
+ && arm_legitimate_index_p (mode, xop0, outer, strict_p)));
+diff -Nura gcc-4.3.3.orig/gcc/config/arm/arm.md gcc-4.3.3/gcc/config/arm/arm.md
+--- gcc-4.3.3.orig/gcc/config/arm/arm.md 2007-09-04 01:44:47.000000000 -0300
++++ gcc-4.3.3/gcc/config/arm/arm.md 2009-05-21 16:06:45.000000000 -0300
+@@ -4199,7 +4199,7 @@
+
+ (define_expand "extendqihi2"
+ [(set (match_dup 2)
+- (ashift:SI (match_operand:QI 1 "general_operand" "")
++ (ashift:SI (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "")
+ (const_int 24)))
+ (set (match_operand:HI 0 "s_register_operand" "")
+ (ashiftrt:SI (match_dup 2)
+@@ -4224,7 +4224,7 @@
+
+ (define_insn "*arm_extendqihi_insn"
+ [(set (match_operand:HI 0 "s_register_operand" "=r")
+- (sign_extend:HI (match_operand:QI 1 "memory_operand" "Uq")))]
++ (sign_extend:HI (match_operand:QI 1 "arm_extendqisi_mem_op" "Uq")))]
+ "TARGET_ARM && arm_arch4"
+ "ldr%(sb%)\\t%0, %1"
+ [(set_attr "type" "load_byte")
+@@ -4235,7 +4235,7 @@
+
+ (define_expand "extendqisi2"
+ [(set (match_dup 2)
+- (ashift:SI (match_operand:QI 1 "general_operand" "")
++ (ashift:SI (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "")
+ (const_int 24)))
+ (set (match_operand:SI 0 "s_register_operand" "")
+ (ashiftrt:SI (match_dup 2)
+@@ -4267,7 +4267,7 @@
+
+ (define_insn "*arm_extendqisi"
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+- (sign_extend:SI (match_operand:QI 1 "memory_operand" "Uq")))]
++ (sign_extend:SI (match_operand:QI 1 "arm_extendqisi_mem_op" "Uq")))]
+ "TARGET_ARM && arm_arch4 && !arm_arch6"
+ "ldr%(sb%)\\t%0, %1"
+ [(set_attr "type" "load_byte")
+@@ -4278,7 +4278,8 @@
+
+ (define_insn "*arm_extendqisi_v6"
+ [(set (match_operand:SI 0 "s_register_operand" "=r,r")
+- (sign_extend:SI (match_operand:QI 1 "nonimmediate_operand" "r,Uq")))]
++ (sign_extend:SI
++ (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "r,Uq")))]
+ "TARGET_ARM && arm_arch6"
+ "@
+ sxtb%?\\t%0, %1
+diff -Nura gcc-4.3.3.orig/gcc/config/arm/predicates.md gcc-4.3.3/gcc/config/arm/predicates.md
+--- gcc-4.3.3.orig/gcc/config/arm/predicates.md 2007-08-02 07:49:31.000000000 -0300
++++ gcc-4.3.3/gcc/config/arm/predicates.md 2009-05-21 16:06:45.000000000 -0300
+@@ -234,6 +234,10 @@
+ (match_test "arm_legitimate_address_p (mode, XEXP (op, 0), SIGN_EXTEND,
+ 0)")))
+
++(define_special_predicate "arm_reg_or_extendqisi_mem_op"
++ (ior (match_operand 0 "arm_extendqisi_mem_op")
++ (match_operand 0 "s_register_operand")))
++
+ (define_predicate "power_of_two_operand"
+ (match_code "const_int")
+ {
diff -r 8ad2773e7ae3 -r 367156067ce8 patches/gcc/4.3.3/380-pr37436.patch
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/patches/gcc/4.3.3/380-pr37436.patch Wed Aug 05 15:23:52 2009 +0200
@@ -0,0 +1,86 @@
+gcc svn 142778:
+
+PR target/37436
+* arm.c (arm_legitimate_index): Only accept addresses that are in
+canonical form.
+* predicates.md (arm_reg_or_extendqisi_mem_op): New predicate.
+* arm.md (extendqihi2): Use arm_reg_or_extendqisi_mem_op predicate
+for operand1.
+(extendqisi2): Likewise.
+(arm_extendqisi, arm_extendqisi_v6): Use arm_extendqisi_mem_op
+predicate for operand1.
+
+diff -Nura gcc-4.3.3.orig/gcc/config/arm/arm.c gcc-4.3.3/gcc/config/arm/arm.c
+--- gcc-4.3.3.orig/gcc/config/arm/arm.c 2008-06-11 07:52:55.000000000 -0300
++++ gcc-4.3.3/gcc/config/arm/arm.c 2009-05-21 16:06:45.000000000 -0300
+@@ -3769,6 +3769,7 @@
+ rtx xop1 = XEXP (x, 1);
+
+ return ((arm_address_register_rtx_p (xop0, strict_p)
++ && GET_CODE(xop1) == CONST_INT
+ && arm_legitimate_index_p (mode, xop1, outer, strict_p))
+ || (arm_address_register_rtx_p (xop1, strict_p)
+ && arm_legitimate_index_p (mode, xop0, outer, strict_p)));
+diff -Nura gcc-4.3.3.orig/gcc/config/arm/arm.md gcc-4.3.3/gcc/config/arm/arm.md
+--- gcc-4.3.3.orig/gcc/config/arm/arm.md 2007-09-04 01:44:47.000000000 -0300
++++ gcc-4.3.3/gcc/config/arm/arm.md 2009-05-21 16:06:45.000000000 -0300
+@@ -4199,7 +4199,7 @@
+
+ (define_expand "extendqihi2"
+ [(set (match_dup 2)
+- (ashift:SI (match_operand:QI 1 "general_operand" "")
++ (ashift:SI (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "")
+ (const_int 24)))
+ (set (match_operand:HI 0 "s_register_operand" "")
+ (ashiftrt:SI (match_dup 2)
+@@ -4224,7 +4224,7 @@
+
+ (define_insn "*arm_extendqihi_insn"
+ [(set (match_operand:HI 0 "s_register_operand" "=r")
+- (sign_extend:HI (match_operand:QI 1 "memory_operand" "Uq")))]
++ (sign_extend:HI (match_operand:QI 1 "arm_extendqisi_mem_op" "Uq")))]
+ "TARGET_ARM && arm_arch4"
+ "ldr%(sb%)\\t%0, %1"
+ [(set_attr "type" "load_byte")
+@@ -4235,7 +4235,7 @@
+
+ (define_expand "extendqisi2"
+ [(set (match_dup 2)
+- (ashift:SI (match_operand:QI 1 "general_operand" "")
++ (ashift:SI (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "")
+ (const_int 24)))
+ (set (match_operand:SI 0 "s_register_operand" "")
+ (ashiftrt:SI (match_dup 2)
+@@ -4267,7 +4267,7 @@
+
+ (define_insn "*arm_extendqisi"
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+- (sign_extend:SI (match_operand:QI 1 "memory_operand" "Uq")))]
++ (sign_extend:SI (match_operand:QI 1 "arm_extendqisi_mem_op" "Uq")))]
+ "TARGET_ARM && arm_arch4 && !arm_arch6"
+ "ldr%(sb%)\\t%0, %1"
+ [(set_attr "type" "load_byte")
+@@ -4278,7 +4278,8 @@
+
+ (define_insn "*arm_extendqisi_v6"
+ [(set (match_operand:SI 0 "s_register_operand" "=r,r")
+- (sign_extend:SI (match_operand:QI 1 "nonimmediate_operand" "r,Uq")))]
++ (sign_extend:SI
++ (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "r,Uq")))]
+ "TARGET_ARM && arm_arch6"
+ "@
+ sxtb%?\\t%0, %1
+diff -Nura gcc-4.3.3.orig/gcc/config/arm/predicates.md gcc-4.3.3/gcc/config/arm/predicates.md
+--- gcc-4.3.3.orig/gcc/config/arm/predicates.md 2007-08-02 07:49:31.000000000 -0300
++++ gcc-4.3.3/gcc/config/arm/predicates.md 2009-05-21 16:06:45.000000000 -0300
+@@ -234,6 +234,10 @@
+ (match_test "arm_legitimate_address_p (mode, XEXP (op, 0), SIGN_EXTEND,
+ 0)")))
+
++(define_special_predicate "arm_reg_or_extendqisi_mem_op"
++ (ior (match_operand 0 "arm_extendqisi_mem_op")
++ (match_operand 0 "s_register_operand")))
++
+ (define_predicate "power_of_two_operand"
+ (match_code "const_int")
+ {
--
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