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On Sat, Dec 23, 2006 at 04:24:21PM +0000, Martin Guy wrote: > >> As I understand it, it has to access the > >> code segment with a data-fetch instruction, which refetches the data > >> from RAM through the data cache. I would have thought that invalidates > >> the version of that page cached in the instruction cache to avoid > >> cache conflict, so when the system call returns, the code page gets > >> fetched yet again into the instruction cache. > > >In fact, pretty much every ARM out there needs its icache invalidated > >explicitly when code is written to RAM via the dcache. This is the > >reason we have the sys_cacheflush() system call. > > Yes, but we're not writing to the code segment here. Which is totally irrelevant, my example shows that a line can be present in both the D cache and I cache. Do you understand anything about caches at all? -- For unsubscribe information see http://sourceware.org/lists.html#faq
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