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I'm trying to build a toolchain using the crossgcc scripts for an AMD Alchmey processor. I'm configuring with gcc-3.4.2, glibc-2.3.3, binutils-2.15 and a kernel based on 2.4.20 (some modifications to support our specific hardware platform).
When I begin running the script things go pretty well until I start building the glibc-headers. At that point I get an error caused by picking up the wordsize.h file from sysdeps/mips/bits directory. The problem I get here is that instead of specifying a specific wordsize __WORDSIZE is defined to _MIPS_SZPTR. Now, I presume, that this should get #defined someplace, but it's not obvious how this is supposed to be done.
gcc-3.4.2/gcc/config/mips/linux.h defines the macro TARGET_OS_CPP_BUILTINS which, among other things. defines _MIPS_SZPTR. http://gcc.gnu.org/onlinedocs/gcc-3.4.1/gccint/Run-time-Target.html
It wsn't too long ago that this macro was introduced; see e.g. http://gcc.gnu.org/ml/gcc-patches/2002-07/msg00154.html Maybe somebody botched it?
BTW I haven't been able to build a similr combination; see http://kegel.com/crosstool/current/buildlogs/mips-gcc-3.4.2-glibc-2.3.3.sh.log.txt for my failure log. The build dies very early with cc1: error: invalid option `abi=32' because I'm trying to build with the linux-2.6.8 kernel headers; I should try the older kernel and/or the sanitized kernel headers; then I'd be able to see the problem you ran into, probably.
I "patched" this to just #define _MIPS_SZPTR to 32 in that same file, but then I run into the next problem.
When I'm building the main glibc I get errors in the memcpy.S file assembly. The registers t4-t7 are not defined. This appears to be because the _MIPS_SIM preprocessor symbol is not being defined to MIPS_SIM_ABI32.
That's starting to look like the problem described in http://gcc.gnu.org/ml/java-patches/2003-q4/msg00042.html Can you try his patch and see if it even still applies (let alone fixes your problem :-)?
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