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"Oleg I. Vdovikin" wrote: > > Hello, > > I'm now porting gcc to the embeded processor, which in short has 1 > accumulator register and 3 index registers (BASE_REGS in gcc sence). > Instruction set of this processor is poor enough. ;-)) Most of the > arithmetic operations deals with accumulator register and memory operand > which can be addressed with index regs only. One of this index regs I'm > using as stack pointer, so the only 2 remaining index regs can be used for > gcc needs. The port is mostly complete, but I'm encountering some problems > now. > The first one is the "Unable to find a register to spill" problem. This > occures when gcc tries to occupy too many index registers in most cases. I think you could benefit from looking at the m68hc11-port of GCC. The GCC snapshots now have the 'gcc/config/m68hc11' but the patches for gcc-2.95.2 and other information about the m68hc11 port is available at: http://home.worldnet.fr/~stcarrez/m68hc11_port.html The m68hc11 has only an accumulator and two index registers and using some 'soft registers' has been the solution with it: ------------------------------- clip -------------------------------------- 2.2 Register Allocation The M68HC11 registers (D, X and Y) are completely managed by GCC. Local variables can be stored in these registers. However, since the M68HC11 has so fiew registers, soft-registers are used to simulate hard registers for GCC. This avoids register spill failure in the reload pass. ------------------------------- clip -------------------------------------- You could also try to contact Stephane Carrez directly and ask about your problems. Cheers, Kai ------ Want more information? See the CrossGCC FAQ, http://www.objsw.com/CrossGCC/ Want to unsubscribe? Send a note to crossgcc-unsubscribe@sourceware.cygnus.com
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