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The equivalent MRI directives in GAS : MRI | GAS ------------------------------------------ DS.B | .comm label,1 DS.W | .comm label,2 DS.L | .comm label,4 GAS use MIT syntax which is slightly different from Motorola syntax. To specify register with GAS, you must delete "." in mnemonics, add % for register, add @ for indirect addressing, and invert the position of displacement in indirect with displacement addressing, for ex.: MRI | GAS --------------------------------------------------------------- move.l (A2), D0 | movel %A2@, %D0 lea DELETE, A2 | lea DELETE, %A2 clr.l 8(A2) | clrl %A2@(8) Attached is more information syntax for M68K from GAS info. x---------- This syntax for the Motorola 680x0 was developed at MIT. The 680x0 version of as uses instructions names and syntax compatible with the Sun assembler. Intervening periods are ignored; for example, `movl' is equivalent to `mov.l'. In the following table apc stands for any of the address registers (`%a0' through `%a7'), the program counter (`%pc'), the zero-address relative to the program counter (`%zpc'), a suppressed address register (`%za0' through `%za7'), or it may be omitted entirely. The use of size means one of `w' or `l', and it may be omitted, along with the leading colon, unless a scale is also specified. The use of scale means one of `1', `2', `4', or `8', and it may always be omitted along with the leading colon. The following addressing modes are understood: Immediate `#number' Data Register `%d0' through `%d7' Address Register `%a0' through `%a7' `%a7' is also known as `%sp', i.e. the Stack Pointer. %a6 is also known as `%fp', the Frame Pointer. Address Register Indirect `%a0@' through `%a7@' Address Register Postincrement `%a0@+' through `%a7@+' Address Register Predecrement `%a0@-' through `%a7@-' Indirect Plus Offset `apc@(number)' Index `apc@(number,register:size:scale)' The number may be omitted. Postindex `apc@(number)@(onumber,register:size:scale)' The onumber or the register, but not both, may be omitted. Preindex `apc@(number,register:size:scale)@(onumber)' The number may be omitted. Omitting the register produces the Postindex addressing mode. Absolute `symbol', or `digits', optionally followed by `:b', `:w', or `:l'. x---------- Branch Improvement Certain pseudo opcodes are permitted for branch instructions. They expand to the shortest branch instruction that reach the target. Generally these mnemonics are made by substituting `j' for `b' at the start of a Motorola mnemonic. The following table summarizes the pseudo-operations. A * flags cases that are more fully described after the table: Displacement +------------------------------------------------- | 68020 68000/10 Pseudo-Op |BYTE WORD LONG LONG non-PC relative +------------------------------------------------- jbsr |bsrs bsr bsrl jsr jsr jra |bras bra bral jmp jmp * jXX |bXXs bXX bXXl bNXs;jmpl bNXs;jmp * dbXX |dbXX dbXX dbXX; bra; jmpl * fjXX |fbXXw fbXXw fbXXl fbNXw;jmp XX: condition NX: negative of condition XX *---see full description below jbsr jra These are the simplest jump pseudo-operations; they always map to one particular machine instruction, depending on the displacement to the branch target. jXX Here, `jXX' stands for an entire family of pseudo-operations, where XX is a conditional branch or condition-code test. The full list of pseudo-ops in this family is: jhi jls jcc jcs jne jeq jvc jvs jpl jmi jge jlt jgt jle For the cases of non-PC relative displacements and long displacements on the 68000 or 68010, as issues a longer code fragment in terms of NX, the opposite condition to XX. For example, for the non-PC relative case: jXX foo gives bNXs oof jmp foo oof: dbXX The full family of pseudo-operations covered here is dbhi dbls dbcc dbcs dbne dbeq dbvc dbvs dbpl dbmi dbge dblt dbgt dble dbf dbra dbt Other than for word and byte displacements, when the source reads `dbXX foo', as emits dbXX oo1 bra oo2 oo1:jmpl foo oo2: fjXX This family includes fjne fjeq fjge fjlt fjgt fjle fjf fjt fjgl fjgle fjnge fjngl fjngle fjngt fjnle fjnlt fjoge fjogl fjogt fjole fjolt fjor fjseq fjsf fjsne fjst fjueq fjuge fjugt fjule fjult fjun For branch targets that are not PC relative, as emits fbNX oof jmp foo oof: when it encounters `fjXX foo'. x---------- Special Characters The immediate character is `#' for Sun compatibility. The line-comment character is `|' (unless the `--bitwise-or' option is used). If a `#' appears at the beginning of a line, it is treated as a comment unless it looks like `# line file', in which case it is treated normally. x---------- Regards, -- Dony Email : dony@willowglen.com.sg Geir Frode Raanes wrote: > > Apparently, there is no GAS equvivalent to the Motorola syntax > of Data Storage Byte/HWord/Word directive (DS.B/W/L count). > I found that ".byte value, value" resembles the "DC.B value, value" > directive, but I have not succeded in finding a replacement for DS.B/W/L. > I need 'count' instances of .byte length in the current section for > porting the TS2MON from Clements; Microprocessor systems design > to my own Near Infra Red spectrometer design. m68k-coff assembler. > > BTW, how do one specify registers in MRI compatible mode? > I.e. why do I keep getting 'operands mismatch' from "move.l (A2), D0" > when at the same time both "lea DELETE, A2" and "clr.l 8(A2)" are > accepted? > > ****************************************************** > > Never ever underestimate the power of human stupidity. > -Robert Anson Heinlein > > GeirFRS@invalid.and.so.forth > > ****************************************************** > > ________________________________________________ > To get help for the crossgcc list, send mail to > crossgcc-request@cygnus.com with the text 'help' > (without the quotes) in the body of the message. ________________________________________________ To get help for the crossgcc list, send mail to crossgcc-request@cygnus.com with the text 'help' (without the quotes) in the body of the message.