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Re: delayed branches and zero overhead loops


Hi -

> The ARCompact architecture has delay slots and zero overhead loops.
> I see that there is already a cgen simulator with delay slots, for
> the iq2000.  I've looked at its mloop.in xextract-pbb case [...]

For what it's worth, my recollection about how the PBB stuff works is
so hazy that I won't be able to give quick good advice.  Have you
considered using a plain non-pbb kernel, where you can hand-code these
subtleties in plain C/C++ code?

- FChE


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