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Different length variants of the same instruction
- From: "Michael Chapman" <michael dot chapman at wanadoo dot fr>
- To: <cgen at sources dot redhat dot com>
- Date: Sat, 28 Sep 2002 02:19:45 +0200
- Subject: Different length variants of the same instruction
I can't figure out how to get the assembler to work with different
lengths of the same instruction e.g.
mov r1, #imm4 (16 bit instruction for immediate values 0-15)
and
mov r1, #imm16 (32 bit instruction for immediate values 0-65535)
If I simply have the following description
(dni mov-rd-imm4 "mov rd,#imm4"
()
"mov $rd,$hash$imm4"
(+ (f-opcode #x10) rd imm4)
(set rd imm4)
()
)
(dni mov-rd-imm16 "mov rd,#imm16"
()
"mov $rd,$hash$imm16"
(+ (f-opcode #x60) rd (f-rsvd-rs 0) imm16)
(set rd imm16)
()
)
I.e. the imm4 variant before the imm16 variant then I can write
mov r1, #0x1234
to get a 32 bit instruction.
However if I try
mov r1, #(l2-l1)
where l1 and l2 are instruction labels, it always tries to assemble this
with the imm4 variant -
even if the value of the expression is too big.
Why?
I have a similiar problem with conditional branches which come in two
lengths as well.
I have experimented with RELAX and RELAXABLE with no sucess.
Can someone explain things?
Thanks,
Mike Chapman