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CGEN vs. VLIW architectures...


With a couple of small patches, I got CGEN to accept the basic 
specification of a VLIW
machine with 256 bit instructions.  [Of course, at this point, I only 
have defined

	- TWO instructions (one of them's NOP, and the other is bogus :-)
	- ONE operand (CGEN generates bad C code without any operand 
definitions.)

Of course, since this is a VLIW machine, there IS only one 
instruction, with about 40 subfields.

Is there anyone else working on a VLIW port?  Want to coordinate 
figuring out what needs
fixing for machines where the instruction is larger than "long long"?

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