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Re: CGEN: RFA: CGEN_INT_INSN_P - Additional Patch
- To: cgen at sources dot redhat dot com
- Subject: Re: CGEN: RFA: CGEN_INT_INSN_P - Additional Patch
- From: Dave Brolley <brolley at redhat dot com>
- Date: Tue, 22 Aug 2000 17:40:21 -0400
- Organization: Red Hat Canada, Inc
- References: <39A2E15A.B3BDF453@redhat.com>
When testing against the m32r, I found this additional change is
needed. m32r also has 16 and 32 bit insns, but sets
base-insn-bitsize to 32 since the 16 bit insns always occur in
pairs. This caused problems with my new code which assumed that
base-insn-bitsize would always be <= the size of any given insn.
Dave
Dave Brolley wrote:
>
> Hi,
>
> I ran into a problem with the cgen-based gas/opcodes/binutils/sim
> port that I am working on. The ISA has some 16 bit insns and some
> 32 bit insns, so I set default-insn-word-bitsize=16,
> default-insn-bitsize=16 and base-insn-bitsize=16.
>
> Now in <arch>-desc.h, CGEN_INT_INSN_P gets define to 1, since all
> of my insns are 32 bit or less. However, the current code enabled
> by CGEN_INT_INSN_P in cgen-ibld.in and cgen-dis.in does not allow
> for base-insn-bitsize != max-insn-bitsize.
>
> 1) It aborts in 'extract_normal' because when accessing a 16 bit
> insn field at offset 16 it is called with word_offset==16. Also
> start==0, length==16, word_length==16 and total_length==32. These
> value are generated by cgen in <arch>_cgen_insert_operand and I
> believe that they are correct.
>
> 2) Even if the abort did not occur the generated insn was wrong
> because the insns base value was not correctly onserted into the
> insn integer by insert_insn_normal.
>
> 3) A similar problem to 2) exists in print_insn
>
> This patch allows for CGEN_INT_INSN_P==1 with base-insn-bitsize
> != max-insn-bitsize. I have tested it against my correct work
> (which has this configuration) and against the fr30 (which has
> CGEN_INT_INSN_P==0) and against another port for which
> CGEN_INT_INSN_P==1 and base-insn-bitsize == max-insn-bitsize.
>
> OK to commit? ---- or was there a much easier way to handle
> this? :-)
*** cgen-ibld.in Tue Aug 22 15:04:57 2000
--- /home2/brolley/sourceware/src/opcodes/cgen-ibld.in Tue Aug 22 17:27:59 2000
*************** cgen_put_insn_int_value (cd, buf, length
*** 331,340 ****
int insn_length;
CGEN_INSN_INT value;
{
! int shift = insn_length - length;
! /* Written this way to avoid undefined behaviour. */
! CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
! *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
}
/* Operand extraction. */
--- 331,347 ----
int insn_length;
CGEN_INSN_INT value;
{
! /* For architectures with insns smaller than the base-insn-bitsize,
! length may be too big. */
! if (length > insn_length)
! *buf = value;
! else
! {
! int shift = insn_length - length;
! /* Written this way to avoid undefined behaviour. */
! CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
! *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
! }
}
/* Operand extraction. */