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[PATCH] x86: accept SSE* insns accessing MMX registers with ".arch .nommx"
- From: Jan Beulich <jbeulich at suse dot com>
- To: "binutils at sourceware dot org" <binutils at sourceware dot org>
- Cc: "H.J. Lu" <hjl dot tools at gmail dot com>
- Date: Thu, 13 Feb 2020 10:24:32 +0100
- Subject: [PATCH] x86: accept SSE* insns accessing MMX registers with ".arch .nommx"
These are regular SSE/SSE2 insns, and hence should be accepted
irrespective of MMX as a feature being enabled. Since the MMX CPU
feature is intentionally not implicitly enabled by ".arch .sse", MMX
registers may be left unrecognized only when both MMX and SSE are
disabled. The errors previously generated on most of these insns in this
mode perhaps wasn't actually the biggest problem - in "noprefix" mode,
mm<N> source operands would silently have been taken as memory operands
of those names, i.e. wrong code was silently generated.
gas/
2020-02-XX Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (parse_real_register): Accept MMX registers
also when SSE is enabled.
* testsuite/gas/i386/nommx-4.s, testsuite/gas/i386/nommx-4.l:
New.
* testsuite/gas/i386/i386.exp: Run new test.
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -11877,7 +11877,9 @@ parse_real_register (char *reg_string, c
&& !cpu_arch_flags.bitfield.cpui386)
return (const reg_entry *) NULL;
- if (r->reg_type.bitfield.class == RegMMX && !cpu_arch_flags.bitfield.cpummx)
+ if (r->reg_type.bitfield.class == RegMMX
+ && !cpu_arch_flags.bitfield.cpusse
+ && !cpu_arch_flags.bitfield.cpummx)
return (const reg_entry *) NULL;
if (!cpu_arch_flags.bitfield.cpuavx512f)
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -191,6 +191,7 @@ if [expr ([istarget "i*86-*-*"] || [ist
run_list_test "nommx-1" "-al"
run_list_test "nommx-2" "-march=core+nommx -al"
run_list_test "nommx-3" "-march=+nommx -al"
+ run_list_test "nommx-4" "-al"
run_list_test "nosse-1" "-al"
run_list_test "nosse-2" "-march=core+nosse -al"
run_list_test "nosse-3" "-march=+nosse -al"
--- /dev/null
+++ b/gas/testsuite/gas/i386/nommx-4.l
@@ -0,0 +1,56 @@
+.*: Assembler messages:
+.*:23: Error: .*\.nosse.*
+.*:24: Error: .*\.nosse.*
+.*:25: Error: .*\.nosse.*
+.*:26: Error: .*\.nosse.*
+.*:27: Error: .*\.nosse.*
+.*:28: Error: .*\.nosse.*
+.*:29: Error: .*\.nosse.*
+.*:30: Error: .*\.nosse.*
+GAS LISTING .*
+#...
+[ ]*[1-9][0-9]*[ ]+\#.*
+[ ]*[1-9][0-9]*[ ]+\.text
+[ ]*[1-9][0-9]* \?\?\?\? 660F2DC0[ ]+cvtpd2pi %xmm0, %mm0
+[ ]*[1-9][0-9]* \?\?\?\? 660F2AC0[ ]+cvtpi2pd %mm0, %xmm0
+[ ]*[1-9][0-9]* \?\?\?\? 0F2AC0[ ]+cvtpi2ps %mm0, %xmm0
+[ ]*[1-9][0-9]* \?\?\?\? 0F2DC0[ ]+cvtps2pi %xmm0, %mm0
+[ ]*[1-9][0-9]* \?\?\?\? 660F2CC0[ ]+cvttpd2pi %xmm0, %mm0
+[ ]*[1-9][0-9]* \?\?\?\? 0F2CC0[ ]+cvttps2pi %xmm0, %mm0
+[ ]*[1-9][0-9]* \?\?\?\? F20FD6C0[ ]+movdq2q %xmm0, %mm0
+[ ]*[1-9][0-9]* \?\?\?\? F30FD6C0[ ]+movq2dq %mm0, %xmm0
+[ ]*[1-9][0-9]*[ ]*
+[ ]*[1-9][0-9]*[ ]+\.arch .nommx
+[ ]*[1-9][0-9]* \?\?\?\? 660F2DC0[ ]+cvtpd2pi %xmm0, %mm0
+[ ]*[1-9][0-9]* \?\?\?\? 660F2AC0[ ]+cvtpi2pd %mm0, %xmm0
+[ ]*[1-9][0-9]* \?\?\?\? 0F2AC0[ ]+cvtpi2ps %mm0, %xmm0
+[ ]*[1-9][0-9]* \?\?\?\? 0F2DC0[ ]+cvtps2pi %xmm0, %mm0
+[ ]*[1-9][0-9]* \?\?\?\? 660F2CC0[ ]+cvttpd2pi %xmm0, %mm0
+[ ]*[1-9][0-9]* \?\?\?\? 0F2CC0[ ]+cvttps2pi %xmm0, %mm0
+[ ]*[1-9][0-9]* \?\?\?\? F20FD6C0[ ]+movdq2q %xmm0, %mm0
+[ ]*[1-9][0-9]* \?\?\?\? F30FD6C0[ ]+movq2dq %mm0, %xmm0
+[ ]*[1-9][0-9]*[ ]*
+[ ]*[1-9][0-9]*[ ]+\.arch \.nosse
+[ ]*[1-9][0-9]*[ ]+cvtpd2pi %xmm0, %mm0
+[ ]*[1-9][0-9]*[ ]+cvtpi2pd %mm0, %xmm0
+[ ]*[1-9][0-9]*[ ]+cvtpi2ps %mm0, %xmm0
+[ ]*[1-9][0-9]*[ ]+cvtps2pi %xmm0, %mm0
+[ ]*[1-9][0-9]*[ ]+cvttpd2pi %xmm0, %mm0
+[ ]*[1-9][0-9]*[ ]+cvttps2pi %xmm0, %mm0
+[ ]*[1-9][0-9]*[ ]+movdq2q %xmm0, %mm0
+[ ]*[1-9][0-9]*[ ]+movq2dq %mm0, %xmm0
+[ ]*[1-9][0-9]*[ ]*
+[ ]*[1-9][0-9]*[ ]+\.arch generic32
+[ ]*[1-9][0-9]*[ ]+\.arch \.sse
+[ ]*[1-9][0-9]* \?\?\?\? 0F2AC0[ ]+cvtpi2ps %mm0, %xmm0
+[ ]*[1-9][0-9]* \?\?\?\? 0F2DC0[ ]+cvtps2pi %xmm0, %mm0
+[ ]*[1-9][0-9]* \?\?\?\? 0F2CC0[ ]+cvttps2pi %xmm0, %mm0
+[ ]*[1-9][0-9]*[ ]*
+[ ]*[1-9][0-9]*[ ]+\.arch \.sse2
+[ ]*[1-9][0-9]* \?\?\?\? 660F2DC0[ ]+cvtpd2pi %xmm0, %mm0
+[ ]*[1-9][0-9]* \?\?\?\? 660F2AC0[ ]+cvtpi2pd %mm0, %xmm0
+[ ]*[1-9][0-9]* \?\?\?\? 660F2CC0[ ]+cvttpd2pi %xmm0, %mm0
+[ ]*[1-9][0-9]* \?\?\?\? F20FD6C0[ ]+movdq2q %xmm0, %mm0
+[ ]*[1-9][0-9]* \?\?\?\? F30FD6C0[ ]+movq2dq %mm0, %xmm0
+[ ]*[1-9][0-9]*[ ]*
+#pass
--- /dev/null
+++ b/gas/testsuite/gas/i386/nommx-4.s
@@ -0,0 +1,45 @@
+# Test .arch .nommx with .sse/.sse2
+ .text
+ cvtpd2pi %xmm0, %mm0
+ cvtpi2pd %mm0, %xmm0
+ cvtpi2ps %mm0, %xmm0
+ cvtps2pi %xmm0, %mm0
+ cvttpd2pi %xmm0, %mm0
+ cvttps2pi %xmm0, %mm0
+ movdq2q %xmm0, %mm0
+ movq2dq %mm0, %xmm0
+
+ .arch .nommx
+ cvtpd2pi %xmm0, %mm0
+ cvtpi2pd %mm0, %xmm0
+ cvtpi2ps %mm0, %xmm0
+ cvtps2pi %xmm0, %mm0
+ cvttpd2pi %xmm0, %mm0
+ cvttps2pi %xmm0, %mm0
+ movdq2q %xmm0, %mm0
+ movq2dq %mm0, %xmm0
+
+ .arch .nosse
+ cvtpd2pi %xmm0, %mm0
+ cvtpi2pd %mm0, %xmm0
+ cvtpi2ps %mm0, %xmm0
+ cvtps2pi %xmm0, %mm0
+ cvttpd2pi %xmm0, %mm0
+ cvttps2pi %xmm0, %mm0
+ movdq2q %xmm0, %mm0
+ movq2dq %mm0, %xmm0
+
+ .arch generic32
+ .arch .sse
+ cvtpi2ps %mm0, %xmm0
+ cvtps2pi %xmm0, %mm0
+ cvttps2pi %xmm0, %mm0
+
+ .arch .sse2
+ cvtpd2pi %xmm0, %mm0
+ cvtpi2pd %mm0, %xmm0
+ cvttpd2pi %xmm0, %mm0
+ movdq2q %xmm0, %mm0
+ movq2dq %mm0, %xmm0
+
+ .p2align 4