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[PATCH] [ARC] Fix ldbit test on 32-bit systems


The long immediate operand chosen for one of the ldbit tests is
equivalent to a small negative value that would fit inside an s9
operand, leading to the assembler to choose an unexpected (but
legitimate) encoding of the instruction on 32-bit systems, and
therefore causing the test to fail. This commit fixes the test by
changing the offending limm value so that it can no longer be
interpreted as an s9 operand.

Tested with ARC big- and little-endian on both 32- and 64-bit
systems.

gas/ChangeLog:

    * testsuite/gas/arc/nps400-6.s: Change ldbit tests so that
    limm operands are out of the range of an s9, in order to fix
    the test.
    * testsuite/gas/arc/nps400-6.d: Updated to match new expected
    output.
---
 gas/ChangeLog                    |  6 ++++++
 gas/testsuite/gas/arc/nps400-6.d | 12 ++++++------
 gas/testsuite/gas/arc/nps400-6.s |  2 +-
 3 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/gas/testsuite/gas/arc/nps400-6.d b/gas/testsuite/gas/arc/nps400-6.d
index 972689b..3adf756 100644
--- a/gas/testsuite/gas/arc/nps400-6.d
+++ b/gas/testsuite/gas/arc/nps400-6.d
@@ -314,7 +314,7 @@ Disassembly of section .text:
  61c:	1601 7983 ffff ffff 	ldbit.di	r3,\[0xffffffff,1\]
  624:	1600 7984 1234 5678 	ldbit.di	r4,\[0x12345678\]
  62c:	2636 81c5           	ldbit.di	r5,\[r6,r7\]
- 630:	2136 9f88 ffff ffff 	ldbit.di	r8,\[r9,0xffffffff\]
+ 630:	2136 9f88 feff ffff 	ldbit.di	r8,\[r9,0xfeffffff\]
  638:	2636 f2ca ffff ffff 	ldbit.di	r10,\[0xffffffff,r11\]
  640:	1100 09c0           	ldbit.di.cl	r0,\[r1\]
  644:	1101 09c0           	ldbit.di.cl	r0,\[r1,1\]
@@ -322,7 +322,7 @@ Disassembly of section .text:
  64c:	1601 79c3 ffff ffff 	ldbit.di.cl	r3,\[0xffffffff,1\]
  654:	1600 79c4 1234 5678 	ldbit.di.cl	r4,\[0x12345678\]
  65c:	2637 81c5           	ldbit.di.cl	r5,\[r6,r7\]
- 660:	2137 9f88 ffff ffff 	ldbit.di.cl	r8,\[r9,0xffffffff\]
+ 660:	2137 9f88 feff ffff 	ldbit.di.cl	r8,\[r9,0xfeffffff\]
  668:	2637 f2ca ffff ffff 	ldbit.di.cl	r10,\[0xffffffff,r11\]
  670:	1100 0b80           	ldbit.x2.di	r0,\[r1\]
  674:	1101 0b80           	ldbit.x2.di	r0,\[r1,1\]
@@ -330,7 +330,7 @@ Disassembly of section .text:
  67c:	1601 7b83 ffff ffff 	ldbit.x2.di	r3,\[0xffffffff,1\]
  684:	1600 7b84 1234 5678 	ldbit.x2.di	r4,\[0x12345678\]
  68c:	2676 81c5           	ldbit.x2.di	r5,\[r6,r7\]
- 690:	2176 9f88 ffff ffff 	ldbit.x2.di	r8,\[r9,0xffffffff\]
+ 690:	2176 9f88 feff ffff 	ldbit.x2.di	r8,\[r9,0xfeffffff\]
  698:	2676 f2ca ffff ffff 	ldbit.x2.di	r10,\[0xffffffff,r11\]
  6a0:	1100 0bc0           	ldbit.x2.di.cl	r0,\[r1\]
  6a4:	1101 0bc0           	ldbit.x2.di.cl	r0,\[r1,1\]
@@ -338,7 +338,7 @@ Disassembly of section .text:
  6ac:	1601 7bc3 ffff ffff 	ldbit.x2.di.cl	r3,\[0xffffffff,1\]
  6b4:	1600 7bc4 1234 5678 	ldbit.x2.di.cl	r4,\[0x12345678\]
  6bc:	2677 81c5           	ldbit.x2.di.cl	r5,\[r6,r7\]
- 6c0:	2177 9f88 ffff ffff 	ldbit.x2.di.cl	r8,\[r9,0xffffffff\]
+ 6c0:	2177 9f88 feff ffff 	ldbit.x2.di.cl	r8,\[r9,0xfeffffff\]
  6c8:	2677 f2ca ffff ffff 	ldbit.x2.di.cl	r10,\[0xffffffff,r11\]
  6d0:	1100 0d80           	ldbit.x4.di	r0,\[r1\]
  6d4:	1101 0d80           	ldbit.x4.di	r0,\[r1,1\]
@@ -346,7 +346,7 @@ Disassembly of section .text:
  6dc:	1601 7d83 ffff ffff 	ldbit.x4.di	r3,\[0xffffffff,1\]
  6e4:	1600 7d84 1234 5678 	ldbit.x4.di	r4,\[0x12345678\]
  6ec:	26b6 81c5           	ldbit.x4.di	r5,\[r6,r7\]
- 6f0:	21b6 9f88 ffff ffff 	ldbit.x4.di	r8,\[r9,0xffffffff\]
+ 6f0:	21b6 9f88 feff ffff 	ldbit.x4.di	r8,\[r9,0xfeffffff\]
  6f8:	26b6 f2ca ffff ffff 	ldbit.x4.di	r10,\[0xffffffff,r11\]
  700:	1100 0dc0           	ldbit.x4.di.cl	r0,\[r1\]
  704:	1101 0dc0           	ldbit.x4.di.cl	r0,\[r1,1\]
@@ -354,5 +354,5 @@ Disassembly of section .text:
  70c:	1601 7dc3 ffff ffff 	ldbit.x4.di.cl	r3,\[0xffffffff,1\]
  714:	1600 7dc4 1234 5678 	ldbit.x4.di.cl	r4,\[0x12345678\]
  71c:	26b7 81c5           	ldbit.x4.di.cl	r5,\[r6,r7\]
- 720:	21b7 9f88 ffff ffff 	ldbit.x4.di.cl	r8,\[r9,0xffffffff\]
+ 720:	21b7 9f88 feff ffff 	ldbit.x4.di.cl	r8,\[r9,0xfeffffff\]
  728:	26b7 f2ca ffff ffff 	ldbit.x4.di.cl	r10,\[0xffffffff,r11\]
diff --git a/gas/testsuite/gas/arc/nps400-6.s b/gas/testsuite/gas/arc/nps400-6.s
index c10afe6..adbb594 100644
--- a/gas/testsuite/gas/arc/nps400-6.s
+++ b/gas/testsuite/gas/arc/nps400-6.s
@@ -216,7 +216,7 @@
         \mnem\()        r3,[0xffffffff,1]
         \mnem\()        r4,[0x12345678]
         \mnem\()        r5,[r6,r7]
-        \mnem\()        r8,[r9,0xffffffff]
+        \mnem\()        r8,[r9,0xfeffffff]
         \mnem\()        r10,[0xffffffff,r11]
         .endm
 
-- 
2.7.4


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