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[AArch64][PATCH 1/3] Support ARMv8.2 FP16 floating point instructions.
- From: Matthew Wahab <matthew dot wahab at foss dot arm dot com>
- To: "binutils at sourceware dot org" <binutils at sourceware dot org>
- Date: Tue, 24 Nov 2015 11:49:13 +0000
- Subject: [AArch64][PATCH 1/3] Support ARMv8.2 FP16 floating point instructions.
- Authentication-results: sourceware.org; auth=none
ARMv8.2 adds 16-bit floating point operations as an optional extension
to the ARMv8 FP support. This patch set adds support for the 16-bit FP
instructions to binutils, enabling the instructions when both +fp and
+fp16 architecture extensions are enabled.
The patches in this series:
- Add a feature macro for use by the encoding/decoding mechanism.
- Adjust a utility function, used when disassembling, to support 16-bit
floating point values.
- Add the new scalar floating-point instructions.
The patches depend on
https://sourceware.org/ml/binutils/2015-11/msg00223.html, which adds the
+fp16 option.
This patch adds the feature macro FP_F16 to the AArch64 encoding/decoding
mechanism, enabling it when both +fp and +fp16 are selected.
Tested the series for aarch64-none-linux gnu with cross-compiled
check-binutils and check-gas.
opcodes/
2015-11-24 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-tbl.h (aarch64_feature_fp_f16): New.
(FP_F16): New.
>From eb08bb61f8d6b1b72bc7dc1b12cc932393f0b6df Mon Sep 17 00:00:00 2001
From: Matthew Wahab <matthew.wahab@arm.com>
Date: Thu, 24 Sep 2015 18:35:18 +0100
Subject: [PATCH 1/3] [AArch64][PATCH 1/3] Support ARMv8.2 FP16 floating point
instructions.
Change-Id: I10771fb7dbe7f9f7e9082aea444dbf627fbf779b
---
opcodes/aarch64-tbl.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 6371193..6b77b36 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -1235,6 +1235,8 @@ static const aarch64_feature_set aarch64_feature_rdma =
AARCH64_FEATURE (AARCH64_FEATURE_RDMA, 0);
static const aarch64_feature_set aarch64_feature_v8_2 =
AARCH64_FEATURE (AARCH64_FEATURE_V8_2, 0);
+static const aarch64_feature_set aarch64_feature_fp_f16 =
+ AARCH64_FEATURE (AARCH64_FEATURE_F16 | AARCH64_FEATURE_FP, 0);
#define CORE &aarch64_feature_v8
#define FP &aarch64_feature_fp
@@ -1244,6 +1246,7 @@ static const aarch64_feature_set aarch64_feature_v8_2 =
#define LSE &aarch64_feature_lse
#define LOR &aarch64_feature_lor
#define RDMA &aarch64_feature_rdma
+#define FP_F16 &aarch64_feature_fp_f16
#define ARMV8_2 &aarch64_feature_v8_2
struct aarch64_opcode aarch64_opcode_table[] =
--
2.1.4