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> -----Original Message----- > From: Richard Earnshaw > Sent: Tuesday, September 30, 2014 11:56 PM > To: Terry Guo; binutils@sourceware.org > Subject: Re: [Patch]Option support to ARM MCU Cortex-M7 and related FPU > > On 24/09/14 05:06, Terry Guo wrote: > > Hi there, > > > > The attached patch implemented option support in Binutils to support > > new ARM MCU announced at: > > http://www.arm.com/about/newsroom/arm-supercharges-mcu-market- > with-hig > > h-perf > > ormance-cortex-m7-processor.php > > http://www.arm.com/products/processors/cortex-m/cortex-m7- > processor.ph > > p > > > > Tested with Binutils regression test and no new regressions. Is it OK > > to trunk? > > > > BR, > > Terry > > > > gas/ChangeLog: > > 2014-09-24 Terry Guo <terry.guo@arm.com> > > > > * config/tc-arm.c (arm_cpus): Support cortex-m7. > > (arm_fpus): Support fpv5-sp-d16 and fpv5-d16. > > (do_vfp_nsyn_cvt_fpv8): Generate error when use D register for S > > register only > > target like FPv5-SP-D16. > > (do_neon_cvttb_1): Likewise. > > (do_vfp_nsyn_fpv8): Likewise. > > (do_vrint_1): Likewise. > > * doc/c-arm.texi: Document new cpu and fpu names for cortex-m7. > > > > gas/testsuite/ChangeLog: > > 2014-09-24 Terry Guo <terry.guo@arm.com> > > > > * gas/arm/armv7e-m+fpv5-d16.s: New. > > * gas/arm/armv7e-m+fpv5-d16.d: Likewise. > > * gas/arm/armv7e-m+fpv5-sp-d16.s: Likewise. > > * gas/arm/armv7e-m+fpv5-sp-d16.d: Likewise. > > > > > > option-support-cortex-m7-v1.txt > > > > > > diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index > > 5077f87..2fe3126 100644 > > --- a/gas/config/tc-arm.c > > +++ b/gas/config/tc-arm.c > > @@ -15032,6 +15032,13 @@ do_vfp_nsyn_cvt_fpv8 (enum > neon_cvt_flavour flavour, > > int sz, op; > > int rm; > > > > + /* Targets like FPv5-SP-D16 don't support FP v8 instructions with > > + D register operands. */ > > + if (flavour == neon_cvt_flavour_s32_f64 > > + || flavour == neon_cvt_flavour_u32_f64) > > + constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, fpu_vfp_ext_v1), > > + _(BAD_FPU)); > > + > > This feels like an abuse of the feature testing (what has vfp_ext_v1 really got > to do with this restriction?). Why don't you create fpu_vfp_ext_v5xd and > fpu_vfp_ext_armv8 and then use these in the tests? > > Similarly for the cases below. > The vfp_ext_v1 indicates whether target supports instructions with double-precision register. If target is fpv5-d16, then the vfp_ext_v1 is true. If target is fpv5-sp-d16, then the vfp_ext_v1 is false. Then if target supports DP register, the instruction with DP register operands is valid otherwise the instruction is invalid. By using vfp_ext_v1, I can save the bit for fpu_vfp_ext_v5xd which is almost running out if you check include/opcode/arm.h. Anyway I updated the patch per your comments. Is this one better? BR, Terry include/ChangeLog: 2014-10-02 Terry Guo <terry.guo@arm.com> * opcode/arm.h (FPU_VFP_EXT_ARMV8xD): New macro. (FPU_VFP_V5D16): Likewise. (FPU_VFP_V5_SP_D16): Likewise. (FPU_ARCH_VFP_V5D16): Likewise. (FPU_ARCH_VFP_V5_SP_D16): Likewise. gas/ChangeLog: 2014-10-02 Terry Guo <terry.guo@arm.com> * config/tc-arm.c (fpu_vfp_ext_armv8xd): New. (arm_cpus): Support cortex-m7. (arm_fpus): Support fpv5-sp-d16 and fpv5-d16. (do_vfp_nsyn_cvt_fpv8): Generate error when use D register for S register only target like FPv5-SP-D16. (do_neon_cvttb_1): Likewise. (do_vfp_nsyn_fpv8): Likewise. (do_vrint_1): Likewise. * doc/c-arm.texi: Document new cpu and fpu names for cortex-m7. gas/testsuite/ChangeLog: 2014-10-02 Terry Guo <terry.guo@arm.com> * gas/arm/armv7e-m+fpv5-d16.s: New. * gas/arm/armv7e-m+fpv5-d16.d: Likewise. * gas/arm/armv7e-m+fpv5-sp-d16.s: Likewise. * gas/arm/armv7e-m+fpv5-sp-d16.d: Likewise.
Attachment:
option-support-cortex-m7-v2.txt
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