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Re: [PATCH] aarch64: Fix the documentation on :pg_hi21:

On 05/29/14 13:19, Yufeng Zhang wrote:
Hi Martin,

On 05/29/14 13:00, Martin Storsjo wrote:
The syntax described, including a leading '#', was not supported
in practice. (For :lo12: it is optional.)

I believe this is an issue in the parser; '#' should be optional in
either case.

It looks like gas/config/tc-aarch64.c:parse_adrp () is missing the
skip_past_char (&p, '#') at its beginning; see parse_half () for an example.

After spending some time this afternoon reading ARMv8 Architecture Reference Manual (ARMARM) and having a discussion with a colleague, I think I'll have to take back what I just said. Sorry!

The A64 assembly language allows the optional # character to introduce constant immediate operands, e.g. in LDR instructions with immediate offset:

  LDR <Wt>, [<Xn|SP>], #<simm>

and in the bitfield move instructions:

  BFM <Wd>, <Wn>, #<immr>, #<imms>

The ADRP instruction, however, has the following syntax:

  ADRP <Xd>, <label>

whose second operand is a program label whose 4KB page address is to be calculated, and for such a operand, it doesn't make much sense to allow the # character as an optional prefix, e.g. ADRP X0, #foo would look weird and confusing.

So I think your original patch is the right one to go with, and my only comment is to remove both # characters from the line of

  @samp{#:pg_hi21:} and @samp{#:lo12:} respectively.

Apologize again for the previous wrong direction.

Please get an approval from Marcus.



   gas/doc/c-aarch64.texi | 10 +++++-----
   1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index cce4f61..1f4ce4c 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -186,24 +186,24 @@ For example to load the 48-bit absolute address of @var{foo} into x0:
   @cindex ADRP, ADD, LDR/STR group relocations, AArch64
   Relocations for @samp{ADRP}, and @samp{ADD}, @samp{LDR} or @samp{STR}
   instructions can be generated by prefixing the label with
-@samp{#:pg_hi21:} and @samp{#:lo12:} respectively.
+@samp{:pg_hi21:} and @samp{#:lo12:} respectively.

   For example to use 33-bit (+/-4GB) pc-relative addressing to
   load the address of @var{foo} into x0:

-        adrp x0, #:pg_hi21:foo
+        adrp x0, :pg_hi21:foo
           add  x0, x0, #:lo12:foo
   @end smallexample

   Or to load the value of @var{foo} into x0:

-        adrp x0, #:pg_hi21:foo
+        adrp x0, :pg_hi21:foo
           ldr  x0, [x0, #:lo12:foo]
   @end smallexample

-Note that @samp{#:pg_hi21:} is optional.
+Note that @samp{:pg_hi21:} is optional.

           adrp x0, foo
@@ -212,7 +212,7 @@ Note that @samp{#:pg_hi21:} is optional.
   is equivalent to

-        adrp x0, #:pg_hi21:foo
+        adrp x0, :pg_hi21:foo
   @end smallexample

   @node AArch64 Floating Point

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