This is the mail archive of the binutils@sourceware.org mailing list for the binutils project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

ppc64 stubs


This patch sets the alignment of stub sections, the idea being to
remove one source of variability seen when running benchmarks.

ld/
	* emultempl/ppc64elf.em (ppc_add_stub_section): Align to 32 bytes.
ld/testsuite/
	* ld-powerpc/relbrlt.d: Update for stub alignment change.
	* ld-powerpc/tlsexe.g: Likewise.
	* ld-powerpc/tlsexe.r: Likewise.
	* ld-powerpc/tlsexetoc.g: Likewise.
	* ld-powerpc/tlsexetoc.r: Likewise.
	* ld-powerpc/tlsso.g: Likewise.
	* ld-powerpc/tlsso.r: Likewise.

Index: ld/emultempl/ppc64elf.em
===================================================================
RCS file: /cvs/src/src/ld/emultempl/ppc64elf.em,v
retrieving revision 1.76
diff -u -p -r1.76 ppc64elf.em
--- ld/emultempl/ppc64elf.em	9 Oct 2011 03:41:16 -0000	1.76
+++ ld/emultempl/ppc64elf.em	9 Oct 2011 04:08:14 -0000
@@ -378,7 +378,8 @@ ppc_add_stub_section (const char *stub_s
 	   | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_KEEP);
   stub_sec = bfd_make_section_anyway_with_flags (stub_file->the_bfd,
 						 stub_sec_name, flags);
-  if (stub_sec == NULL)
+  if (stub_sec == NULL
+      || !bfd_set_section_alignment (stub_file->the_bfd, stub_sec, 5))
     goto err_ret;
 
   output_section = input_section->output_section;
Index: ld/testsuite/ld-powerpc/relbrlt.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-powerpc/relbrlt.d,v
retrieving revision 1.6
diff -u -p -r1.6 relbrlt.d
--- ld/testsuite/ld-powerpc/relbrlt.d	26 Jul 2011 01:57:18 -0000	1.6
+++ ld/testsuite/ld-powerpc/relbrlt.d	9 Oct 2011 04:08:15 -0000
@@ -7,7 +7,7 @@
 
 Disassembly of section \.text:
 
-0*100000b0 <_start>:
+0*100000c0 <_start>:
 [0-9a-f	 ]*:	49 bf 00 2d 	bl      .*
 [0-9a-f	 ]*: R_PPC64_REL24	\.text\+0x37e003c
 [0-9a-f	 ]*:	60 00 00 00 	nop
@@ -23,38 +23,38 @@ Disassembly of section \.text:
 
 [0-9a-f	 ]*<.*plt_branch.*>:
 [0-9a-f	 ]*:	e9 62 80 00 	ld      r11,-32768\(r2\)
-[0-9a-f	 ]*: R_PPC64_TOC16_DS	\*ABS\*\+0x157f00d8
+[0-9a-f	 ]*: R_PPC64_TOC16_DS	\*ABS\*\+0x157f00e8
 [0-9a-f	 ]*:	7d 69 03 a6 	mtctr   r11
 [0-9a-f	 ]*:	4e 80 04 20 	bctr
 
 [0-9a-f	 ]*<.*long_branch.*>:
 [0-9a-f	 ]*:	49 bf 00 10 	b       .* <far>
-[0-9a-f	 ]*: R_PPC64_REL24	\*ABS\*\+0x137e00ec
+[0-9a-f	 ]*: R_PPC64_REL24	\*ABS\*\+0x137e00fc
 
 [0-9a-f	 ]*<.*plt_branch.*>:
 [0-9a-f	 ]*:	e9 62 80 08 	ld      r11,-32760\(r2\)
-[0-9a-f	 ]*: R_PPC64_TOC16_DS	\*ABS\*\+0x157f00e0
+[0-9a-f	 ]*: R_PPC64_TOC16_DS	\*ABS\*\+0x157f00f0
 [0-9a-f	 ]*:	7d 69 03 a6 	mtctr   r11
 [0-9a-f	 ]*:	4e 80 04 20 	bctr
 	\.\.\.
 
-0*137e00ec <far>:
+0*137e00fc <far>:
 [0-9a-f	 ]*:	4e 80 00 20 	blr
 	\.\.\.
 
-0*13bf00d0 <far2far>:
+0*13bf00e0 <far2far>:
 [0-9a-f	 ]*:	4e 80 00 20 	blr
 	\.\.\.
 
-0*157e00d4 <huge>:
+0*157e00e4 <huge>:
 [0-9a-f	 ]*:	4e 80 00 20 	blr
 
 Disassembly of section \.branch_lt:
 
-0*157f00d8 <\.branch_lt>:
+0*157f00e8 <\.branch_lt>:
 [0-9a-f	 ]*:	00 00 00 00 .*
-[0-9a-f	 ]*: R_PPC64_RELATIVE	\*ABS\*\+0x13bf00d0
-[0-9a-f	 ]*:	13 bf 00 d0 .*
+[0-9a-f	 ]*: R_PPC64_RELATIVE	\*ABS\*\+0x13bf00e0
+[0-9a-f	 ]*:	13 bf 00 e0 .*
 [0-9a-f	 ]*:	00 00 00 00 .*
-[0-9a-f	 ]*: R_PPC64_RELATIVE	\*ABS\*\+0x157e00d4
-[0-9a-f	 ]*:	15 7e 00 d4 .*
+[0-9a-f	 ]*: R_PPC64_RELATIVE	\*ABS\*\+0x157e00e4
+[0-9a-f	 ]*:	15 7e 00 e4 .*
Index: ld/testsuite/ld-powerpc/tlsexe.g
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-powerpc/tlsexe.g,v
retrieving revision 1.9
diff -u -p -r1.9 tlsexe.g
--- ld/testsuite/ld-powerpc/tlsexe.g	14 Jul 2011 03:28:22 -0000	1.9
+++ ld/testsuite/ld-powerpc/tlsexe.g	9 Oct 2011 04:08:15 -0000
@@ -7,6 +7,6 @@
 .*: +file format elf64-powerpc
 
 Contents of section \.got:
-.* 00000000 10018610 ffffffff ffff8018  .*
+.* 00000000 10018620 ffffffff ffff8018  .*
 .* 00000000 00000000 00000000 00000000  .*
 .* 00000000 00000000 00000000 00000000  .*
Index: ld/testsuite/ld-powerpc/tlsexe.r
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-powerpc/tlsexe.r,v
retrieving revision 1.28
diff -u -p -r1.28 tlsexe.r
--- ld/testsuite/ld-powerpc/tlsexe.r	5 Aug 2011 06:22:22 -0000	1.28
+++ ld/testsuite/ld-powerpc/tlsexe.r	9 Oct 2011 04:08:15 -0000
@@ -16,7 +16,7 @@ Section Headers:
  +\[[ 0-9]+\] \.dynstr +.*
  +\[[ 0-9]+\] \.rela\.dyn +.*
  +\[[ 0-9]+\] \.rela\.plt +.*
- +\[[ 0-9]+\] \.text +PROGBITS .* 0+128 0+ +AX +0 +0 +8
+ +\[[ 0-9]+\] \.text +PROGBITS .* 0+128 0+ +AX +0 +0 +32
  +\[[ 0-9]+\] \.tdata +PROGBITS .* 0+38 0+ WAT +0 +0 +8
  +\[[ 0-9]+\] \.tbss +NOBITS .* 0+38 0+ WAT +0 +0 +8
  +\[[ 0-9]+\] \.dynamic +DYNAMIC .* 0+160 10 +WA +4 +0 +8
Index: ld/testsuite/ld-powerpc/tlsexetoc.g
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-powerpc/tlsexetoc.g,v
retrieving revision 1.9
diff -u -p -r1.9 tlsexetoc.g
--- ld/testsuite/ld-powerpc/tlsexetoc.g	14 Jul 2011 03:28:22 -0000	1.9
+++ ld/testsuite/ld-powerpc/tlsexetoc.g	9 Oct 2011 04:08:15 -0000
@@ -7,7 +7,7 @@
 .*: +file format elf64-powerpc
 
 Contents of section \.got:
-.* 00000000 100185a8 00000000 00000000  .*
+.* 00000000 100185c0 00000000 00000000  .*
 .* 00000000 00000000 00000000 00000000  .*
 .* 00000000 00000000 00000000 00000001  .*
 .* 00000000 00000000 00000000 00000001  .*
Index: ld/testsuite/ld-powerpc/tlsexetoc.r
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-powerpc/tlsexetoc.r,v
retrieving revision 1.29
diff -u -p -r1.29 tlsexetoc.r
--- ld/testsuite/ld-powerpc/tlsexetoc.r	5 Aug 2011 06:22:22 -0000	1.29
+++ ld/testsuite/ld-powerpc/tlsexetoc.r	9 Oct 2011 04:08:15 -0000
@@ -16,7 +16,7 @@ Section Headers:
  +\[[ 0-9]+\] \.dynstr +.*
  +\[[ 0-9]+\] \.rela\.dyn +.*
  +\[[ 0-9]+\] \.rela\.plt +.*
- +\[[ 0-9]+\] \.text +PROGBITS .* 0+e8 0+ +AX +0 +0 +8
+ +\[[ 0-9]+\] \.text +PROGBITS .* 0+e8 0+ +AX +0 +0 +32
  +\[[ 0-9]+\] \.tdata +PROGBITS .* 0+38 0+ WAT +0 +0 +8
  +\[[ 0-9]+\] \.tbss +NOBITS .* 0+38 0+ WAT +0 +0 +8
  +\[[ 0-9]+\] \.dynamic +DYNAMIC .* 0+160 10 +WA +4 +0 +8
Index: ld/testsuite/ld-powerpc/tlsso.g
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-powerpc/tlsso.g,v
retrieving revision 1.8
diff -u -p -r1.8 tlsso.g
--- ld/testsuite/ld-powerpc/tlsso.g	13 Aug 2007 00:20:59 -0000	1.8
+++ ld/testsuite/ld-powerpc/tlsso.g	9 Oct 2011 04:08:15 -0000
@@ -7,7 +7,7 @@
 .*: +file format elf64-powerpc
 
 Contents of section \.got:
-.* 00000000 00018778 00000000 00000000  .*
+.* 00000000 00018780 00000000 00000000  .*
 .* 00000000 00000000 00000000 00000000  .*
 .* 00000000 00000000 00000000 00000000  .*
 .* 00000000 00000000 00000000 00000000  .*
Index: ld/testsuite/ld-powerpc/tlsso.r
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-powerpc/tlsso.r,v
retrieving revision 1.28
diff -u -p -r1.28 tlsso.r
--- ld/testsuite/ld-powerpc/tlsso.r	5 Aug 2011 06:22:22 -0000	1.28
+++ ld/testsuite/ld-powerpc/tlsso.r	9 Oct 2011 04:08:16 -0000
@@ -48,9 +48,9 @@ Relocation section '\.rela\.dyn' at offs
 [0-9a-f ]+R_PPC64_TPREL16 +0+60 le0 \+ 0
 [0-9a-f ]+R_PPC64_TPREL16_HA +0+68 le1 \+ 0
 [0-9a-f ]+R_PPC64_TPREL16_LO +0+68 le1 \+ 0
-[0-9a-f ]+R_PPC64_TPREL16_DS +0+105f0 \.tdata \+ 28
-[0-9a-f ]+R_PPC64_TPREL16_HA +0+105f0 \.tdata \+ 30
-[0-9a-f ]+R_PPC64_TPREL16_LO +0+105f0 \.tdata \+ 30
+[0-9a-f ]+R_PPC64_TPREL16_DS +0+105f8 \.tdata \+ 28
+[0-9a-f ]+R_PPC64_TPREL16_HA +0+105f8 \.tdata \+ 30
+[0-9a-f ]+R_PPC64_TPREL16_LO +0+105f8 \.tdata \+ 30
 [0-9a-f ]+R_PPC64_DTPMOD64 +0+
 [0-9a-f ]+R_PPC64_DTPREL64 +0+
 [0-9a-f ]+R_PPC64_DTPREL64 +0+18

-- 
Alan Modra
Australia Development Lab, IBM


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]