This is the mail archive of the
binutils@sourceware.org
mailing list for the binutils project.
Re: [PATCH] Add LWP support for upcoming AMD Orochi processor
- From: "H.J. Lu" <hjl dot tools at gmail dot com>
- To: Sebastian Pop <sebpop at gmail dot com>
- Cc: binutils at sourceware dot org, Jakub Jelinek <jakub at redhat dot com>, "Harle, Christophe" <christophe dot harle at amd dot com>, quentin dot neill at amd dot com
- Date: Thu, 5 Nov 2009 14:45:14 -0700
- Subject: Re: [PATCH] Add LWP support for upcoming AMD Orochi processor
- References: <cb9d34b20911051318s747e1ed4he9980d32b050a3c6@mail.gmail.com>
On Thu, Nov 5, 2009 at 2:18 PM, Sebastian Pop <sebpop@gmail.com> wrote:
> Hi,
>
> The attached patch adds support for the LWP instructions,
> see http://support.amd.com/us/Processor_TechDocs/43724.pdf
> that will be part of the upcoming AMD Orochi processor.
>
> 2009-11-05 ?Sebastian Pop ?<sebastian.pop@amd.com>
> ? ? ? ? ? ?Quentin Neill ?<quentin.neill@amd.com>
>
> ? ? ? ?* gas/config/tc-i386.c (cpu_arch): Add CPU_LWP_FLAGS.
> ? ? ? ?(build_vex_prefix): Handle xop09 and xop0a.
> ? ? ? ?(build_modrm_byte): Handle vexlwp.
> ? ? ? ?(md_show_usage): Add lwp.
>
> ? ? ? ?* gas/testsuite/gas/i386/i386.exp: Run x86-64-lwp.
> ? ? ? ?* gas/testsuite/gas/i386/x86-64-lwp.d: New.
> ? ? ? ?* gas/testsuite/gas/i386/x86-64-lwp.s: New.
>
> ? ? ? ?* opcodes/i386-dis.c (OP_LWPCB_E): New.
> ? ? ? ?(OP_LWP_E): New.
> ? ? ? ?(OP_LWP_I): New.
> ? ? ? ?(USE_XOP_8F_TABLE): New.
> ? ? ? ?(XOP_8F_TABLE): New.
> ? ? ? ?(REG_XOP_LWPCB): New.
> ? ? ? ?(REG_XOP_LWP): New.
> ? ? ? ?(XOP_09): New.
> ? ? ? ?(XOP_0A): New.
> ? ? ? ?(reg_table): Redirect REG_8F to XOP_8F_TABLE.
> ? ? ? ?Add entries for REG_XOP_LWPCB and REG_XOP_LWP.
> ? ? ? ?(xop_table): New.
> ? ? ? ?(get_valid_dis386): Handle USE_XOP_8F_TABLE.
> ? ? ? ?Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values
> ? ? ? ?to access to the vex_table.
> ? ? ? ?(OP_LWPCB_E): New.
> ? ? ? ?(OP_LWP_E): New.
> ? ? ? ?(OP_LWP_I): New.
> ? ? ? ?* opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP.
> ? ? ? ?(cpu_flags): Add CpuLWP.
> ? ? ? ?(opcode_modifiers): Add VexLWP, XOP09, and XOP0A.
> ? ? ? ?* opcodes/i386-opc.h (CpuLWP): New.
> ? ? ? ?(i386_cpu_flags): Add bit cpulwp.
> ? ? ? ?(VexLWP): New.
> ? ? ? ?(XOP09): New.
> ? ? ? ?(XOP0A): New.
> ? ? ? ?(i386_opcode_modifier): Add vexlwp, xop09, and xop0a.
> ? ? ? ?* opcodes/i386-opc.tbl (llwpcb): Added.
> ? ? ? ?(lwpval): Added.
> ? ? ? ?(lwpins): Added.
>
> Tested on x86-64-linux with make -k check and on simnow.
> Ok to commit?
>
There is no 32bit LWP test. Is LWP 64bit only? If yes, you need to
add Cpu64 to LWP insns.
Also please update doc/c-i386.texi.
--
H.J.