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src include/opcode/mips.h include/opcode/Chang ...
- From: rsandifo at sourceware dot org
- To: binutils-cvs at sourceware dot org
- Date: Sun, 07 Jul 2013 10:00:43 +0000
- Subject: src include/opcode/mips.h include/opcode/Chang ...
CVSROOT: /cvs/src
Module name: src
Changes by: rsandifo@sourceware.org 2013-07-07 10:00:43
Modified files:
include/opcode : mips.h ChangeLog
opcodes : mips-opc.c mips-dis.c ChangeLog
gas/config : tc-mips.c
gas : ChangeLog
Log message:
include/opcode/
* mips.h: Update documentation of "+s" and "+S".
opcodes/
* mips-opc.c (mips_builtin_opcodes): Use "+s" for "cins32" and
"+S" for "cins".
* mips-dis.c (print_mips_arg): Update "+s" and "+S" comments.
Combine cases.
gas/
* config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
Require the msb to be <= 31 for "+s". Check that the size is <= 31
for both "+s" and "+S".
Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/mips.h.diff?cvsroot=src&r1=1.96&r2=1.97
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/ChangeLog.diff?cvsroot=src&r1=1.505&r2=1.506
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/mips-opc.c.diff?cvsroot=src&r1=1.101&r2=1.102
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/mips-dis.c.diff?cvsroot=src&r1=1.107&r2=1.108
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.1984&r2=1.1985
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/config/tc-mips.c.diff?cvsroot=src&r1=1.554&r2=1.555
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/ChangeLog.diff?cvsroot=src&r1=1.5042&r2=1.5043