This is the mail archive of the
mailing list for the systemtap project.
Re: [PATCH] Linux Kernel Markers
- From: Karim Yaghmour <karim at opersys dot com>
- To: Alan Cox <alan at lxorguk dot ukuu dot org dot uk>
- Cc: Mathieu Desnoyers <compudj at krystal dot dyndns dot org>, Martin Bligh <mbligh at google dot com>, prasanna at in dot ibm dot com, Andrew Morton <akpm at osdl dot org>, "Frank Ch. Eigler" <fche at redhat dot com>, Ingo Molnar <mingo at elte dot hu>, Paul Mundt <lethal at linux-sh dot org>, linux-kernel <linux-kernel at vger dot kernel dot org>, Jes Sorensen <jes at sgi dot com>, Tom Zanussi <zanussi at us dot ibm dot com>, Richard J Moore <richardj_moore at uk dot ibm dot com>, Michel Dagenais <michel dot dagenais at polymtl dot ca>, Christoph Hellwig <hch at infradead dot org>, Greg Kroah-Hartman <gregkh at suse dot de>, Thomas Gleixner <tglx at linutronix dot de>, William Cohen <wcohen at redhat dot com>, ltt-dev at shafik dot org, systemtap at sources dot redhat dot com
- Date: Tue, 19 Sep 2006 20:52:55 -0400
- Subject: Re: [PATCH] Linux Kernel Markers
- Organization: Opersys inc.
- References: <20060918234502.GA197@Krystal> <20060919081124.GA30394@elte.hu> <451008AC.email@example.com> <20060919154612.GU3951@redhat.com> <4510151B.firstname.lastname@example.org> <email@example.com> <45101DBA.firstname.lastname@example.org> <20060919063821.GB23836@in.ibm.com> <email@example.com> <20060919175405.GC26339@Krystal> <firstname.lastname@example.org>
- Reply-to: karim at opersys dot com
Alan Cox wrote:
> Ar Maw, 2006-09-19 am 13:54 -0400, ysgrifennodd Mathieu Desnoyers:
>> Very good idea.. However, overwriting the second instruction with a jump could
>> be dangerous on preemptible and SMP kernels, because we never know if a thread
>> has an IP in any of its contexts that would return exactly at the middle of the
> No: on x86 it is the *same* case for all of these even writing an int3.
> One byte or a megabyte,
> You MUST ensure that every CPU executes a serializing instruction before
> it hits code that was modified by another processor. Otherwise you get
> CPU errata and the CPU produces results which vendors like to describe
> as "undefined".
I was aware of that this errata existed, but never actually knew the
actual specifics of it. Are these two separate problems or just
a) the errata & a possible thread having an IP leading back within (not
at the start of) the range to be replaced.
b) the errata & replacing single instruction with single instruction of
In a), there's almost an intractable problem of making sure no IP leads
back within the range to be replaced. In b) we still have to take care
of the errata part, but no worry about the stalled thread with invalid
> Thus you have to serialize, and if you are serializing it really doesn't
> matter if you write a byte, a paragraph or a page.
I was vaguely aware of the issue on x86. Do you know if this applies the
same on other achitectures?
Also, this is SMP-only, right? (Not that single UP matters for desktop
anymore, but just checking.)
Any pointers to the errata?
President / Opersys Inc.
Embedded Linux Training and Expertise
www.opersys.com / 1.866.677.4546