diff -u -N -r newlib-1.15.0/libgloss/README newlib/libgloss/README
--- newlib-1.15.0/libgloss/README	2002-07-23 23:56:26.000000000 +0200
+++ newlib/libgloss/README	2007-08-16 13:04:45.155338900 +0200
@@ -4,3 +4,4 @@
 m68k	- Motorola MVME135 and IDP board. For CPU32 systems.
 pa	- WinBond and Oki boards with a PA.
 mips	- R3000 support. Array Tech LSI33k based RAID disk controller.
+xilinx-powerpc - PowerPC 405 hard core in a Xilinx Virtex2-Pro of Virtex4 FPGA
diff -u -N -r newlib-1.15.0/libgloss/configure.in newlib/libgloss/configure.in
--- newlib-1.15.0/libgloss/configure.in	2006-12-18 22:48:18.000000000 +0100
+++ newlib/libgloss/configure.in	2007-08-17 13:17:44.628346000 +0200
@@ -67,6 +67,7 @@
 	;;
   powerpc-*-*|powerpcle-*-*)
 	AC_CONFIG_SUBDIRS(rs6000)
+	AC_CONFIG_SUBDIRS(xilinx-powerpc)
 	config_testsuite=true
 	;;
   mn10200-*-*)
diff -u -N -r newlib-1.15.0/libgloss/doc/porting.texi newlib/libgloss/doc/porting.texi
--- newlib-1.15.0/libgloss/doc/porting.texi	2006-04-18 18:14:57.000000000 +0200
+++ newlib/libgloss/doc/porting.texi	2007-08-17 07:44:42.328585100 +0200
@@ -143,6 +143,7 @@
 * CPU32::                       Various m68k based targets.
 * Mips::                        Mips code based targets.
 * PA-RISC::                     Precision Risc Organization..
+* Xilinx-PowerPC::              PowerPC 405 hard core in a Xilinx Virtex2-Pro of Virtex4 FPGA
 @end menu
 
 @node Sparclite, CPU32, , Supported targets
@@ -206,7 +207,7 @@
 and should easily port to other versions of the pmon monitor. Pmon is
 distributed in source by LSI.
 
-@node PA-RISC, , Mips, Supported targets
+@node PA-RISC, Xilinx-PowerPC, Mips, Supported targets
 @subsection PA-RISC Targets Supported
 This supports the various boards manufactured by the HP-PRO consortium.
 This is a group of companies all making variations on the PA-RISC
@@ -232,6 +233,12 @@
 has never been tested with the output of GNU SOM, as this manual is
 mostly for Unix based systems. 
 
+@node Xilinx-PowerPC, , PA-RISC, Supported targets
+@subsection Xilinx-PowerPC Targets Supported
+Supports the PowerPC 405 hard core in Xilinx Virtex2-Pro and Virtex4
+FPGAs generally, not limited to a specific board. Read and write
+functions are available for the Xilinx UARTLITE IP core.
+
 @node Building libgloss, Board support, Supported targets, Libgloss
 @subsection Configuring and building libgloss.
 
diff -u -N -r newlib-1.15.0/libgloss/xilinx-powerpc/Makefile.in newlib/libgloss/xilinx-powerpc/Makefile.in
--- newlib-1.15.0/libgloss/xilinx-powerpc/Makefile.in	1970-01-01 01:00:00.000000000 +0100
+++ newlib/libgloss/xilinx-powerpc/Makefile.in	2007-08-17 12:09:54.000000000 +0200
@@ -0,0 +1,148 @@
+# Copyright (C) 2007 Michael Geng (gcc@michaelgeng.de)
+#
+# The authors hereby grant permission to use, copy, modify, distribute,
+# and license this software and its documentation for any purpose, provided
+# that existing copyright notices are retained in all copies and that this
+# notice is included verbatim in any distributions. No written agreement,
+# license, or royalty fee is required for any of the authorized uses.
+# Modifications to this software may be copyrighted by their authors
+# and need not follow the licensing terms described here, provided that
+# the new terms are clearly indicated on the first page of each file where
+# they apply.
+#
+
+DESTDIR =
+VPATH = @srcdir@:@srcdir@/..
+srcdir = @srcdir@
+objdir = .
+srcroot = $(srcdir)/../..
+objroot = $(objdir)/../..
+
+prefix = @prefix@
+exec_prefix = @exec_prefix@
+
+host_alias = @host_alias@
+target_alias = @target_alias@
+
+bindir = @bindir@
+libdir = @libdir@
+tooldir = $(exec_prefix)/$(target_alias)
+
+# Multilib support variables.
+# TOP is used instead of MULTI{BUILD,SRC}TOP.
+MULTIDIRS =
+MULTISUBDIR =
+MULTIDO = true
+MULTICLEAN = true
+
+INSTALL = @INSTALL@
+INSTALL_PROGRAM = @INSTALL_PROGRAM@
+INSTALL_DATA = @INSTALL_DATA@
+
+SHELL =	/bin/sh
+
+CC = @CC@
+
+AS = @AS@
+AR = @AR@
+LD = @LD@
+RANLIB = @RANLIB@
+OBJDUMP = @OBJDUMP@
+OBJCOPY = @OBJCOPY@
+
+OBJS	  = _exit.o close.o errno.o fstat.o isatty.o lseek.o sbrk.o read.o write.o \
+            getpid.o kill.o unlink.o print.o putnum.o debug.o
+CFLAGS	  = -g -mcpu=405
+
+UARTLITE_SCRIPTS = uartlite.ld
+UARTLITE_CRT0    = xilinx-powerpc-crt0.o
+UARTLITE_BSP	 = libuartlite.a
+UARTLITE_OBJS	 = uartlite-inbyte.o uartlite-outbyte.o
+UARTLITE_TEST	 = uartlite-test
+UARTLITE_INSTALL = install-uartlite
+
+# Host specific makefile fragment comes in here.
+@host_makefile_frag@
+
+all:	${UARTLITE_CRT0} ${UARTLITE_BSP}
+
+${UARTLITE_BSP}: ${OBJS} ${UARTLITE_OBJS}
+	${AR} ${ARFLAGS} $@ ${OBJS} ${UARTLITE_OBJS}
+	${RANLIB} $@
+
+#
+# here's where we build the test programs for each target
+#
+.PHONY: test
+test:	${UARTLITE_TEST}
+
+uartlite-test: uartlite-test.x uartlite-test.dis uartlite-test.srec
+
+uartlite-test.x: test.o __init.o ${UARTLITE_CRT0} ${UARTLITE_BSP}
+	${CC} ${LDFLAGS_FOR_TARGET} ${UARTLITE_LDFLAGS} -L${objdir} \
+	test.o __init.o ${UARTLITE_CRT0} ${LIBS_FOR_TARGET} -lc ${UARTLITE_BSP} \
+	-T${srcdir}/uartlite.ld \
+	-o uartlite-test.x
+
+uartlite-test.dis: uartlite-test.x
+	${OBJDUMP} -d uartlite-test.x > uartlite-test.dis
+
+uartlite-test.srec: uartlite-test.x
+	${OBJCOPY} -O srec uartlite-test.x uartlite-test.srec
+
+#
+#
+#
+
+xilinx-powerpc-crt0.o: xilinx-powerpc-crt0.S
+
+uartlite-inbyte.o:  uartlite-inbyte.c  uartlite.h
+uartlite-outbyte.o: uartlite-outbyte.c uartlite.h
+
+sbrk.o:   sbrk.c
+errno.o:  errno.c
+_exit.o:  _exit.c
+__init.o: __init.c
+read.o:   ../read.c
+write.o:  ../write.c
+close.o:  ../close.c
+fstat.o:  ../fstat.c
+isatty.o: ../isatty.c
+lseek.o:  ../lseek.c
+getpid.o: ../getpid.c
+kill.o:   ../kill.c
+unlink.o: ../unlink.c
+print.o:  ../print.c
+putnum.o: ../putnum.c
+debug.o:  ../debug.c
+
+# Don't optimize when compiling the test program, makes confusion in
+# the debugger.
+
+test.o:	$(srcdir)/test.c
+	$(CC) -g $(CFLAGS_MRELOCATABLE) $(INCLUDES) -c $(CFLAGS) $<
+
+clean mostlyclean:
+	rm -f a.out core *.i *.o *-test *.srec *.dis *.x
+
+distclean maintainer-clean realclean: clean
+	rm -f Makefile config.status *~
+
+.PHONY: install info install-info clean-info
+install: ${UARTLITE_INSTALL}
+
+install-uartlite:
+	set -e; for x in ${UARTLITE_BSP}; do ${INSTALL_DATA} $$x $(DESTDIR)${tooldir}/lib${MULTISUBDIR}/$$x; done
+	set -e; for x in ${UARTLITE_SCRIPTS}; do ${INSTALL_DATA} $(srcdir)/$$x $(DESTDIR)${tooldir}/lib${MULTISUBDIR}/$$x; done
+	set -e; for x in ${UARTLITE_CRT0}; do ${INSTALL_DATA} $$x $(DESTDIR)${tooldir}/lib${MULTISUBDIR}/$$x; done
+
+doc:
+info:
+install-info:
+clean-info:
+
+Makefile: Makefile.in config.status @host_makefile_frag_path@
+	$(SHELL) config.status
+
+config.status: configure
+	$(SHELL) config.status --recheck
diff -u -N -r newlib-1.15.0/libgloss/xilinx-powerpc/README newlib/libgloss/xilinx-powerpc/README
--- newlib-1.15.0/libgloss/xilinx-powerpc/README	1970-01-01 01:00:00.000000000 +0100
+++ newlib/libgloss/xilinx-powerpc/README	2007-08-17 11:25:39.000000000 +0200
@@ -0,0 +1,20 @@
+Introduction
+============
+
+This is a port to the PowerPC 405 hard core in Xilinx Virtex2-Pro of Virtex4 FPGAs.
+
+Requirements on the FPGA design
+===============================
+
+You must have a UARTLITE IP core implemented in your FPGA design. Its base address 
+must match the _uartlite_start definition in the linker script.
+
+Low level read/write
+====================
+
+Low level read and write functions are available for the Xilinx UARTLITE IP core.
+They are as simple as possible, no complicated buffers, simply blocking read and 
+write functions. Baud rate, parity etc. are hard coded and configured in the FPGA 
+design, the software can't change it.
+
+Michael (gcc@michaelgeng.de)
diff -u -N -r newlib-1.15.0/libgloss/xilinx-powerpc/__init.c newlib/libgloss/xilinx-powerpc/__init.c
--- newlib-1.15.0/libgloss/xilinx-powerpc/__init.c	1970-01-01 01:00:00.000000000 +0100
+++ newlib/libgloss/xilinx-powerpc/__init.c	2007-08-16 14:22:36.000000000 +0200
@@ -0,0 +1,5 @@
+/* eabi.S calls __init() in order to do any C++ global constructors. No need to do anything
+   in a C program. Provide a dummy function in order to satisfy the linker. */
+void __init(void)
+{
+}
diff -u -N -r newlib-1.15.0/libgloss/xilinx-powerpc/_exit.c newlib/libgloss/xilinx-powerpc/_exit.c
--- newlib-1.15.0/libgloss/xilinx-powerpc/_exit.c	1970-01-01 01:00:00.000000000 +0100
+++ newlib/libgloss/xilinx-powerpc/_exit.c	2007-08-16 14:22:36.000000000 +0200
@@ -0,0 +1,26 @@
+/* 
+ * Copyright (C) 2007 Michael Geng (gcc@michaelgeng.de)
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ */
+
+#include <limits.h>
+
+void _exit(int rc)
+{
+  /* Default stub just causes a divide by 0 exception.  */
+  int x = rc / INT_MAX;
+  x = 4 / x;
+
+  /* Convince GCC that this function never returns.  */
+  for (;;)
+    ;
+}
diff -u -N -r newlib-1.15.0/libgloss/xilinx-powerpc/configure.ac newlib/libgloss/xilinx-powerpc/configure.ac
--- newlib-1.15.0/libgloss/xilinx-powerpc/configure.ac	1970-01-01 01:00:00.000000000 +0100
+++ newlib/libgloss/xilinx-powerpc/configure.ac	2007-08-17 11:09:10.000000000 +0200
@@ -0,0 +1,73 @@
+/* 
+ * Copyright (C) 2007 Michael Geng (gcc@michaelgeng.de)
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ */
+
+dnl Process this file with autoconf to produce a configure script.
+AC_PREREQ(2.61)
+AC_INIT(xilinx-powerpc-crt0.S)
+
+if test "${enable_shared}" = "yes" ; then
+	echo "Shared libraries not supported for cross compiling, ignored"
+fi
+
+if test "$srcdir" = "." ; then
+	if test "${with_target_subdir}" != "." ; then
+		libgloss_topdir="${srcdir}/${with_multisrctop}../../.."
+	else
+		libgloss_topdir="${srcdir}/${with_multisrctop}../.."
+	fi
+else
+	libgloss_topdir="${srcdir}/../.."
+fi
+AC_CONFIG_AUX_DIR($libgloss_topdir)
+
+AC_CANONICAL_SYSTEM
+AC_ARG_PROGRAM
+
+AC_PROG_INSTALL
+
+LIB_AC_PROG_CC
+
+AS=${AS-as}
+AC_SUBST(AS)
+AR=${AR-ar}
+AC_SUBST(AR)
+LD=${LD-ld}
+AC_SUBST(LD)
+AC_PROG_RANLIB
+OBJCOPY=${OBJCOPY-objcopy}
+AC_SUBST(OBJCOPY)
+OBJDUMP=${OBJDUMP-objdump}
+AC_SUBST(OBJDUMP)
+LIB_AM_PROG_AS
+
+host_makefile_frag=${srcdir}/../config/ppc.mh
+
+dnl We have to assign the same value to other variables because autoconf
+dnl doesn't provide a mechanism to substitute a replacement keyword with
+dnl arbitrary data or pathnames.
+dnl
+host_makefile_frag_path=$host_makefile_frag
+AC_SUBST(host_makefile_frag_path)
+AC_SUBST_FILE(host_makefile_frag)
+
+AC_CONFIG_FILES(Makefile,
+. ${libgloss_topdir}/config-ml.in,
+srcdir=${srcdir}
+target=${target}
+with_multisubdir=${with_multisubdir}
+ac_configure_args="${ac_configure_args} --enable-multilib"
+CONFIG_SHELL=${CONFIG_SHELL-/bin/sh}
+libgloss_topdir=${libgloss_topdir}
+)
+AC_OUTPUT
diff -u -N -r newlib-1.15.0/libgloss/xilinx-powerpc/errno.c newlib/libgloss/xilinx-powerpc/errno.c
--- newlib-1.15.0/libgloss/xilinx-powerpc/errno.c	1970-01-01 01:00:00.000000000 +0100
+++ newlib/libgloss/xilinx-powerpc/errno.c	2007-08-16 14:22:36.000000000 +0200
@@ -0,0 +1 @@
+int __errno;
diff -u -N -r newlib-1.15.0/libgloss/xilinx-powerpc/sbrk.c newlib/libgloss/xilinx-powerpc/sbrk.c
--- newlib-1.15.0/libgloss/xilinx-powerpc/sbrk.c	1970-01-01 01:00:00.000000000 +0100
+++ newlib/libgloss/xilinx-powerpc/sbrk.c	2007-08-16 14:22:36.000000000 +0200
@@ -0,0 +1,41 @@
+/* 
+ * Copyright (C) 2007 Michael Geng (gcc@michaelgeng.de)
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ */
+
+#include <errno.h>
+#include <sys/stat.h>
+
+void *sbrk (ptrdiff_t size)
+{
+  /*
+  * The following two memory locations should be defined in the linker script file
+  */
+  extern const char _heap_start; /* start of heap */
+  extern const char _heap_max;   /* end of heap (maximum value of heap_ptr) */
+
+  static const char * heap_ptr = &_heap_start;  /* pointer to head of heap */
+  const char * old_heap_ptr;
+
+  old_heap_ptr = heap_ptr;
+
+  if ((heap_ptr + size) > &_heap_max)
+  { 
+    /* top of heap is bigger than _heap_max */
+    errno = ENOMEM;
+    return (void *) -1;
+  }
+
+  /* success: update heap_ptr and return previous value */
+  heap_ptr += size;
+  return (void *)old_heap_ptr;
+}
diff -u -N -r newlib-1.15.0/libgloss/xilinx-powerpc/test.c newlib/libgloss/xilinx-powerpc/test.c
--- newlib-1.15.0/libgloss/xilinx-powerpc/test.c	1970-01-01 01:00:00.000000000 +0100
+++ newlib/libgloss/xilinx-powerpc/test.c	2007-08-16 14:22:36.000000000 +0200
@@ -0,0 +1,25 @@
+/* 
+ * Copyright (C) 2007 Michael Geng (gcc@michaelgeng.de)
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ */
+
+#include <stdio.h>
+
+main()
+{
+  char buf[100];
+
+  printf("Enter a string and press return: ");
+  scanf("%s", buf);
+  printf("\nYou entered %s\n", buf);
+  printf("Good bye!\n", buf);
+}
diff -u -N -r newlib-1.15.0/libgloss/xilinx-powerpc/uartlite-inbyte.c newlib/libgloss/xilinx-powerpc/uartlite-inbyte.c
--- newlib-1.15.0/libgloss/xilinx-powerpc/uartlite-inbyte.c	1970-01-01 01:00:00.000000000 +0100
+++ newlib/libgloss/xilinx-powerpc/uartlite-inbyte.c	2007-08-16 14:22:36.000000000 +0200
@@ -0,0 +1,31 @@
+/* 
+ * Copyright (C) 2007 Michael Geng (gcc@michaelgeng.de)
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ */
+
+#include "uartlite.h"
+
+/**
+reads one single character from the receive fifo of the Xilinx UARTLITE. Waits forever if
+it is empty.
+*
+* @return Received character converted to an int.
+*/
+int inbyte(void)
+{
+  /* Wait until valid data is available from the receive fifo.
+     This is a simple implementation it this makes this a blocking function. */
+  while ((*(volatile int *)(&_uartlite_start + STATUS_REG_OFFSET) & RX_FIFO_VALID_DATA) == 0);
+
+  /* Read one character from the receive fifo and pass it as a return value. */
+  return *(int *)(&_uartlite_start + RX_FIFO_OFFSET);
+}
diff -u -N -r newlib-1.15.0/libgloss/xilinx-powerpc/uartlite-outbyte.c newlib/libgloss/xilinx-powerpc/uartlite-outbyte.c
--- newlib-1.15.0/libgloss/xilinx-powerpc/uartlite-outbyte.c	1970-01-01 01:00:00.000000000 +0100
+++ newlib/libgloss/xilinx-powerpc/uartlite-outbyte.c	2007-08-16 14:22:36.000000000 +0200
@@ -0,0 +1,33 @@
+/* 
+ * Copyright (C) 2007 Michael Geng (gcc@michaelgeng.de)
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ */
+
+#include "uartlite.h"
+
+/**
+Writes one single character to the transmit fifo of the Xilinx UARTLITE. 
+*
+* @return Always 0 
+*/
+int outbyte(char c)
+{
+  /* Wait until transmit fifo is not full.
+     This is a simple implementation because it avoids the requirement to implement a software
+     buffer but this makes it a blocking function. */
+  while (*(volatile int *)(&_uartlite_start + STATUS_REG_OFFSET) & TX_FIFO_FULL);
+
+  /* Write character to TX fifo */
+  *(char *)(&_uartlite_start + TX_FIFO_OFFSET) = c;
+
+  return(0);
+}
diff -u -N -r newlib-1.15.0/libgloss/xilinx-powerpc/uartlite.h newlib/libgloss/xilinx-powerpc/uartlite.h
--- newlib-1.15.0/libgloss/xilinx-powerpc/uartlite.h	1970-01-01 01:00:00.000000000 +0100
+++ newlib/libgloss/xilinx-powerpc/uartlite.h	2007-08-16 14:22:36.000000000 +0200
@@ -0,0 +1,24 @@
+/* 
+ * Copyright (C) 2007 Michael Geng (gcc@michaelgeng.de)
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ */
+
+/* register offsets */
+#define RX_FIFO_OFFSET      0
+#define TX_FIFO_OFFSET      4
+#define STATUS_REG_OFFSET   8
+#define CONTROL_REG_OFFSET 12
+
+/* status register bit positions */
+#define TX_FIFO_FULL       0x08
+#define RX_FIFO_VALID_DATA 0x01
+extern const char _uartlite_start;  /* UARTLITE start address, define it in your linker script */
diff -u -N -r newlib-1.15.0/libgloss/xilinx-powerpc/uartlite.ld newlib/libgloss/xilinx-powerpc/uartlite.ld
--- newlib-1.15.0/libgloss/xilinx-powerpc/uartlite.ld	1970-01-01 01:00:00.000000000 +0100
+++ newlib/libgloss/xilinx-powerpc/uartlite.ld	2007-08-17 09:36:49.000000000 +0200
@@ -0,0 +1,128 @@
+/* 
+ * Copyright (C) 2007 Michael Geng (gcc@michaelgeng.de)
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ *
+ * Example linker script for a PowerPC 405 in a Xilinx Virtex2-Pro or Virtex4 FPGA design
+ * with a Xilinx UARTLITE
+ */
+
+STACK_SIZE = 4k;
+HEAP_SIZE = 256k;
+
+MEMORY
+{
+   /* FPGA external asynchronous static RAM */
+   sram  : ORIGIN = 0x00000000, LENGTH = 256k
+
+   /* FPGA internal block RAM */
+   bram  : ORIGIN = 0xfffa0000, LENGTH = 256k + 128k - 4
+   boot  : ORIGIN = 0xfffffffc, LENGTH = 4
+
+   /* UART (serial port hardware) */
+   uartlite : ORIGIN = 0xA0000000, LENGTH = 16
+
+   /* debug symbols */
+   debug : ORIGIN = 0x10000000, LENGTH = 1M
+}
+
+SECTIONS
+{
+   .text  : { *(.text)  } > bram
+
+   .sdata : 
+   {
+      PROVIDE (_SDA_BASE_ = 32768);
+      *(.data*)
+   } > bram
+
+   .sbss :
+   {
+      PROVIDE (__sbss_start = .);
+      *(.sbss)
+      PROVIDE (__sbss_end = .);
+   } > bram
+   _end = . ;
+   PROVIDE (__SBSS_END__ = .);
+
+   .sbss2 :
+   {
+      PROVIDE (__sbss2_start = .);
+      *(.sbss)
+      PROVIDE (__sbss2_end = .);
+   } > bram
+   PROVIDE (__SBSS2_END__ = .);
+
+   .bss  : 
+   { 
+      PROVIDE (__bss_start = .);
+      *(.bss) 
+      PROVIDE (__bss_end = .);
+
+      . = . + STACK_SIZE;
+      PROVIDE(__stack = .);
+   } > bram
+
+   PROVIDE (__SDATA_START__ = .);
+   .sdata : { 
+      *(.sdata) 
+   } > bram
+
+   PROVIDE (__SDATA2_START__ = .);
+   .sdata2 : { 
+      PROVIDE (_SDA2_BASE_ = 32768);
+      *(.sdata2) 
+   } > bram
+
+   PROVIDE (__GOT_START__ = .);
+   .got : { *(.got) } > bram
+   PROVIDE (__GOT_END__ = .);
+
+   PROVIDE (__GOT2_START__ = .);
+   .got2 : { *(.got2) } > bram
+   PROVIDE (__GOT2_END__ = .);
+
+   PROVIDE (__FIXUP_START__ = .);
+   .fixup : { *(.fixup) } > bram
+   PROVIDE (__FIXUP_END__ = .);
+
+   PROVIDE (__CTOR_LIST__ = .);
+   .ctors : { *(.ctors) } > bram
+   PROVIDE (__CTOR_END__ = .);
+
+   PROVIDE (__DTOR_LIST__ = .);
+   .dtors : { *(.dtors) } > bram
+   PROVIDE (__DTOR_END__ = .);
+
+   PROVIDE (__EXCEPT_START__ = .);
+   .gcc_except_table : { *(.gcc_except_table) } > bram
+   PROVIDE (__EXCEPT_END__ = .);
+
+   .eh_frame : { *(.eh_frame) } > bram
+   .rela     : { *(.rela*)    } > bram
+   .rodata   : { *(.rodata*)  } > bram
+
+   .boot     : { *(.boot)     } > boot
+
+   sram :
+   { 
+      PROVIDE(_heap_start = .);
+      . = . + HEAP_SIZE - 1;
+      PROVIDE(_heap_max = .);
+   } > sram
+
+   uartlite : 
+   { 
+      PROVIDE(_uartlite_start = .);
+   } > uartlite
+
+   .debug : { *(.stabstr) *(.comment) *(.stab) } > debug
+}
diff -u -N -r newlib-1.15.0/libgloss/xilinx-powerpc/xilinx-powerpc-crt0.S newlib/libgloss/xilinx-powerpc/xilinx-powerpc-crt0.S
--- newlib-1.15.0/libgloss/xilinx-powerpc/xilinx-powerpc-crt0.S	1970-01-01 01:00:00.000000000 +0100
+++ newlib/libgloss/xilinx-powerpc/xilinx-powerpc-crt0.S	2007-08-17 10:52:31.000000000 +0200
@@ -0,0 +1,127 @@
+/* 
+ * Copyright (C) 2007 Michael Geng (gcc@michaelgeng.de)
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ *
+ * startup file for a PowerPC 405 hard core in a Xilinx Virtex2-Pro or Virtex4 FPGA
+ */
+
+#include "ppc-asm.h"
+
+	.section ".got2","aw"
+
+.LCTOC1 = .+32768
+
+	.extern	FUNC_NAME(atexit)
+	.globl	FUNC_NAME(__atexit)
+	.section ".sdata","aw"
+FUNC_NAME(__atexit):			/* tell C's eabi-ctor's we have an atexit function */
+	.long	FUNC_NAME(atexit)@fixup	/* and that it is to register __do_global_dtors */
+
+	.section ".fixup","aw"
+	.long	FUNC_NAME(__atexit)
+
+	.section ".got2","aw"
+.Ltable = .-.LCTOC1
+	.long	.LCTOC1			/* address we think .LCTOC1 is loaded at */
+
+.Lsbss_start = .-.LCTOC1
+	.long	__sbss_start
+
+.Lsbss_end = .-.LCTOC1
+	.long	__sbss_end
+
+.Lbss_start = .-.LCTOC1
+	.long	__bss_start
+
+.Lend = .-.LCTOC1
+	.long	_end
+
+.Lstack = .-.LCTOC1			/* stack address if set by user */
+	.long	__stack
+
+	.text
+.Lptr:
+	.long .LCTOC1-.Laddr
+
+_start:
+	bl	.Laddr			/* get current address */
+.Laddr:
+	mflr	r4			/* real address of .Laddr */
+	lwz	r5,(.Lptr-.Laddr)(r4)	/* linker generated address of .LCTOC1 */
+	add	r5,r5,r4		/* correct to real pointer */
+	lwz	r4,.Ltable(r5)		/* get linker's idea of where .Laddr is */
+	subf	r4,r4,r5		/* calculate difference between where linked and current */
+
+	/* clear bss and sbss */
+	lwz	r6,.Lbss_start(r5)	/* calculate beginning of the BSS */
+	lwz	r7,.Lend(r5)		/* calculate end of the BSS */
+	add	r6,r6,r4		/* adjust pointers */
+	add	r7,r7,r4
+
+	cmplw	1,r6,r7
+	bc	4,4,.Ldone1
+
+	subf	r8,r6,r7		/* number of bytes to zero */
+	srwi	r9,r8,2			/* number of words to zero */
+	mtctr	r9
+	li	r0,0			/* zero to clear memory */
+	addi	r6,r6,-4		/* adjust so we can use stwu */
+.Lloop:
+	stwu	r0,4(r6)		/* zero bss */
+	bdnz	.Lloop
+
+.Ldone1:
+
+	lwz	r6,.Lsbss_start(r5)	/* calculate beginning of the SBSS */
+	lwz	r7,.Lsbss_end(r5)	/* calculate end of the SBSS */
+	add	r6,r6,r4		/* adjust pointers */
+	add	r7,r7,r4
+
+	cmplw	1,r6,r7
+	bc	4,4,.Ldone
+
+	subf	r8,r6,r7		/* number of bytes to zero */
+	srwi	r9,r8,2			/* number of words to zero */
+	mtctr	r9
+	li	r0,0			/* zero to clear memory */
+	addi	r6,r6,-4		/* adjust so we can use stwu */
+.Lloop2:
+	stwu	r0,4(r6)		/* zero bss */
+	bdnz	.Lloop2
+
+.Ldone:
+
+	lwz	r0,.Lstack(r5)		/* stack address or 0 */
+	cmplwi	1,r0,0			/* equal to 0? */
+	bc	12,6,.Lnostack		/* use default stack if == 0 */
+	mr	sp,r0			/* use user defined stack */
+
+.Lnostack:
+	/* set up initial stack frame */
+	addi	sp,sp,-4		/* make sure we don't overwrite debug mem */
+	lis	r0,0
+	stw	r0,0(sp)		/* clear back chain */
+	stwu	sp,-64(sp)		/* push another stack frame */
+
+	/* Let her rip */
+	bl	FUNC_NAME(main)
+
+	/* return value from main is argument to exit */
+	bl	FUNC_NAME(exit)
+	trap
+.Lstart:
+	.size	_start,.Lstart-_start
+
+.section .boot,"ax"
+_boot:
+	/* this is the very first instruction after power up */
+	b _start