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Re: [PATCH] MIPS libgloss: Fix PR_IMP mask for vr5xxx CPUs
- From: Thiemo Seufer <ths at networkno dot de>
- To: newlib at sourceware dot org
- Date: Wed, 21 Mar 2007 16:47:32 +0000
- Subject: Re: [PATCH] MIPS libgloss: Fix PR_IMP mask for vr5xxx CPUs
- References: <20070221132911.GA32386@networkno.de>
Thiemo Seufer wrote:
> Hello All,
>
> the appended patch fixes the PR_IMP mask value.
>
>
> Thiemo
>
>
> 2007-02-21 Thiemo Seufer <ths@mips.com>
> Maciej W. Rozycki <macro@mips.com>
>
> * mips/vr5xxx.S (__cpu_flush): Use the right mask for the
> processor ID.
>
>
> Index: mips/vr5xxx.S
> ===================================================================
> RCS file: /cvs/src/src/libgloss/mips/vr5xxx.S,v
> retrieving revision 1.2
> diff -u -p -r1.2 vr5xxx.S
> --- mips/vr5xxx.S 3 Apr 2004 01:02:51 -0000 1.2
> +++ mips/vr5xxx.S 21 Feb 2007 13:06:48 -0000
> @@ -133,7 +133,7 @@ __cpu_flush:
> nop # dlindsay: unclear why the nops, but
> nop # vr4300.S had such so I do too.
> srl a2, a0, PR_IMP # want bits 8..15
> - andi a2, a2, 0x255 # mask: now a2 = Implementation # field
> + andi a2, a2, 0xff # mask: now a2 = Implementation # field
> li a1, IMPL_VR5432
> beq a1, a2, 8f # use Vr5432-specific flush algorithm
> nop
Ping?
Thiemo