Index: newlib/newlib/configure.host diff -c newlib/newlib/configure.host:1.1.1.2 newlib/newlib/configure.host:1.1.1.1.2.3 *** newlib/newlib/configure.host:1.1.1.2 Fri Sep 17 15:40:16 2004 --- newlib/newlib/configure.host Mon Sep 27 13:47:53 2004 *************** *** 93,98 **** --- 93,101 ---- avr*) newlib_cflags="${newlib_cflags} -DPREFER_SIZE_OVER_SPEED -mcall-prologues" ;; + crx*) + machine_dir=crx + ;; d10v*) machine_dir=d10v ;; *************** *** 307,312 **** --- 310,318 ---- sys_dir=arm fi ;; + crx*) + sys_dir=crx + ;; d10v*) sys_dir=d10v ;; *************** *** 495,500 **** --- 501,510 ---- ;; avr*) newlib_cflags="${newlib_cflags} -DNO_EXEC -DSMALL_MEMORY -DMISSING_SYSCALL_NAMES" + ;; + crx-*-*) + newlib_cflags="${newlib_cflags} -DHAVE_RENAME -DMISSING_SYSCALL_NAMES" + syscall_dir= ;; d10v*) newlib_cflags="${newlib_cflags} -DSMALL_MEMORY" Index: newlib/newlib/libc/include/machine/ieeefp.h diff -c newlib/newlib/libc/include/machine/ieeefp.h:1.1.1.2 newlib/newlib/libc/include/machine/ieeefp.h:1.1.1.1.2.2 *** newlib/newlib/libc/include/machine/ieeefp.h:1.1.1.2 Fri Sep 17 15:40:31 2004 --- newlib/newlib/libc/include/machine/ieeefp.h Fri Sep 17 15:57:43 2004 *************** *** 214,219 **** --- 214,223 ---- #endif #endif + #ifdef __CRX__ + #define __IEEE_LITTLE_ENDIAN + #endif + #ifdef __fr30__ #define __IEEE_BIG_ENDIAN #endif Index: newlib/newlib/libc/include/machine/setjmp.h diff -c newlib/newlib/libc/include/machine/setjmp.h:1.1.1.2 newlib/newlib/libc/include/machine/setjmp.h:1.1.1.1.2.2 *** newlib/newlib/libc/include/machine/setjmp.h:1.1.1.2 Fri Sep 17 15:40:31 2004 --- newlib/newlib/libc/include/machine/setjmp.h Fri Sep 17 15:57:43 2004 *************** *** 174,179 **** --- 174,183 ---- #define _JBTYPE double #endif + #ifdef __CRX__ + #define _JBLEN 9 + #endif + #ifdef __fr30__ #define _JBLEN 10 #endif Index: newlib/newlib/libc/machine/crx/Makefile.am diff -c /dev/null newlib/newlib/libc/machine/crx/Makefile.am:1.1.2.2 *** /dev/null Fri Oct 1 15:00:14 2004 --- newlib/newlib/libc/machine/crx/Makefile.am Mon Sep 27 15:53:31 2004 *************** *** 0 **** --- 1,12 ---- + ## Process this file with automake to generate Makefile.in + + AUTOMAKE_OPTIONS = cygnus + + INCLUDES = $(NEWLIB_CFLAGS) $(CROSS_CFLAGS) $(TARGET_CFLAGS) + + noinst_LIBRARIES = lib.a + + lib_a_SOURCES = setjmp.S + + ACLOCAL_AMFLAGS = -I ../../.. + CONFIG_STATUS_DEPENDENCIES = $(newlib_basedir)/configure.host Index: newlib/newlib/libc/machine/crx/configure.in diff -c /dev/null newlib/newlib/libc/machine/crx/configure.in:1.1.2.1 *** /dev/null Fri Oct 1 15:00:14 2004 --- newlib/newlib/libc/machine/crx/configure.in Wed Sep 1 15:52:31 2004 *************** *** 0 **** --- 1,12 ---- + dnl This is the newlib/libc/machine/arm configure.in file. + dnl Process this file with autoconf to produce a configure script. + + AC_PREREQ(2.5) + AC_INIT(Makefile.am) + + dnl Can't be done in NEWLIB_CONFIGURE because that confuses automake. + AC_CONFIG_AUX_DIR(../../../..) + + NEWLIB_CONFIGURE(../../..) + + AC_OUTPUT(Makefile) Index: newlib/newlib/libc/machine/crx/setjmp.S diff -c /dev/null newlib/newlib/libc/machine/crx/setjmp.S:1.1.2.3 *** /dev/null Fri Oct 1 15:00:14 2004 --- newlib/newlib/libc/machine/crx/setjmp.S Fri Oct 1 13:59:54 2004 *************** *** 0 **** --- 1,51 ---- + ############################################################################## + # setjmp.S -- CRX setjmp routine # + # # + # Copyright (c) 2004 National Semiconductor Corporation # + # # + # The authors hereby grant permission to use, copy, modify, distribute, # + # and license this software and its documentation for any purpose, provided # + # that existing copyright notices are retained in all copies and that this # + # notice is included verbatim in any distributions. No written agreement, # + # license, or royalty fee is required for any of the authorized uses. # + # Modifications to this software may be copyrighted by their authors # + # and need not follow the licensing terms described here, provided that # + # the new terms are clearly indicated on the first page of each file where # + # they apply. # + # # + # C library -- setjmp, longjmp # + # longjmp(a,v) # + # will generate a "return(v)" # + # from the last call to # + # setjmp(a) # + # by restoring r7-ra, sp, # + # and pc from 'a' # + # and doing a return. (Makes sure that longjmp never returns 0). # + ############################################################################## + + .text + .file "setjmp.s" + .align 4 + + .globl _setjmp + .align 4 + _setjmp: + #r2: .blkw + storm r2,{r7,r8,r9,r10,r11,r12,r13,r14} + stord sp,0(r2) + movd $0,r0 + jump ra + + .globl _longjmp + _longjmp: + #r2: .blkw # pointer save area + #r3: .blkw # ret vlaue + loadm r2, {r7,r8,r9,r10,r11,r12,r13,ra} + loadd 0(r2), sp + movd r3, r0 + cmpd $0, r3 + bne end1 + movd $1, r0 + end1: + jump ra + .align 4 Index: newlib/newlib/libc/sys/crx/Makefile.am diff -c /dev/null newlib/newlib/libc/sys/crx/Makefile.am:1.1.2.4 *** /dev/null Fri Oct 1 15:00:15 2004 --- newlib/newlib/libc/sys/crx/Makefile.am Mon Sep 27 14:03:13 2004 *************** *** 0 **** --- 1,14 ---- + ## Process this file with automake to generate Makefile.in + + AUTOMAKE_OPTIONS = cygnus + + INCLUDES = $(NEWLIB_CFLAGS) $(CROSS_CFLAGS) $(TARGET_CFLAGS) + + noinst_LIBRARIES = lib.a + + lib_a_SOURCES = getenv.c + + all: crt0.o + + ACLOCAL_AMFLAGS = -I ../../.. + CONFIG_STATUS_DEPENDENCIES = $(newlib_basedir)/configure.host Index: newlib/newlib/libc/sys/crx/configure.in diff -c /dev/null newlib/newlib/libc/sys/crx/configure.in:1.1.2.2 *** /dev/null Fri Oct 1 15:00:15 2004 --- newlib/newlib/libc/sys/crx/configure.in Mon Sep 27 14:02:19 2004 *************** *** 0 **** --- 1,12 ---- + dnl This is the newlib/libc/sys/arc configure.in file. + dnl Process this file with autoconf to produce a configure script. + + AC_PREREQ(2.5) + AC_INIT(getenv.c) + + dnl Can't be done in NEWLIB_CONFIGURE because that confuses automake. + AC_CONFIG_AUX_DIR(../../../..) + + NEWLIB_CONFIGURE(../../..) + + AC_OUTPUT(Makefile) Index: newlib/newlib/libc/sys/crx/crt0.S diff -c /dev/null newlib/newlib/libc/sys/crx/crt0.S:1.1.2.3 *** /dev/null Fri Oct 1 15:00:15 2004 --- newlib/newlib/libc/sys/crx/crt0.S Fri Oct 1 14:01:17 2004 *************** *** 0 **** --- 1,93 ---- + ############################################################################## + # crt0.S -- CRX default start-up routine # + # # + # Copyright (c) 2004 National Semiconductor Corporation # + # # + # The authors hereby grant permission to use, copy, modify, distribute, # + # and license this software and its documentation for any purpose, provided # + # that existing copyright notices are retained in all copies and that this # + # notice is included verbatim in any distributions. No written agreement, # + # license, or royalty fee is required for any of the authorized uses. # + # Modifications to this software may be copyrighted by their authors # + # and need not follow the licensing terms described here, provided that # + # the new terms are clearly indicated on the first page of each file where # + # they apply. # + # # + # This is the start routine of your CRX program. # + # It is linked with your application automatically. You can use # + # this routine as a template and modify it to your needs, yet this # + # file must be supplied for the compiler. # + # It is assumed that the following symbols are defined in your linker # + # script: __STACK_START, __ISTACK_START, __DATA_START, __DATA_END, # + # __DATA_IMAGE_START, __BSS_START, __BSS_END. # + ############################################################################## + + .text + .align 4 + .globl _main + .globl _start + .globl _atexit + .globl _exit + .globl __dispatch_table + + _start: + + #----------------------------------------------------------------------------# + # Initialize the stack pointers. The constants __STACK_START and # + # __ISTACK_START should be defined in the linker script. # + + movd $__STACK_START, sp + movd $__ISTACK_START, r0 + mtpr r0, isp + + #----------------------------------------------------------------------------# + # Initialize the default sections according to the linker script. # + + movd $__DATA_END, r4 + subd $__DATA_START, r4 + movd $__DATA_START, r2 + movd $__DATA_IMAGE_START, r3 + bal ra, _memcpy + movd $__BSS_END, r4 + subd $__BSS_START, r4 + movd $__BSS_START, r2 + movd $0, r3 + bal ra, _memset + + #----------------------------------------------------------------------------# + # Initialize the intbase (pointer to the dispatch table). # + + movd $__dispatch_table, r0 + mtpr r0, intbase + + #----------------------------------------------------------------------------# + # Handle global and static constructurs execution and setup # + # destructors to be called from exit. # + bal ra, _init + movd $_fini, r2 + bal ra, _atexit + + #----------------------------------------------------------------------------# + # Here you may add initializations that are specific to your # + # environment. For example: # + # 1. Configure wait states and other BIU parameters in order to get # + # the best performance out of your target (see the specification # + # document). # + # 2. Enable maskable interrupts that should be enabled when your # + # program starts to execute. # + + + #----------------------------------------------------------------------------# + # Jump to the main function in your application. # + + bal ra, _main + + #----------------------------------------------------------------------------# + # Upon returning from the main function (if it isn't an infinite loop), # + # jump to the exit function. The exit function is located in the # + # library 'libc.a'. # + + movd r0, r2 # _main return value is passed as a + # parameter to exit. + br _exit # returns control to the debugger. + Index: newlib/newlib/libc/sys/crx/getenv.c diff -c /dev/null newlib/newlib/libc/sys/crx/getenv.c:1.1.2.4 *** /dev/null Fri Oct 1 15:00:15 2004 --- newlib/newlib/libc/sys/crx/getenv.c Fri Oct 1 14:01:18 2004 *************** *** 0 **** --- 1,24 ---- + /* getenv.c -- Implementation of the getenv() routine + * + * Copyright (c) 2004 National Semiconductor Corporation + * + * The authors hereby grant permission to use, copy, modify, distribute, + * and license this software and its documentation for any purpose, provided + * that existing copyright notices are retained in all copies and that this + * notice is included verbatim in any distributions. No written agreement, + * license, or royalty fee is required for any of the authorized uses. + * Modifications to this software may be copyrighted by their authors + * and need not follow the licensing terms described here, provided that + * the new terms are clearly indicated on the first page of each file where + * they apply. + */ + + /* getenv() is implemented as a low-level function, + thus we only invoke here the system call. */ + char * getenv (const char *name) + { + char *_getenv(const char *); + + return (_getenv (name)); + } + Index: newlib/newlib/libc/sys/crx/sys/asm.h diff -c /dev/null newlib/newlib/libc/sys/crx/sys/asm.h:1.1.2.2 *** /dev/null Fri Oct 1 15:00:15 2004 --- newlib/newlib/libc/sys/crx/sys/asm.h Fri Oct 1 14:00:49 2004 *************** *** 0 **** --- 1,421 ---- + /* asm.h -- CRX architecture intrinsic functions + * + * Copyright (c) 2004 National Semiconductor Corporation + * + * The authors hereby grant permission to use, copy, modify, distribute, + * and license this software and its documentation for any purpose, provided + * that existing copyright notices are retained in all copies and that this + * notice is included verbatim in any distributions. No written agreement, + * license, or royalty fee is required for any of the authorized uses. + * Modifications to this software may be copyrighted by their authors + * and need not follow the licensing terms described here, provided that + * the new terms are clearly indicated on the first page of each file where + * they apply. + */ + + #ifndef _ASM + #define _ASM + + /* Note that immediate input values are not checked for validity. It is + the user's responsibility to use the intrinsic functions with appropriate + immediate values. */ + + /* Absolute Instructions */ + #define _absb_(src, dest) __asm__("absb %1, %0" : "=r" (dest) : \ + "r" ((char)src) , "0" (dest)) + #define _absw_(src, dest) __asm__("absw %1,%0" : "=r" (dest) : \ + "r" ((short)src) , "0" (dest)) + #define _absd_(src, dest) __asm__("absd %1, %0" : "=r" (dest) : \ + "r" ((int)src) , "0" (dest)) + + /* Addition Instructions */ + #define _addb_(src, dest) __asm__("addb %1, %0" : "=r" (dest) : \ + "ri" ((unsigned char)src), "0" (dest) : "cc") + #define _addub_(src, dest) __asm__("addub %1, %0" : "=r" (dest) : \ + "ri" ((unsigned char)src), "0" (dest) : "cc") + #define _addw_(src, dest) __asm__("addw %1, %0" : "=r" (dest) : \ + "ri" ((unsigned short)src), "0" (dest) : "cc") + #define _adduw_(src, dest) __asm__("adduw %1, %0" : "=r" (dest) : \ + "ri" ((unsigned short)src), "0" (dest) : "cc") + #define _addd_(src, dest) __asm__("addd %1, %0" : "=r" (dest) : \ + "ri" ((unsigned int)src), "0" (dest) : "cc") + #define _addud_(src, dest) __asm__("addud %1, %0" : "=r" (dest) : \ + "ri" ((unsigned int)src), "0" (dest) : "cc") + /* Add with Carry */ + #define _addcb_(src, dest) __asm__("addcb %1, %0" : "=r" (dest) : \ + "ri" ((unsigned char)src), "0" (dest) : "cc") + #define _addcw_(src, dest) __asm__("addcw %1, %0" : "=r" (dest) : \ + "ri" ((unsigned short)src), "0" (dest) : "cc") + #define _addcd_(src, dest) __asm__("addcd %1, %0" : "=r" (dest) : \ + "ri" ((unsigned int)src), "0" (dest) : "cc") + /* Q-format Add */ + #define _addqb_(src, dest) __asm__("addqb %1, %0" : "=r" (dest) : \ + "r" ((unsigned char)src), "0" (dest) : "cc") + #define _addqw_(src, dest) __asm__("addqw %1, %0" : "=r" (dest) : \ + "r" ((unsigned short)src), "0" (dest) : "cc") + #define _addqd_(src, dest) __asm__("addqd %1, %0" : "=r" (dest) : \ + "r" ((unsigned int)src), "0" (dest) : "cc") + + /* Bitwise Logical AND */ + + #define _andb_(src, dest) __asm__("andb %1,%0" : "=r" (dest) : \ + "ri" ((unsigned char)src) , "0" (dest)) + #define _andw_(src, dest) __asm__("andw %1,%0" : "=r" (dest) : \ + "ri" ((unsigned short)src) , "0" (dest)) + #define _andd_(src, dest) __asm__("andd %1,%0" : "=r" (dest) : \ + "ri" ((unsigned int)src) , "0" (dest)) + + /* bswap Instruction */ + #define _bswap_(src, dest) __asm__("bswap %1,%0" : "=r" (dest) : \ + "r" ((unsigned int)src) , "0" (dest)) + /* cbit (clear bit) Instructions */ + #define _cbitb_(pos, dest) __asm__("cbitb %1,%0" : "=mr" (dest) : \ + "i" ((unsigned char)pos) , "0" (dest) : "cc") + #define _cbitw_(pos, dest) __asm__("cbitw %1,%0" : "=mr" (dest) : \ + "i" ((unsigned char)pos) , "0" (dest) : "cc") + #define _cbitd_(pos, dest) __asm__("cbitd %1,%0" : "=r" (dest) : \ + "i" ((unsigned char)pos) , "0" (dest) : "cc") + + /* Compare Instructions */ + #define _cmpb_(src1, src2) __asm__("cmpb %0,%1" : /* no output */ : \ + "ri" ((unsigned char)src1) , "r" (src2) : "cc") + #define _cmpw_(src1,src2) __asm__("cmpw %0,%1" : /* no output */ \ + : "ri" ((unsigned short)src1) , "r" (src2) : "cc") + #define _cmpd_(src1,src2) __asm__("cmpd %0,%1" : /* no output */ \ + : "ri" ((unsigned int)src1) , "r" (src2) : "cc") + + /* cntl Count Leading Ones Instructions */ + #define _cntl1b_(src, dest) __asm__("cntl1b %1,%0" : "=r" (dest) : \ + "r" ((char)src) , "0" (dest)) + #define _cntl1w_(src, dest) __asm__("cntl1w %1,%0" : "=r" (dest) : \ + "r" ((short)src) , "0" (dest)) + #define _cntl1d_(src, dest) __asm__("cntl1d %1,%0" : "=r" (dest) : \ + "r" ((int)src) , "0" (dest)) + + /* cntl Count Leading Zeros Instructions */ + #define _cntl0b_(src, dest) __asm__("cntl0b %1,%0" : "=r" (dest) : \ + "r" ((char)src) , "0" (dest)) + #define _cntl0w_(src, dest) __asm__("cntl0w %1,%0" : "=r" (dest) : \ + "r" ((short)src) , "0" (dest)) + #define _cntl0d_(src, dest) __asm__("cntl0d %1,%0" : "=r" (dest) : \ + "r" ((int)src) , "0" (dest)) + + /* cntl Count Leading Signs Instructions */ + #define _cntlsb_(src, dest) __asm__("cntlsb %1,%0" : "=r" (dest) : \ + "r" ((char)src) , "0" (dest)) + #define _cntlsw_(src, dest) __asm__("cntlsw %1,%0" : "=r" (dest) : \ + "r" ((short)src) , "0" (dest)) + #define _cntlsd_(src, dest) __asm__("cntlsd %1,%0" : "=r" (dest) : \ + "r" ((int)src) , "0" (dest)) + + /* Disable Inerrupts instructions */ + #define _di_() __asm__ volatile ("di\n" : : : "cc") + #define _disable_() __asm__ volatile ("di\n" : : : "cc") + + /* Enable Inerrupts instructions */ + #define _ei_() __asm__ volatile ("ei\n" : : : "cc") + #define _enable_() __asm__ volatile ("ei\n" : : : "cc") + + /* Enable Inerrupts instructions and Wait */ + #define _eiwait_() __asm__ volatile ("eiwait" : : : "cc") + + /* excp Instructions */ + #define _excp_(vector) __asm__ volatile ("excp " # vector) + + /* getpid Instruction */ + #define _getrfid_(dest) __asm__("getrfid %0" : "=r" (dest) : \ + /* No input */ : "cc") + + /* Load Instructions */ + #define _loadb_(base,dest) __asm__("loadb %1,%0" : "=r" (dest) : \ + "m" (base) , "0" (dest)) + #define _loadw_(base,dest) __asm__("loadw %1,%0" : "=r" (dest) : \ + "m" (base) , "0" (dest)) + #define _loadd_(base,dest) __asm__("loadd %1,%0" : "=r" (dest) : \ + "m" (base) , "0" (dest)) + + /* Load Multiple Instructions */ + #define _loadm_(src, mask) __asm__("loadm %0,%1" : /* No output */ : \ + "r" ((unsigned int)src) , "i" (mask)) + #define _loadmp_(src, mask) __asm__("loadmp %0,%1" : /* No output */ : \ + "r" ((unsigned int)src) , "i" (mask)) + + /* Multiply Accumulate Instrutions */ + #define _macsb_(hi, lo, src1, src2) __asm__("macsb %1,%0" \ + : =l (lo), =h (hi) \ + : "r" ((char)src1) , "r" (src2)) + #define _macsw_(hi, lo, src1, src2) __asm__("macsw %1,%0" \ + : =l (lo), =h (hi) \ + : "r" ((short)src1) , "r" (src2)) + #define _macsd_(hi, lo, src1, src2) __asm__("macsd %1,%0" \ + : =l (lo), =h (hi) \ + : "r" ((int)src1) , "r" (src2)) + #define _macub_(hi, lo, src1, src2) __asm__("macub %1,%0" \ + : =l (lo), =h (hi) \ + :"r" ((unsigned char)src1) , "r" (src2)) + #define _macuw_(hi, lo, src1, src2) __asm__("macuw %1,%0" \ + : =l (lo), =h (hi) \ + : "r" ((unsigned short)src1) , "r" (src2)) + #define _macud_(hi, lo, src1, src2) __asm__("macud %1,%0" \ + : =l (lo), =h (hi) \ + : "r" ((unsigned int)src1) , "r" (src2)) + + /* Q-Format Multiply Accumulate Instrutions */ + #define _macqb_(src1, src2) __asm__("macqb %1,%0" \ + : =l (lo), =h (hi) \ + :"r" ((char)src1) , "r" (src2)) + #define _macqw_(src1, src2) __asm__("macqw %1,%0" \ + : =l (lo), =h (hi) \ + :"r" ((short)src1) , "r" (src2)) + #define _macqd_(src1, src2) __asm__("macqd %1,%0" \ + : =l (lo), =h (hi) \ + :"r" ((int)src1) , "r" (src2)) + + /* Maximum Instructions */ + #define _maxsb_(src, dest) __asm__("maxsb %1,%0" : "=r" (dest) : \ + "r" ((char)src) , "0" (dest)) + #define _maxsw_(src, dest) __asm__("maxsw %1,%0" : "=r" (dest) : \ + "r" ((short)src) , "0" (dest)) + #define _maxsd_(src, dest) __asm__("maxsd %1,%0" : "=r" (dest) : \ + "r" ((int)src) , "0" (dest)) + #define _maxub_(src, dest) __asm__("maxub %1,%0" : "=r" (dest) : \ + "r" ((unsigned char)src) , "0" (dest)) + #define _maxuw_(src, dest) __asm__("maxuw %1,%0" : "=r" (dest) : \ + "r" ((unsigned short)src) , "0" (dest)) + #define _maxud_(src, dest) __asm__("maxud %1,%0" : "=r" (dest) : \ + "r" ((unsigned int)src) , "0" (dest)) + + /* Minimum Instructions */ + #define _minsb_(src, dest) __asm__("minsb %1,%0" : "=r" (dest) : \ + "r" ((char)src) , "0" (dest)) + #define _minsw_(src, dest) __asm__("minsw %1,%0" : "=r" (dest) : \ + "r" ((short)src) , "0" (dest)) + #define _minsd_(src, dest) __asm__("minsd %1,%0" : "=r" (dest) : \ + "r" ((int)src) , "0" (dest)) + #define _minub_(src, dest) __asm__("minub %1,%0" : "=r" (dest) : \ + "r" ((unsigned char)src) , "0" (dest)) + #define _minuw_(src, dest) __asm__("minuw %1,%0" : "=r" (dest) : \ + "r" ((unsigned short)src) , "0" (dest)) + #define _minud_(src, dest) __asm__("minud %1,%0" : "=r" (dest) : \ + "r" ((unsigned int)src) , "0" (dest)) + + /* Move Instructions */ + #define _movb_(src, dest) __asm__("movb %1,%0" : "=r" (dest) : \ + "ri" ((unsigned char)src) , "0" (dest)) + #define _movw_(src, dest) __asm__("movw %1,%0" : "=r" (dest) : \ + "ri" ((unsigned short)src) , "0" (dest)) + #define _movd_(src, dest) __asm__("movd %1,%0" : "=r" (dest) : \ + "ri" ((unsigned int)src) , "0" (dest)) + + /* mtpr and mfpr Insturctions */ + #define _mtpr_(procregd, src) __asm__("mtpr\t%0," procregd : /* no output */ : \ + "r" (src) : "cc") + #define _mfpr_(procregd, dest) __asm__("mfpr\t" procregd ",%0" : "=r" (dest) : \ + /* no input */ "0" (dest) : "cc") + + /* Multiplication Instructions */ + #define _mulsbw_(src, dest) __asm__("mulsbw %1,%0" : "=r" (dest) : \ + "r" ((char)src) , "0" (dest)) + #define _mulubw_(src, dest) __asm__("mulubw %1,%0" : "=r" (dest) : \ + "r" ((unsigned char)src) , "0" (dest)) + #define _mulswd_(src, dest) __asm__("mulswd %1,%0" : "=r" (dest) : \ + "r" ((short)src) , "0" (dest)) + #define _muluwd_(src, dest) __asm__("muluwd %1,%0" : "=r" (dest) : \ + "r" ((unsigned short)src) , "0" (dest)) + #define _mulb_(src, dest) __asm__("mulb %1,%0" : "=r" (dest) : \ + "ri" ((char)src) , "0" (dest)) + #define _mulw_(src, dest) __asm__("mulw %1,%0" : "=r" (dest) : \ + "ri" ((short)src) , "0" (dest)) + #define _muld_(src, dest) __asm__("muld %1,%0" : "=r" (dest) : \ + "ri" ((int)src) , "0" (dest)) + #define _mullsd_(hi, lo, src1, src2) __asm__("mullsd %2,%3" \ + : =l (lo), =h (hi) \ + : "r" ((unsigned int)src1) , "r" ((unsigned int)src2)) + #define _mullud_(hi, lo, src1, src2) __asm__("mullud %2,%3" \ + : =l (lo), =h (hi) \ + : "r" ((int)src1) , "r" ((int)src2)) + + /* Q-Format Multiplication Instructions */ + #define _mulqb_(src, dest) __asm__("mulqb %1,%0" : "=r" (dest) : \ + "r" ((char)src) , "0" (dest)) + #define _mulqw_(src, dest) __asm__("mulqw %1,%0" : "=r" (dest) : \ + "r" ((short)src) , "0" (dest)) + + /* nop Instruction */ + #define _nop_() __asm__("nop") + + /* Negate Instructions */ + #define _negb_(src, dest) __asm__("negb %1,%0" : "=r" (dest) : \ + "r" ((char)src) , "0" (dest)) + #define _negw_(src, dest) __asm__("negw %1,%0" : "=r" (dest) : \ + "r" ((short)src) , "0" (dest)) + #define _negd_(src, dest) __asm__("negd %1,%0" : "=r" (dest) : \ + "r" ((int)src) , "0" (dest)) + + /* or Instructions */ + #define _orb_(src, dest) __asm__("orb %1,%0" : "=r" (dest) : \ + "ri" ((unsigned char)src) , "0" (dest)) + #define _orw_(src, dest) __asm__("orw %1,%0" : "=r" (dest) : \ + "ri" ((unsigned short)src) , "0" (dest)) + #define _ord_(src, dest) __asm__("ord %1,%0" : "=r" (dest) : \ + "ri" ((unsigned int)src) , "0" (dest)) + + /* Pop 1's Count Instructions */ + #define _popcntb_(src, dest) __asm__("popcntb %1,%0" : "=r" (dest) : \ + "r" ((char)src) , "0" (dest)) + #define _popcntw_(src, dest) __asm__("popcntw %1,%0" : "=r" (dest) : \ + "r" ((short)src) , "0" (dest)) + #define _popcntd_(src, dest) __asm__("popcntd %1,%0" : "=r" (dest) : \ + "r" ((int)src) , "0" (dest)) + + /* Rotate and Mask Instructions */ + #define _ram_(shift, end, begin, dest, src) __asm__("ram %1, %2, %3, %0, %4" : \ + "=r" (dest) : \ + "i" ((unsigned char) shift), \ + "i" (end), "i" (begin), \ + "r" (src), "0" (dest)) + #define _rim_(shift, end, begin, dest, src) __asm__("rim %1, %2, %3, %0, %4" : \ + "=r" (dest) : \ + "i" ((unsigned char) shift), \ + "i" (end), "i" (begin), \ + "r" (src), "0" (dest)) + + /* retx Instruction */ + #define _retx_() __asm__("retx") + + /* Rotate Instructions */ + #define _rotb_(shift, dest) __asm__("rotb %1,%0" : "=r" (dest) : \ + "i" ((unsigned char)shift) , "0" (dest)) + #define _rotw_(shift, dest) __asm__("rotw %1,%0" : "=r" (dest) : \ + "i" ((unsigned char)shift) , "0" (dest)) + #define _rotd_(shift, dest) __asm__("rotd %1,%0" : "=r" (dest) : \ + "i" ((unsigned char)shift) , "0" (dest)) + #define _rotlb_(shift, dest) __asm__("rotlb %1,%0" : "=r" (dest) : \ + "r" ((unsigned char)shift) , "0" (dest)) + #define _rotlw_(shift, dest) __asm__("rotlw %1,%0" : "=r" (dest) : \ + "r" ((unsigned char)shift) , "0" (dest)) + #define _rotld_(shift, dest) __asm__("rotld %1,%0" : "=r" (dest) : \ + "r" ((unsigned char)shift) , "0" (dest)) + #define _rotrb_(shift, dest) __asm__("rotrb %1,%0" : "=r" (dest) : \ + "r" ((unsigned char)shift) , "0" (dest)) + #define _rotrw_(shift, dest) __asm__("rotrw %1,%0" : "=r" (dest) : \ + "r" ((unsigned char)shift) , "0" (dest)) + #define _rotrd_(shift, dest) __asm__("rotrd %1,%0" : "=r" (dest) : \ + "r" ((unsigned char)shift) , "0" (dest)) + + /* Set Bit Instructions */ + #define _sbitb_(pos,dest) __asm__("sbitb %1,%0" : "=mr" (dest) : \ + "i" ((unsigned char)pos) , "0" (dest) : "cc") + #define _sbitw_(pos,dest) __asm__("sbitw %1,%0" : "=mr" (dest) : \ + "i" ((unsigned char)pos) , "0" (dest) : "cc") + #define _sbitd_(pos,dest) __asm__("sbitd %1,%0" : "=mr" (dest) : \ + "i" ((unsigned char)pos) , "0" (dest) : "cc") + + /* setrfid Instruction */ + #define _setrfid_(src) __asm__("setrfid %0" : /* No output */ : \ + "r" (src) : "cc") + + /* Sign Extend Instructions */ + #define _sextbw_(src, dest) __asm__("sextbw %1,%0" : "=r" (dest) : \ + "r" ((char)src) , "0" (dest) ) + #define _sextbd_(src, dest) __asm__("sextbd %1,%0" : "=r" (dest) : \ + "r" ((char)src) , "0" (dest) ) + #define _sextwd_(src, dest) __asm__("sextwd %1,%0" : "=r" (dest) : \ + "r" ((short)src) , "0" (dest) ) + + /* Shift Left Logical Instructions */ + #define _sllb_(src, dest) __asm__("sllb %1,%0" : "=r" (dest) : \ + "ri" ((unsigned char)src) , "0" (dest)) + #define _sllw_(src, dest) __asm__("sllw %1,%0" : "=r" (dest) : \ + "ri" ((unsigned char)src) , "0" (dest)) + #define _slld_(src, dest) __asm__("slld %1,%0" : "=r" (dest) : \ + "ri" ((unsigned char)src) , "0" (dest)) + /* Shift Right Arithmetic Instructions */ + #define _srab_(src, dest) __asm__("srab %1,%0" : "=r" (dest) : \ + "ri" ((unsigned char)src) , "0" (dest)) + #define _sraw_(src, dest) __asm__("sraw %1,%0" : "=r" (dest) : \ + "ri" ((unsigned char)src) , "0" (dest)) + #define _srad_(src, dest) __asm__("srad %1,%0" : "=r" (dest) : \ + "ri" ((unsigned char)src) , "0" (dest)) + + /* Shift Right Logical Instructions */ + #define _srlb_(src, dest) __asm__("srlb %1,%0" : "=r" (dest) : \ + "ri" ((unsigned char)src) , "0" (dest)) + #define _srlw_(src, dest) __asm__("srlw %1,%0" : "=r" (dest) : \ + "ri" ((unsigned char)src) , "0" (dest)) + #define _srld_(src, dest) __asm__("srld %1,%0" : "=r" (dest) : \ + "ri" ((unsigned char)src) , "0" (dest)) + + /* Store Instructions */ + #define _storb_(src,address) __asm__("storb %1,%0" : "=m" (address) : \ + "ri" ((unsigned int)src)) + #define _storw_(src,address) __asm__("storw %1,%0" : "=m" (address) : \ + "ri" ((unsigned int)src)) + #define _stord_(src,address) __asm__("stord %1,%0" : "=m" (address) : \ + "ri" ((unsigned int)src)) + + /* Store Multiple Instructions */ + #define _storm_(mask, src) __asm__("storm %1,%0" : /* No output here */ : \ + "i" (mask) , "r" ((unsigned int)src)) + #define _stormp_(mask, src) __asm__("stormp %1,%0" : /* No output here */ : \ + "i" (mask) , "r" ((unsigned int)src)) + + /* Substruct Instructions */ + #define _subb_(src, dest) __asm__("subb %1, %0" : "=r" (dest) : \ + "ri" ((unsigned char)src), "0" (dest) : "cc") + #define _subw_(src, dest) __asm__("subw %1, %0" : "=r" (dest) : \ + "ri" ((unsigned short)src), "0" (dest) : "cc") + #define _subd_(src, dest) __asm__("subd %1, %0" : "=r" (dest) : \ + "ri" ((unsigned int)src), "0" (dest) : "cc") + + /* Substruct with Carry Instructions */ + #define _subcb_(src, dest) __asm__("subcb %1, %0" : "=r" (dest) : \ + "ri" ((unsigned char)src), "0" (dest) : "cc") + #define _subcw_(src, dest) __asm__("subcw %1, %0" : "=r" (dest) : \ + "ri" ((unsigned short)src), "0" (dest) : "cc") + #define _subcd_(src, dest) __asm__("subcd %1, %0" : "=r" (dest) : \ + "ri" ((unsigned int)src), "0" (dest) : "cc") + + /* Q-Format Substruct Instructions */ + #define _subqb_(src, dest) __asm__("subqw %1,%0" : "=r" (dest) : \ + "r" ((char)src) , "0" (dest)) + #define _subqw_(src, dest) __asm__("subqw %1,%0" : "=r" (dest) : \ + "r" ((short)src) , "0" (dest)) + #define _subqd_(src, dest) __asm__("subqd %1,%0" : "=r" (dest) : \ + "r" ((short)src) , "0" (dest)) + + /* Test Bit Instructions */ + #define _tbitb_(pos,dest) __asm__("tbitb %0,%1" : /* No output */ : \ + "i" ((unsigned char)pos) , "rm" (dest) : "cc") + #define _tbitw_(pos,dest) __asm__("tbitw %0,%1" : /* No output */ : \ + "i" ((unsigned char)pos) , "rm" (dest) : "cc") + #define _tbitd_(pos,dest) __asm__("tbitd %0,%1" : /* No output */ : \ + "i" ((unsigned char)pos) , "rm" (dest) : "cc") + + /* wait Instruction*/ + #define _wait_() __asm__ volatile ("wait" : : : "cc") + + /* xor Instructions */ + #define _xorb_(src, dest) __asm__("xorb %1,%0" : "=r" (dest) : \ + "ri" ((unsigned char)src) , "0" (dest)) + #define _xorw_(src, dest) __asm__("xorw %1,%0" : "=r" (dest) : \ + "ri" ((unsigned short)src) , "0" (dest)) + #define _xord_(src, dest) __asm__("xord %1,%0" : "=r" (dest) : \ + "ri" ((unsigned int)src) , "0" (dest)) + + /* Zero Extend Instructions */ + #define _zextbw_(src, dest) __asm__("zextbw %1,%0" : "=r" (dest) : \ + "r" ((unsigned char)src) , "0" (dest)) + #define _zextbd_(src, dest) __asm__("zextbd %1,%0" : "=r" (dest) : \ + "r" ((unsigned char)src) , "0" (dest)) + #define _zextwd_(src, dest) __asm__("zextwd %1,%0" : "=r" (dest) : \ + "r" ((unsigned short)src) , "0" (dest)) + + #define _save_asm_(x) \ + __asm__ volatile (x ::: "memory","cc", \ + "r0","r1","r2","r3","r4","r5","r6","r7", \ + "r8","r9","r10","r11","r12","r13") + + #endif /* _ASM */ + + Index: newlib/newlib/libc/sys/crx/sys/libh.h diff -c /dev/null newlib/newlib/libc/sys/crx/sys/libh.h:1.1.2.2 *** /dev/null Fri Oct 1 15:00:15 2004 --- newlib/newlib/libc/sys/crx/sys/libh.h Fri Oct 1 14:00:49 2004 *************** *** 0 **** --- 1,51 ---- + /* libh.h -- CRX default handlers + * + * Copyright (c) 2004 National Semiconductor Corporation + * + * The authors hereby grant permission to use, copy, modify, distribute, + * and license this software and its documentation for any purpose, provided + * that existing copyright notices are retained in all copies and that this + * notice is included verbatim in any distributions. No written agreement, + * license, or royalty fee is required for any of the authorized uses. + * Modifications to this software may be copyrighted by their authors + * and need not follow the licensing terms described here, provided that + * the new terms are clearly indicated on the first page of each file where + * they apply. + */ + + #ifndef _LIBH + #define _LIBH + + /* These are the first 16 entries of the default dispatch table as defined + in the CompactRISC architecture: + + Entry Function + ----- -------- + 0 NULL + 1 nmi + 2 NULL + 3 NULL + 4 NULL + 5 svc + 6 dvz + 7 flg + 8 bpt + 9 trc + 10 und + 11 NULL + 12 iad + 13 NULL + 14 dbg + 15 ise + */ + + extern void (* const _dispatch_table[])(void); + + /* Function prototypes */ + void svc_handler(void); + void dvz_handler(void); + void flg_handler(void); + void und_handler(void); + void iad_handler(void); + + #endif /* _LIBH */ Index: newlib/newlib/libc/sys/crx/sys/syscall.h diff -c /dev/null newlib/newlib/libc/sys/crx/sys/syscall.h:1.1.2.2 *** /dev/null Fri Oct 1 15:00:15 2004 --- newlib/newlib/libc/sys/crx/sys/syscall.h Fri Oct 1 14:00:49 2004 *************** *** 0 **** --- 1,61 ---- + /* syscall.h -- CRX virtual I/O and trap service codes + * + * Copyright (c) 2004 National Semiconductor Corporation + * + * The authors hereby grant permission to use, copy, modify, distribute, + * and license this software and its documentation for any purpose, provided + * that existing copyright notices are retained in all copies and that this + * notice is included verbatim in any distributions. No written agreement, + * license, or royalty fee is required for any of the authorized uses. + * Modifications to this software may be copyrighted by their authors + * and need not follow the licensing terms described here, provided that + * the new terms are clearly indicated on the first page of each file where + * they apply. + */ + + #ifndef _SYSCALL_H + #define _SYSCALL_H + + #include + + /* SVC codes to pass to the debugger */ + + /* Virtual I/O services */ + #define SVC_OPEN 0x401 + #define SVC_CLOSE 0x402 + #define SVC_READ 0x403 + #define SVC_WRITE 0x404 + #define SVC_LSEEK 0x405 + #define SVC_RENAME 0x406 + #define SVC_UNLINK 0x407 + #define SVC_GETENV 0x408 + + /* Time service */ + #define SVC_TIME 0x300 + + /* Start/end of program services */ + #define SVC_EOP 0x410 + + /* Trap services */ + #define SVC_SVC 0x505 + #define SVC_DVZ 0x506 + #define SVC_FLG 0x507 + #define SVC_UND 0x50a + #define SVC_IAD 0x50c + + + /* Places the code of the requested service in R0, then transfers control + to the debugger using the BPT exception. + It is called from the start routine, VIO functions and the trap + handlers. */ + + #define STRINGIFY(x) #x + #define HOST_SERVICE(service) \ + do { \ + __asm__("movd\t$" STRINGIFY(service) ",r0"); \ + _excp_(bpt); \ + __asm__(".short\t0xFFFF"); \ + } while (0) + + #endif /* _SYSCALL_H */ +