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Re: [PATCH 1/3] x86: Add CPU Vendor ID detection support for Zhaoxin processors
- From: Florian Weimer <fw at deneb dot enyo dot de>
- To: MayShao <MayShao at zhaoxin dot com>
- Cc: <libc-alpha at sourceware dot org>, <carlos at redhat dot com>, <CooperYan at zhaoxin dot com>, <QiyuanWang at zhaoxin dot com>, <HerryYang at zhaoxin dot com>, <RickyLi at zhaoxin dot com>
- Date: Mon, 09 Dec 2019 09:32:59 +0100
- Subject: Re: [PATCH 1/3] x86: Add CPU Vendor ID detection support for Zhaoxin processors
- References: <1575862175-5044-1-git-send-email-MayShao@zhaoxin.com> <1575862175-5044-2-git-send-email-MayShao@zhaoxin.com>
* MayShao:
> + cpu_features->feature[index_arch_Slow_SSE4_2]
> + |= (bit_arch_Slow_SSE4_2
> + | bit_arch_Prefer_MAP_32BIT_EXEC);
Is the Prefer_MAP_32BIT_EXEC part really correct?
As discussed recently, it does not have an effect with programs linked
with -z separate-code (the default these days, I think) and PIE.
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Would you please clarify if this is intended as a patch submission?