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[PATCH] [powerpc] libc_feholdsetround_noex_ppc_ctx: optimize FPSCR write
- From: "Paul A. Clarke" <pc at us dot ibm dot com>
- To: libc-alpha at sourceware dot org
- Cc: tuliom at ascii dot art dot br, murphyp at linux dot ibm dot com
- Date: Mon, 9 Sep 2019 11:21:07 -0500
- Subject: [PATCH] [powerpc] libc_feholdsetround_noex_ppc_ctx: optimize FPSCR write
From: "Paul A. Clarke" <pc@us.ibm.com>
libc_feholdsetround_noex_ppc_ctx currently does, basically:
1. Read FPSCR, save to context.
2. Create new FPSCR value: clear enables and set new rounding mode.
3. Write new value to FPSCR.
Since other bits just pass through, there is no need to write them.
Instead, write just the changed values (enables and rounding mode),
which can be a bit more efficient.
2019-09-09 Paul A. Clarke <pc@us.ibm.com>
* sysdeps/powerpc/fpu/fenv_private.h
(libc_feholdsetround_noex_ppc_ctx): Call fesetenv_mode instead
of fesetenv_register.
---
Note: this patch probably depends on previously posted patch,
"[powerpc] fenv_private.h clean up" to apply properly.
sysdeps/powerpc/fpu/fenv_private.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sysdeps/powerpc/fpu/fenv_private.h b/sysdeps/powerpc/fpu/fenv_private.h
index 806a385..3286b4e 100644
--- a/sysdeps/powerpc/fpu/fenv_private.h
+++ b/sysdeps/powerpc/fpu/fenv_private.h
@@ -177,7 +177,7 @@ libc_feholdsetround_noex_ppc_ctx (struct rm_ctx *ctx, int r)
if (__glibc_unlikely (new.l != old.l))
{
__TEST_AND_ENTER_NON_STOP (old.l, 0ULL);
- fesetenv_register (new.fenv);
+ fesetenv_mode (new.fenv);
ctx->updated_status = true;
}
else
--
1.8.3.1