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Re: [v2 PATCH 1/2] PPC64: Add libmvec SIMD single-precision power function.
- From: Shawn Landden <shawn at git dot icu>
- To: Tulio Magno Quites Machado Filho <tuliom at ascii dot art dot br>, "libc-alpha at sourceware dot org" <libc-alpha at sourceware dot org>
- Date: Thu, 11 Jul 2019 14:16:27 -0500
- Subject: Re: [v2 PATCH 1/2] PPC64: Add libmvec SIMD single-precision power function.
- References: <20190625175302.26676-1-shawn@git.icu> <20190704215646.18970-1-shawn@git.icu> <87d0ikd2s0.fsf@linux.ibm.com>
08.07.2019, 09:22, "Tulio Magno Quites Machado Filho" <tuliom@ascii.art.br>:
> Shawn Landden <shawn@git.icu> writes:
>
>> +/* The output of log2 and thus the input of exp2 is either scaled by N
>> + (in case of fast toint intrinsics) or not. The unscaled xd must be
>> + in [-1021,1023], sign_bias sets the sign of the result. */
>> +static inline
>> +vector float
>> +exp2_inline (vector double xdl, vector double xdr, vector unsigned sign_bias)
>> +{
>> + v64u kil, kir, skil, skir, sign_biasl, sign_biasr;
>> + vector double kdl, kdr, zl, zr, rl, rr, r2l, r2r, yl, yr, sl, sr;
>> +
>> + vector unsigned zero = {0, 0, 0, 0};
>> +#ifdef __LITTLE_ENDIAN__
>> + sign_biasl = (v64u)vec_mergeh (sign_bias, zero);
>> + sign_biasr = (v64u)vec_mergel (sign_bias, zero);
>> +#elif __BIG_ENDIAN__
>> + sign_biasl = (v64u)vec_mergel (sign_bias, zero);
>> + sign_biasr = (v64u)vec_mergeh (sign_bias, zero);
>
> In big endian that's the wrong word, i.e.:
> sign_biasl = (v64u)vec_mergel (zero, sign_bias);
> sign_biasr = (v64u)vec_mergeh (zero, sign_bias);
>
> Fixed.
I recently got access to a Big-Endian VPS restored, so hopefully this will not happen again in the future.
>
> I'm merging both patches now.
>
> Thanks!
>
> --
> Tulio Magno
--
Shawn Landden