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Re: [PATCH] [powerpc] get_rounding_mode: utilize faster method to get rounding mode


"Paul A. Clarke" <pc@us.ibm.com> writes:

> Add support to use 'mffsl' instruction if compiled for POWER9 (or later).
>
> Also, mask the result to avoid bleeding unrelated bits into the result of
> _FPU_GET_RC().
>
> 2019-06-05  Paul A. Clarke  <pc@us.ibm.com>
>
> 	* sysdeps/powerpc/fpu/fegetexcept.c (__fegetexcept): Replace code
> 	with call to equivalent function.

This file is missing in this patch.

> diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h
> index 8a0bace..621e57f 100644
> --- a/sysdeps/powerpc/fpu/fenv_libc.h
> +++ b/sysdeps/powerpc/fpu/fenv_libc.h
> @@ -34,6 +34,21 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
>     pointer.  */
>  #define fegetenv_register() __builtin_mffs()
>  
> +/* Equivalent to fegetenv_register, but only returns bits for
> +   status, exception enables, and mode.  */
> +#ifdef _ARCH_PWR9
> +#define fegetenv_status() \
> +  ({union { double __d; unsigned long long __ll; } __u;	\
> +    register double __fr;				\
> +    __asm__ ("mffsl %0" : "=f" (__fr));			\
> +    __u.__d = __fr;					\
> +    __u.__ll;						\
> +  })
> +#else
> +#define fegetenv_status() __builtin_mffs()
> +#error "power8"
> +#endif

Is this macro used in fegetexcept.c?
Is the error intentional?

-- 
Tulio Magno


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