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[PATCH v4 05/11] nds32: Generic <math.h>, soft-fp and hard-fp Routines
- From: Vincent Chen <vincentc at andestech dot com>
- To: <libc-alpha at sourceware dot org>, <joseph at codesourcery dot com>
- Cc: <deanbo422 at gmail dot com>, <cnoize at andestech dot com>, <vincentc at andestech dot com>
- Date: Wed, 5 Jun 2019 19:56:49 +0800
- Subject: [PATCH v4 05/11] nds32: Generic <math.h>, soft-fp and hard-fp Routines
- References: <1559735815-20093-1-git-send-email-vincentc@andestech.com>
nds32 ports support hard-fp and soft-fp operation. This patch contains
the requried files and ulps file.
2019-06-03 Vincent Chen <vincentc@andestech.com>
2019-06-03 CheWei Chuang <cnoize@andestech.com>
* sysdeps/nds32/bits/fenv.h: New file.
* sysdeps/nds32/fpu/e_sqrt.c: Likewise.
* sysdeps/nds32/fpu/e_sqrtf.c: Likewise.
* sysdeps/nds32/fpu/fclrexcpt.c: Likewise.
* sysdeps/nds32/fpu/fedisblxcpt.c: Likewise.
* sysdeps/nds32/fpu/feenablxcpt.c: Likewise.
* sysdeps/nds32/fpu/fegetenv.c: Likewise.
* sysdeps/nds32/fpu/fegetexcept.c: Likewise.
* sysdeps/nds32/fpu/fegetmode.c: Likewise.
* sysdeps/nds32/fpu/fegetround.c: Likewise.
* sysdeps/nds32/fpu/feholdexcpt.c: Likewise.
* sysdeps/nds32/fpu/fenv_private.h: Likewise.
* sysdeps/nds32/fpu/fesetenv.c: Likewise.
* sysdeps/nds32/fpu/fesetexcept.c: Likewise.
* sysdeps/nds32/fpu/fesetmode.c: Likewise.
* sysdeps/nds32/fpu/fesetround.c: Likewise.
* sysdeps/nds32/fpu/feupdateenv.c: Likewise.
* sysdeps/nds32/fpu/fgetexcptflg.c: Likewise.
* sysdeps/nds32/fpu/fix-fp-int-compare-invalid.h: Likewise.
* sysdeps/nds32/fpu/fix-fp-int-convert-overflow.h: Likewise.
* sysdeps/nds32/fpu/fpu_control.h: Likewise.
* sysdeps/nds32/fpu/fraiseexcpt.c: Likewise.
* sysdeps/nds32/fpu/fsetexcptflg.c: Likewise.
* sysdeps/nds32/fpu/ftestexcept.c: Likewise.
* sysdeps/nds32/fpu/get-rounding-mode.h: Likewise.
* sysdeps/nds32/fpu/libm-test-ulps: Likewise.
* sysdeps/nds32/fpu/libm-test-ulps-name: Likewise.
* sysdeps/nds32/fpu/math-barriers.h: Likewise.
* sysdeps/nds32/nofpu/libm-test-ulps: Likewise.
* sysdeps/nds32/nofpu/libm-test-ulps-name: Likewise.
* sysdeps/nds32/sfp-machine.h: Likewise.
* sysdeps/nds32/tininess.h: Likewise.
---
sysdeps/nds32/bits/fenv.h | 96 ++
sysdeps/nds32/fpu/e_sqrt.c | 27 +
sysdeps/nds32/fpu/e_sqrtf.c | 26 +
sysdeps/nds32/fpu/fclrexcpt.c | 42 +
sysdeps/nds32/fpu/fedisblxcpt.c | 58 +
sysdeps/nds32/fpu/feenablxcpt.c | 57 +
sysdeps/nds32/fpu/fegetenv.c | 44 +
sysdeps/nds32/fpu/fegetexcept.c | 41 +
sysdeps/nds32/fpu/fegetmode.c | 39 +
sysdeps/nds32/fpu/fegetround.c | 29 +
sysdeps/nds32/fpu/feholdexcpt.c | 29 +
sysdeps/nds32/fpu/fenv_private.h | 229 ++++
sysdeps/nds32/fpu/fesetenv.c | 30 +
sysdeps/nds32/fpu/fesetexcept.c | 34 +
sysdeps/nds32/fpu/fesetmode.c | 53 +
sysdeps/nds32/fpu/fesetround.c | 35 +
sysdeps/nds32/fpu/feupdateenv.c | 31 +
sysdeps/nds32/fpu/fgetexcptflg.c | 27 +
sysdeps/nds32/fpu/fix-fp-int-compare-invalid.h | 25 +
sysdeps/nds32/fpu/fix-fp-int-convert-overflow.h | 34 +
sysdeps/nds32/fpu/fpu_control.h | 104 ++
sysdeps/nds32/fpu/fraiseexcpt.c | 100 ++
sysdeps/nds32/fpu/fsetexcptflg.c | 39 +
sysdeps/nds32/fpu/ftestexcept.c | 27 +
sysdeps/nds32/fpu/get-rounding-mode.h | 39 +
sysdeps/nds32/fpu/libm-test-ulps | 1643 +++++++++++++++++++++++
sysdeps/nds32/fpu/libm-test-ulps-name | 1 +
sysdeps/nds32/fpu/math-barriers.h | 27 +
sysdeps/nds32/nofpu/libm-test-ulps | 390 ++++++
sysdeps/nds32/nofpu/libm-test-ulps-name | 1 +
sysdeps/nds32/sfp-machine.h | 68 +
sysdeps/nds32/tininess.h | 1 +
32 files changed, 3426 insertions(+)
create mode 100644 sysdeps/nds32/bits/fenv.h
create mode 100644 sysdeps/nds32/fpu/e_sqrt.c
create mode 100644 sysdeps/nds32/fpu/e_sqrtf.c
create mode 100644 sysdeps/nds32/fpu/fclrexcpt.c
create mode 100644 sysdeps/nds32/fpu/fedisblxcpt.c
create mode 100644 sysdeps/nds32/fpu/feenablxcpt.c
create mode 100644 sysdeps/nds32/fpu/fegetenv.c
create mode 100644 sysdeps/nds32/fpu/fegetexcept.c
create mode 100644 sysdeps/nds32/fpu/fegetmode.c
create mode 100644 sysdeps/nds32/fpu/fegetround.c
create mode 100644 sysdeps/nds32/fpu/feholdexcpt.c
create mode 100644 sysdeps/nds32/fpu/fenv_private.h
create mode 100644 sysdeps/nds32/fpu/fesetenv.c
create mode 100644 sysdeps/nds32/fpu/fesetexcept.c
create mode 100644 sysdeps/nds32/fpu/fesetmode.c
create mode 100644 sysdeps/nds32/fpu/fesetround.c
create mode 100644 sysdeps/nds32/fpu/feupdateenv.c
create mode 100644 sysdeps/nds32/fpu/fgetexcptflg.c
create mode 100644 sysdeps/nds32/fpu/fix-fp-int-compare-invalid.h
create mode 100644 sysdeps/nds32/fpu/fix-fp-int-convert-overflow.h
create mode 100644 sysdeps/nds32/fpu/fpu_control.h
create mode 100644 sysdeps/nds32/fpu/fraiseexcpt.c
create mode 100644 sysdeps/nds32/fpu/fsetexcptflg.c
create mode 100644 sysdeps/nds32/fpu/ftestexcept.c
create mode 100644 sysdeps/nds32/fpu/get-rounding-mode.h
create mode 100644 sysdeps/nds32/fpu/libm-test-ulps
create mode 100644 sysdeps/nds32/fpu/libm-test-ulps-name
create mode 100644 sysdeps/nds32/fpu/math-barriers.h
create mode 100644 sysdeps/nds32/nofpu/libm-test-ulps
create mode 100644 sysdeps/nds32/nofpu/libm-test-ulps-name
create mode 100644 sysdeps/nds32/sfp-machine.h
create mode 100644 sysdeps/nds32/tininess.h
diff --git a/sysdeps/nds32/bits/fenv.h b/sysdeps/nds32/bits/fenv.h
new file mode 100644
index 0000000..ea72fa4
--- /dev/null
+++ b/sysdeps/nds32/bits/fenv.h
@@ -0,0 +1,96 @@
+/* Floating point environment, Andes nds32 version.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef _FENV_H
+# error "Never use <bits/fenv.h> directly; include <fenv.h> instead."
+#endif
+
+#ifdef __NDS32_ABI_2FP_PLUS__
+/* Define bits representing exceptions in the FPCSR status word. */
+enum
+ {
+ FE_INVALID =
+# define FE_INVALID (0x4)
+ FE_INVALID,
+ FE_DIVBYZERO =
+# define FE_DIVBYZERO (0x8)
+ FE_DIVBYZERO,
+ FE_OVERFLOW =
+# define FE_OVERFLOW (0x10)
+ FE_OVERFLOW,
+ FE_UNDERFLOW =
+# define FE_UNDERFLOW (0x20)
+ FE_UNDERFLOW,
+ FE_INEXACT =
+# define FE_INEXACT (0x40)
+ FE_INEXACT
+ };
+
+
+# define FE_ALL_EXCEPT \
+ (FE_INVALID | FE_DIVBYZERO | FE_OVERFLOW | FE_UNDERFLOW | FE_INEXACT)
+enum
+ {
+ FE_TONEAREST =
+# define FE_TONEAREST (0x0)
+ FE_TONEAREST,
+ FE_UPWARD =
+# define FE_UPWARD (0x1)
+ FE_UPWARD,
+ FE_DOWNWARD =
+# define FE_DOWNWARD (0x2)
+ FE_DOWNWARD,
+ FE_TOWARDZERO =
+# define FE_TOWARDZERO (0x3)
+ FE_TOWARDZERO
+
+ };
+# define FE_NOMASK_ENV ((const fenv_t *) -2)
+
+#else
+
+# define FE_ALL_EXCEPT 0
+
+enum
+ {
+ __FE_UNDEFINED = 0,
+
+ FE_TONEAREST =
+# define FE_TONEAREST 1
+ FE_TONEAREST,
+ };
+
+
+#endif
+/* Type representing exception flags. */
+typedef unsigned int fexcept_t;
+
+/* Type representing floating-point environment. */
+typedef unsigned int fenv_t;
+
+/* If the default argument is used we use this value. */
+#define FE_DFL_ENV ((const fenv_t *) -1)
+
+
+#if __GLIBC_USE (IEC_60559_BFP_EXT)
+/* Type representing floating-point control modes. */
+typedef unsigned int femode_t;
+
+/* Default floating-point control modes. */
+# define FE_DFL_MODE ((const femode_t *) -1L)
+#endif
diff --git a/sysdeps/nds32/fpu/e_sqrt.c b/sysdeps/nds32/fpu/e_sqrt.c
new file mode 100644
index 0000000..19a2a23
--- /dev/null
+++ b/sysdeps/nds32/fpu/e_sqrt.c
@@ -0,0 +1,27 @@
+/* Double precision floating point square root. Andes nds32 version.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+
+
+double __ieee754_sqrt (double x)
+{
+ double z;
+ __asm__ ("fsqrtd %0,%1" : "=f" (z) : "f" (x));
+ return z;
+}
+strong_alias (__ieee754_sqrt, __sqrt_finite)
diff --git a/sysdeps/nds32/fpu/e_sqrtf.c b/sysdeps/nds32/fpu/e_sqrtf.c
new file mode 100644
index 0000000..0428559
--- /dev/null
+++ b/sysdeps/nds32/fpu/e_sqrtf.c
@@ -0,0 +1,26 @@
+/* Single precision floating point square root. Andes nds32 version.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+
+float __ieee754_sqrtf (float x)
+{
+ float z;
+ __asm__ ("fsqrts %0,%1" : "=f" (z) : "f" (x));
+ return z;
+}
+strong_alias (__ieee754_sqrtf, __sqrtf_finite)
diff --git a/sysdeps/nds32/fpu/fclrexcpt.c b/sysdeps/nds32/fpu/fclrexcpt.c
new file mode 100644
index 0000000..87d5ba0
--- /dev/null
+++ b/sysdeps/nds32/fpu/fclrexcpt.c
@@ -0,0 +1,42 @@
+/* Clear given exceptions in current floating-point environment.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public License as
+ published by the Free Software Foundation; either version 2.1 of the
+ License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <fenv.h>
+#include <fpu_control.h>
+
+int
+feclearexcept (int excepts)
+{
+ int temp;
+
+ /* Mask out unsupported bits/exceptions. */
+ excepts &= FE_ALL_EXCEPT;
+
+ /* Get the current floating point status. */
+ _FPU_GETCW (temp);
+
+ /* Clear the relevant bits. */
+ temp &= ~excepts;
+
+ /* Put the new data in effect. */
+ _FPU_SETCW (temp);
+
+ /* Success. */
+ return 0;
+}
+libm_hidden_def (feclearexcept)
diff --git a/sysdeps/nds32/fpu/fedisblxcpt.c b/sysdeps/nds32/fpu/fedisblxcpt.c
new file mode 100644
index 0000000..f8ca5a8
--- /dev/null
+++ b/sysdeps/nds32/fpu/fedisblxcpt.c
@@ -0,0 +1,58 @@
+/* Disable floating-point exceptions. Andes nds32 version.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public License as
+ published by the Free Software Foundation; either version 2.1 of the
+ License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include <fenv_private.h>
+
+int
+fedisableexcept (int excepts)
+{
+ unsigned long int new_fpcsr, fpcsr, old_exc;
+ unsigned long int act = 0, cmd = GET_UDF_IEX_TRAP;
+ int old_udfiex_trap;
+
+ _FPU_GETCW(fpcsr);
+
+ new_fpcsr = fpcsr & (~ENABLE_MASK);
+
+ excepts = (excepts & FE_ALL_EXCEPT) << ENABLE_SHIFT;
+
+ if (__KERNEL_SUPPORT_SUBNOR_OUTPUT) {
+ old_exc = fpcsr & ENABLE_MASK_SUBOUT;
+ new_fpcsr |= FPU_MASK_SUBOUT;
+
+ if (excepts & FPU_MASK_SUBOUT) {
+ cmd = DISABLE_UDF_IEX_TRAP;
+ act = excepts & FPU_MASK_SUBOUT;
+ }
+ old_udfiex_trap = __fp_udfiex_crtl(cmd, act);
+ if (old_udfiex_trap < 0)
+ return -1;
+
+ old_exc |= old_udfiex_trap;
+ } else
+ old_exc = fpcsr & ENABLE_MASK;
+
+ new_fpcsr |= (old_exc & (~excepts));
+
+ _FPU_SETCW (new_fpcsr);
+
+
+ return old_exc >> ENABLE_SHIFT;
+}
diff --git a/sysdeps/nds32/fpu/feenablxcpt.c b/sysdeps/nds32/fpu/feenablxcpt.c
new file mode 100644
index 0000000..5500843
--- /dev/null
+++ b/sysdeps/nds32/fpu/feenablxcpt.c
@@ -0,0 +1,57 @@
+/* Enable floating-point exceptions. Andes nds32 version.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public License as
+ published by the Free Software Foundation; either version 2.1 of the
+ License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include <fenv_private.h>
+
+int
+feenableexcept (int excepts)
+{
+ unsigned long int new_fpcsr, fpcsr, old_exc;
+ unsigned long int cmd = GET_UDF_IEX_TRAP, act = 0;
+ int old_udfiex_trap;
+
+ _FPU_GETCW(fpcsr);
+
+ new_fpcsr = fpcsr & (~ENABLE_MASK);
+
+ excepts = (excepts & FE_ALL_EXCEPT) << ENABLE_SHIFT;
+
+ if (__KERNEL_SUPPORT_SUBNOR_OUTPUT) {
+ old_exc = fpcsr & ENABLE_MASK_SUBOUT;
+ new_fpcsr |= FPU_MASK_SUBOUT;
+
+ if(excepts & FPU_MASK_SUBOUT) {
+ cmd = ENABLE_UDF_IEX_TRAP;
+ act = excepts & FPU_MASK_SUBOUT;
+ }
+ old_udfiex_trap = __fp_udfiex_crtl (cmd, act);
+ if (old_udfiex_trap < 0)
+ return -1;
+
+ old_exc |= old_udfiex_trap;
+ } else
+ old_exc = fpcsr & ENABLE_MASK;
+
+ new_fpcsr |= (old_exc | excepts);
+
+ _FPU_SETCW (new_fpcsr);
+
+ return old_exc >> ENABLE_SHIFT;
+}
diff --git a/sysdeps/nds32/fpu/fegetenv.c b/sysdeps/nds32/fpu/fegetenv.c
new file mode 100644
index 0000000..9f497ea
--- /dev/null
+++ b/sysdeps/nds32/fpu/fegetenv.c
@@ -0,0 +1,44 @@
+/* get current floating-point environment. Andes nds32 version.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public License as
+ published by the Free Software Foundation; either version 2.1 of the
+ License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include <fenv_private.h>
+
+int
+__fegetenv (fenv_t *envp)
+{
+ unsigned long int temp;
+ unsigned int udfiex_trap;
+
+ _FPU_GETCW (temp);
+
+ if (__KERNEL_SUPPORT_SUBNOR_OUTPUT) {
+ udfiex_trap = __fp_udfiex_crtl (GET_UDF_IEX_TRAP, 0);
+ if (udfiex_trap < 0)
+ return -1;
+
+ temp = (temp & (~FPU_MASK_SUBOUT)) | udfiex_trap;
+ }
+ *envp = temp;
+ /* Success. */
+ return 0;
+}
+libm_hidden_def (__fegetenv)
+weak_alias (__fegetenv, fegetenv)
+libm_hidden_weak (fegetenv)
diff --git a/sysdeps/nds32/fpu/fegetexcept.c b/sysdeps/nds32/fpu/fegetexcept.c
new file mode 100644
index 0000000..f9e4f34
--- /dev/null
+++ b/sysdeps/nds32/fpu/fegetexcept.c
@@ -0,0 +1,41 @@
+/* Get enabled floating-point exceptions. Andes nds32 version.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public License as
+ published by the Free Software Foundation; either version 2.1 of the
+ License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include <fenv_private.h>
+
+int
+fegetexcept (void)
+{
+ unsigned long int exec;
+ int old_udfiex_trap;
+
+ _FPU_GETCW(exec);
+
+ if (__KERNEL_SUPPORT_SUBNOR_OUTPUT) {
+ old_udfiex_trap = __fp_udfiex_crtl (GET_UDF_IEX_TRAP, 0);
+ if (old_udfiex_trap < 0)
+ return -1;
+ exec = (exec & ENABLE_MASK_SUBOUT) | old_udfiex_trap;
+ } else
+ exec &= ENABLE_MASK;
+
+ return exec >> ENABLE_SHIFT;
+
+}
diff --git a/sysdeps/nds32/fpu/fegetmode.c b/sysdeps/nds32/fpu/fegetmode.c
new file mode 100644
index 0000000..d02134c
--- /dev/null
+++ b/sysdeps/nds32/fpu/fegetmode.c
@@ -0,0 +1,39 @@
+/* Store current floating-point control modes. Andes nds32 version.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include <fenv_private.h>
+
+int
+fegetmode (femode_t *modep)
+{
+ _FPU_GETCW (*modep);
+
+ if (__KERNEL_SUPPORT_SUBNOR_OUTPUT) {
+ int old_udfiex_trap;
+
+ old_udfiex_trap = __fp_udfiex_crtl (GET_UDF_IEX_TRAP, 0);
+ if (old_udfiex_trap < 0)
+ return -1;
+
+ *modep = (*modep & (~FPU_MASK_SUBOUT)) | old_udfiex_trap;
+ }
+
+ return 0;
+}
diff --git a/sysdeps/nds32/fpu/fegetround.c b/sysdeps/nds32/fpu/fegetround.c
new file mode 100644
index 0000000..a2a1792
--- /dev/null
+++ b/sysdeps/nds32/fpu/fegetround.c
@@ -0,0 +1,29 @@
+/* Return current rounding direction.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public License as
+ published by the Free Software Foundation; either version 2.1 of the
+ License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <fenv.h>
+#include <get-rounding-mode.h>
+
+int
+__fegetround (void)
+{
+ return get_rounding_mode ();
+}
+libm_hidden_def (__fegetround)
+weak_alias (__fegetround, fegetround)
+libm_hidden_weak (fegetround)
diff --git a/sysdeps/nds32/fpu/feholdexcpt.c b/sysdeps/nds32/fpu/feholdexcpt.c
new file mode 100644
index 0000000..c157c25
--- /dev/null
+++ b/sysdeps/nds32/fpu/feholdexcpt.c
@@ -0,0 +1,29 @@
+/* Store current floating-point environment and clear exceptions. Andes nds32 version.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public License as
+ published by the Free Software Foundation; either version 2.1 of the
+ License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <fenv.h>
+#include <fenv_private.h>
+
+int
+__feholdexcept (fenv_t *envp)
+{
+ return libc_feholdexcept_nds32 (envp);
+}
+libm_hidden_def (__feholdexcept)
+weak_alias (__feholdexcept, feholdexcept)
+libm_hidden_weak (feholdexcept)
diff --git a/sysdeps/nds32/fpu/fenv_private.h b/sysdeps/nds32/fpu/fenv_private.h
new file mode 100644
index 0000000..45c13f6
--- /dev/null
+++ b/sysdeps/nds32/fpu/fenv_private.h
@@ -0,0 +1,229 @@
+/* Private floating point rounding and exceptions handling.
+ Andes NDS32 version.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef NDS32_MATH_PRIVATE_H
+#define NDS32_MATH_PRIVATE_H 1
+
+#include <fenv.h>
+#include <fpu_control.h>
+
+extern long int __fp_udfiex_crtl(int cmd, int act);
+
+static __always_inline int
+libc_feholdexcept_nds32 (fenv_t *envp)
+{
+ int fpcsr, old_udfiex_trap;
+
+ _FPU_GETCW(fpcsr);
+
+ if (__KERNEL_SUPPORT_SUBNOR_OUTPUT) {
+ /* Store the environment. */
+ *envp = (fpcsr & (~FPU_MASK_SUBOUT));
+
+ /* Get underflow trap status and disable underflow trap. */
+ old_udfiex_trap = __fp_udfiex_crtl (DISABLE_UDF_IEX_TRAP, FPU_MASK_SUBOUT);
+ if (old_udfiex_trap >= 0)
+ *envp |= old_udfiex_trap;
+
+ /* Now set left exceptions to non-stop and clear all exception flags. */
+ fpcsr &= ~(ENABLE_MASK_SUBOUT | FE_ALL_EXCEPT);
+ } else {
+ *envp = fpcsr;
+ fpcsr &= ~(ENABLE_MASK | FE_ALL_EXCEPT);
+ }
+ _FPU_SETCW (fpcsr);
+ return 0;
+}
+
+#define libc_feholdexcept libc_feholdexcept_nds32
+#define libc_feholdexceptf libc_feholdexcept_nds32
+#define libc_feholdexceptl libc_feholdexcept_nds32
+
+static __always_inline void
+libc_fesetround_nds32 (int round)
+{
+ int temp;
+
+ _FPU_GETCW (temp);
+ temp = (temp & ~ROUND_MOD_MASK) | round;
+ _FPU_SETCW (temp);
+}
+
+#define libc_fesetround libc_fesetround_nds32
+#define libc_fesetroundf libc_fesetround_nds32
+#define libc_fesetroundl libc_fesetround_nds32
+
+static __always_inline void
+libc_feholdexcept_setround_nds32 (fenv_t *envp, int round)
+{
+ libc_feholdexcept_nds32 (envp);
+ libc_fesetround_nds32 (round);
+}
+
+#define libc_feholdexcept_setround libc_feholdexcept_setround_nds32
+#define libc_feholdexcept_setroundf libc_feholdexcept_setround_nds32
+#define libc_feholdexcept_setroundl libc_feholdexcept_setround_nds32
+
+static __always_inline int
+libc_fetestexcept_nds32 (int excepts)
+{
+ fexcept_t temp;
+
+ /* Get current exceptions. */
+ _FPU_GETCW(temp);
+
+ return temp & excepts & FE_ALL_EXCEPT;
+}
+
+#define libc_fetestexcept libc_fetestexcept_nds32
+#define libc_fetestexceptf libc_fetestexcept_nds32
+#define libc_fetestexceptl libc_fetestexcept_nds32
+
+static __always_inline int
+libc_fesetenv_nds32 (const fenv_t *envp)
+{
+ fpu_control_t fpcsr, fpcsr_new;
+ unsigned long int cmd = DISABLE_UDF_IEX_TRAP, act = FPU_MASK_SUBOUT;
+
+ _FPU_GETCW (fpcsr);
+
+ fpcsr_new = (fpcsr & (_FPU_ENV_RESERVED));
+
+ if (envp == FE_DFL_ENV)
+ fpcsr_new |= _FPU_DEFAULT;
+ else if (envp == FE_NOMASK_ENV) {
+ fpcsr_new |= _FPU_IEEE;
+ cmd = ENABLE_UDF_IEX_TRAP;
+ } else {
+ fpcsr_new |= (*envp & ~(_FPU_ENV_RESERVED));
+ /* At first, disable UDF and IEX trap. */
+ if (__KERNEL_SUPPORT_SUBNOR_OUTPUT) {
+ if (__fp_udfiex_crtl (cmd, act) < 0)
+ return -1;
+ }
+ /* Then, follow requirements to enable UDF and IEX trap. */
+ cmd = ENABLE_UDF_IEX_TRAP;
+ act = *envp & FPU_MASK_SUBOUT;
+ }
+
+ if (__KERNEL_SUPPORT_SUBNOR_OUTPUT) {
+ fpcsr_new |= FPU_MASK_SUBOUT;
+ if (__fp_udfiex_crtl (cmd, act) < 0)
+ return -1;
+ }
+ _FPU_SETCW (fpcsr_new);
+ return 0;
+}
+
+#define libc_fesetenv libc_fesetenv_nds32
+#define libc_fesetenvf libc_fesetenv_nds32
+#define libc_fesetenvl libc_fesetenv_nds32
+#define libc_feresetround_noex libc_fesetenv_nds32
+#define libc_feresetround_noexf libc_fesetenv_nds32
+#define libc_feresetround_noexl libc_fesetenv_nds32
+
+static __always_inline int
+libc_feupdateenv_test_nds32 (const fenv_t *envp, int ex)
+{
+ fpu_control_t fpcsr, fpcsr_new, old_exc;
+ unsigned long int cmd = DISABLE_UDF_IEX_TRAP, act = FPU_MASK_SUBOUT;
+ unsigned long int raise_exc;
+
+ _FPU_GETCW (fpcsr);
+ old_exc = fpcsr & FE_ALL_EXCEPT;
+ fpcsr_new = fpcsr & (_FPU_ENV_RESERVED | FE_ALL_EXCEPT);
+
+
+ if (envp == FE_DFL_ENV)
+ fpcsr_new |= _FPU_DEFAULT;
+ else if (envp == FE_NOMASK_ENV) {
+ fpcsr_new |= _FPU_IEEE;
+ cmd = ENABLE_UDF_IEX_TRAP;
+ } else {
+ fpcsr_new |= (*envp & ~_FPU_ENV_RESERVED);
+ /* At first, disable UDF and IEX trap. */
+ if (__KERNEL_SUPPORT_SUBNOR_OUTPUT) {
+ if (__fp_udfiex_crtl (cmd, act) < 0)
+ return -1;
+ }
+ /* Then, follow requirements to enable UDF and IEX trap. */
+ cmd = ENABLE_UDF_IEX_TRAP;
+ act = *envp & FPU_MASK_SUBOUT;
+ }
+
+ raise_exc = old_exc & (fpcsr_new >> ENABLE_SHIFT);
+
+ if (__KERNEL_SUPPORT_SUBNOR_OUTPUT) {
+ fpcsr_new |= FPU_MASK_SUBOUT;
+ if (__fp_udfiex_crtl (cmd, act) < 0)
+ return -1;
+ }
+
+ _FPU_SETCW (fpcsr_new);
+ if (raise_exc)
+ __feraiseexcept (raise_exc);
+ return old_exc & ex;
+}
+#define libc_feupdateenv_test libc_feupdateenv_test_nds32
+#define libc_feupdateenv_testf libc_feupdateenv_test_nds32
+#define libc_feupdateenv_testl libc_feupdateenv_test_nds32
+
+static __always_inline int
+libc_feupdateenv_nds32 (const fenv_t *envp)
+{
+ return libc_feupdateenv_test_nds32(envp, 0);
+}
+
+#define libc_feupdateenv libc_feupdateenv_nds32
+#define libc_feupdateenvf libc_feupdateenv_nds32
+#define libc_feupdateenvl libc_feupdateenv_nds32
+
+static __always_inline void
+libc_feholdsetround_nds32 (fenv_t *envp, int round)
+{
+ fpu_control_t fpcsr;
+
+ _FPU_GETCW (fpcsr);
+ *envp = fpcsr & ROUND_MOD_MASK;
+ fpcsr = (fpcsr & ~ROUND_MOD_MASK) | (round & ROUND_MOD_MASK);
+ _FPU_SETCW (fpcsr);
+}
+
+#define libc_feholdsetround libc_feholdsetround_nds32
+#define libc_feholdsetroundf libc_feholdsetround_nds32
+#define libc_feholdsetroundl libc_feholdsetround_nds32
+
+static __always_inline void
+libc_feresetround_nds32 (fenv_t *envp)
+{
+ int temp;
+
+ _FPU_GETCW (temp);
+ temp = (temp & ~ROUND_MOD_MASK) | (*envp & ROUND_MOD_MASK);
+ _FPU_SETCW (temp);
+}
+
+#define libc_feresetround libc_feresetround_nds32
+#define libc_feresetroundf libc_feresetround_nds32
+#define libc_feresetroundl libc_feresetround_nds32
+
+
+#include_next <fenv_private.h>
+
+#endif
diff --git a/sysdeps/nds32/fpu/fesetenv.c b/sysdeps/nds32/fpu/fesetenv.c
new file mode 100644
index 0000000..0885b5a
--- /dev/null
+++ b/sysdeps/nds32/fpu/fesetenv.c
@@ -0,0 +1,30 @@
+/* Install given floating-point environment. Andes nds32 version.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public License as
+ published by the Free Software Foundation; either version 2.1 of the
+ License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include <fenv_private.h>
+
+int
+__fesetenv (const fenv_t *envp)
+{
+ return libc_fesetenv_nds32(envp);
+}
+libm_hidden_def (__fesetenv)
+weak_alias (__fesetenv, fesetenv)
+libm_hidden_weak (fesetenv)
diff --git a/sysdeps/nds32/fpu/fesetexcept.c b/sysdeps/nds32/fpu/fesetexcept.c
new file mode 100644
index 0000000..0999902
--- /dev/null
+++ b/sysdeps/nds32/fpu/fesetexcept.c
@@ -0,0 +1,34 @@
+/* Set given exception flags.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <fenv.h>
+#include <fpu_control.h>
+
+int
+fesetexcept (int excepts)
+{
+ int fpsr;
+ int fpsr_new;
+
+ _FPU_GETCW (fpsr);
+ fpsr_new = fpsr | (excepts & FE_ALL_EXCEPT);
+ if (fpsr != fpsr_new)
+ _FPU_SETCW (fpsr_new);
+
+ return 0;
+}
diff --git a/sysdeps/nds32/fpu/fesetmode.c b/sysdeps/nds32/fpu/fesetmode.c
new file mode 100644
index 0000000..698f71c
--- /dev/null
+++ b/sysdeps/nds32/fpu/fesetmode.c
@@ -0,0 +1,53 @@
+/* Install given floating-point control modes. Andes nds32 version.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include <fenv_private.h>
+
+int
+fesetmode (const femode_t *modep)
+{
+ fpu_control_t fpcsr, new_fpcsr;
+ int cmd = DISABLE_UDF_IEX_TRAP, act = FPU_MASK_SUBOUT;
+
+ _FPU_GETCW (fpcsr);
+ new_fpcsr = fpcsr & _FPU_MOD_RESERVED;
+
+ if (modep == FE_DFL_MODE)
+ new_fpcsr |= _FPU_DEFAULT;
+ else {
+ new_fpcsr |= (*modep & ~_FPU_MOD_RESERVED);
+ /* At first, disable UDF and IEX trap. */
+ if (__KERNEL_SUPPORT_SUBNOR_OUTPUT) {
+ if (__fp_udfiex_crtl (cmd, act) < 0)
+ return -1;
+ }
+ cmd = ENABLE_UDF_IEX_TRAP;
+ act = *modep & FPU_MASK_SUBOUT;
+ }
+
+ if (__KERNEL_SUPPORT_SUBNOR_OUTPUT) {
+ new_fpcsr |= FPU_MASK_SUBOUT;
+ if (__fp_udfiex_crtl (cmd, act) < 0)
+ return -1;
+ }
+
+ _FPU_SETCW (new_fpcsr);
+ return 0;
+}
diff --git a/sysdeps/nds32/fpu/fesetround.c b/sysdeps/nds32/fpu/fesetround.c
new file mode 100644
index 0000000..d3ac176
--- /dev/null
+++ b/sysdeps/nds32/fpu/fesetround.c
@@ -0,0 +1,35 @@
+/* Set current rounding direction. Andes nds32 version.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public License as
+ published by the Free Software Foundation; either version 2.1 of the
+ License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <fenv.h>
+#include <fenv_private.h>
+#include <fpu_control.h>
+
+int
+__fesetround (int round)
+{
+ if ((round & ~0x3) != 0)
+ /* ROUND is no valid rounding mode. */
+ return 1;
+
+ libc_fesetround_nds32 (round);
+ return 0;
+}
+libm_hidden_def (__fesetround)
+weak_alias (__fesetround, fesetround)
+libm_hidden_weak (fesetround)
diff --git a/sysdeps/nds32/fpu/feupdateenv.c b/sysdeps/nds32/fpu/feupdateenv.c
new file mode 100644
index 0000000..95d2e2a
--- /dev/null
+++ b/sysdeps/nds32/fpu/feupdateenv.c
@@ -0,0 +1,31 @@
+/* Install given floating-point environment and raise exceptions.
+ Andes nds32 version.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public License as
+ published by the Free Software Foundation; either version 2.1 of the
+ License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include <fenv_private.h>
+
+int
+__feupdateenv (const fenv_t *envp)
+{
+ return libc_feupdateenv_nds32 (envp);
+}
+libm_hidden_def (__feupdateenv)
+weak_alias (__feupdateenv, feupdateenv)
+libm_hidden_weak (feupdateenv)
diff --git a/sysdeps/nds32/fpu/fgetexcptflg.c b/sysdeps/nds32/fpu/fgetexcptflg.c
new file mode 100644
index 0000000..f8e2332
--- /dev/null
+++ b/sysdeps/nds32/fpu/fgetexcptflg.c
@@ -0,0 +1,27 @@
+/* Store current representation for exceptions. Andes nds32 version.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public License as
+ published by the Free Software Foundation; either version 2.1 of the
+ License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <fenv.h>
+#include <fenv_private.h>
+
+int
+fegetexceptflag (fexcept_t *flagp, int excepts)
+{
+ *flagp = libc_fetestexcept_nds32 (excepts);
+ return 0;
+}
diff --git a/sysdeps/nds32/fpu/fix-fp-int-compare-invalid.h b/sysdeps/nds32/fpu/fix-fp-int-compare-invalid.h
new file mode 100644
index 0000000..81e086a
--- /dev/null
+++ b/sysdeps/nds32/fpu/fix-fp-int-compare-invalid.h
@@ -0,0 +1,25 @@
+/* Fix for missing "invalid" exceptions from floating-point comparisons.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef FIX_FP_INT_COMPARE_INVALID_H
+#define FIX_FP_INT_COMPARE_INVALID_H 1
+
+#define FIX_COMPARE_INVALID 1
+
+#endif /* FIX_FP_INT_COMPARE_INVALID_H. */
+
diff --git a/sysdeps/nds32/fpu/fix-fp-int-convert-overflow.h b/sysdeps/nds32/fpu/fix-fp-int-convert-overflow.h
new file mode 100644
index 0000000..8b393e3
--- /dev/null
+++ b/sysdeps/nds32/fpu/fix-fp-int-convert-overflow.h
@@ -0,0 +1,34 @@
+/* Fix for conversion of floating point to integer overflow.
+ Andes nds32 version.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef FIX_FP_INT_CONVERT_OVERFLOW_H
+#define FIX_FP_INT_CONVERT_OVERFLOW_H 1
+
+/* Define these macros to 1 to workaround conversions of out-of-range
+ floating-point numbers to integer types failing to raise the
+ "invalid" exception, or raising spurious "inexact" or other
+ exceptions. */
+#define FIX_FLT_LONG_CONVERT_OVERFLOW 1
+#define FIX_FLT_LLONG_CONVERT_OVERFLOW 1
+#define FIX_DBL_LONG_CONVERT_OVERFLOW 1
+#define FIX_DBL_LLONG_CONVERT_OVERFLOW 1
+#define FIX_LDBL_LONG_CONVERT_OVERFLOW 0
+#define FIX_LDBL_LLONG_CONVERT_OVERFLOW 0
+
+#endif /* fix-fp-int-convert-overflow.h */
diff --git a/sysdeps/nds32/fpu/fpu_control.h b/sysdeps/nds32/fpu/fpu_control.h
new file mode 100644
index 0000000..8a3989d
--- /dev/null
+++ b/sysdeps/nds32/fpu/fpu_control.h
@@ -0,0 +1,104 @@
+/* FPU control word bits. Andes nds32 version.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef _FPU_CONTROL_H
+
+#include <asm/fp_udfiex_crtl.h>
+/*
+ * Andes Floating-Point Control Status Register
+ * 31-20 -> Reserved
+ * 19 -> RIT (RO)
+ * 18 -> DNIT(RO)
+ * 17 -> IEXT(RO)
+ * 16 -> UDFT(RO)
+ * 15 -> OVFT(RO)
+ * 14 -> DBZT(RO)
+ * 13 -> IVOT(RO)
+ * 12 -> DNZ(RW),Denormalized flush-to-Zero mode.
+ * 11 -> IEXE(RW),IEEE Ineaxct (IEX) exception trapping enable.
+ * 10 -> UDFE(RW),IEEE Underflow (UDF) exception trapping enable.
+ * 9 -> OVFE(RW),IEEE Overflow (OVF) exception trapping enable.
+ * 8 -> DBZE(RW),IEEE Divide by Zero (DBZ) exception trapping enable.
+ * 7 -> IVOE(RW),IEEE Invalid Operation (IVO) exception trapping enable.
+ * 6 -> IEX(RW),IEEE Inexact (IEX) cumulative exception flag.
+ * 5 -> UDF(RW),IEEE Underflow (UDF) cumulative exception flag.
+ * 4 -> OVF(RW),IEEE Overflow (OVF) cumulative exception flag.
+ * 3 -> DBZ(RW),IEEE Divide by Zero (DBZ) cumulative exception flag.
+ * 2 -> IVO(RW),IEEE Invalid Operation (IVO) cumulative exception flag.
+ * 1-0 -> Rounding modes.
+ *
+ * Rounding modes.
+ * 00 - rounding to nearest (RN)
+ * 01 - rounding (up) toward plus infinity (RP)
+ * 10 - rounding (down)toward minus infinity (RM)
+ * 11 - rounding toward zero (RZ)
+ *
+ */
+
+#define ROUND_MOD_MASK 0x3
+
+/* Mask for enabling exceptions and for the CAUSE bits. */
+#define ENABLE_MASK (_FPU_MASK_IEX | _FPU_MASK_OVF | \
+ _FPU_MASK_DBZ | _FPU_MASK_IVO | \
+ _FPU_MASK_UDF)
+
+
+/* Shift for FE_* flags to get up to the ENABLE bits. */
+#define ENABLE_SHIFT 5
+
+
+/* masking of interrupts. */
+#define _FPU_MASK_IEX 0x0800 /* Invalid operation. */
+#define _FPU_MASK_UDF 0x0400 /* Underflow. */
+#define _FPU_MASK_OVF 0x0200 /* Overflow. */
+#define _FPU_MASK_DBZ 0x0100 /* Division by zero. */
+#define _FPU_MASK_IVO 0x0080 /* Invalid operation. */
+
+
+#define _FPU_ENV_RESERVED (0xffffe000 | __fpu_control)
+#define _FPU_MOD_RESERVED (0xffffe07c | __fpu_control)
+#define _FPU_RESERVED _FPU_MOD_RESERVED
+#define _FPU_DEFAULT 0x00000000
+
+/* Default + exceptions enabled. */
+#define _FPU_IEEE (_FPU_DEFAULT | 0x00000f80)
+
+/* Type of the control word. */
+typedef unsigned int fpu_control_t;
+
+/* Default control word set at startup. */
+extern fpu_control_t __fpu_control;
+
+
+
+
+#define ENABLE_MASK_SUBOUT (_FPU_MASK_OVF | _FPU_MASK_DBZ | _FPU_MASK_IVO)
+#define FPU_MASK_SUBOUT (_FPU_MASK_IEX | _FPU_MASK_UDF)
+#define _FPU_DEFAULT_SUPPORT_SUBNORMAL_OUTPUT FPU_MASK_SUBOUT
+#define __KERNEL_SUPPORT_SUBNOR_OUTPUT \
+ (__fpu_control == _FPU_DEFAULT_SUPPORT_SUBNORMAL_OUTPUT)
+
+/* Macros for accessing the hardware control word. */
+/* This is fmrx %0, fpscr. */
+#define _FPU_GETCW(cw) \
+ __asm__ __volatile__ ("fmfcsr\t %0\n\t" : "=r" (cw))
+/* This is fmxr fpscr, %0. */
+#define _FPU_SETCW(cw) \
+ __asm__ __volatile__ ("fmtcsr\t %0\n\t": : "r" (cw))
+
+#endif /* _FPU_CONTROL_H. */
diff --git a/sysdeps/nds32/fpu/fraiseexcpt.c b/sysdeps/nds32/fpu/fraiseexcpt.c
new file mode 100644
index 0000000..daaf246
--- /dev/null
+++ b/sysdeps/nds32/fpu/fraiseexcpt.c
@@ -0,0 +1,100 @@
+/* Raise given exceptions.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public License as
+ published by the Free Software Foundation; either version 2.1 of the
+ License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include <float.h>
+
+int
+__feraiseexcept (int excepts)
+{
+ float temp1 = 0.0, temp2 = 1.0;
+ if (FE_INVALID & excepts)
+ {
+ asm volatile(
+ "fmtsr\t %0, $fs0\n\t"
+ "fdivs\t $fs0, $fs0, $fs0\n\t"
+ :
+ :"r"(temp1)
+ :"$fs0"
+ );
+ }
+ if (FE_DIVBYZERO & excepts)
+ {
+ asm volatile(
+ "fmtsr\t %0, $fs0\n\t"
+ "fmtsr\t %1, $fs1\n\t"
+ "fdivs\t $fs0, $fs1, $fs0\n\t"
+ :
+ :"r"(temp1),"r"(temp2)
+ :"$fs0"
+ );
+ }
+ if (FE_OVERFLOW & excepts)
+ {
+ /* There's no way to raise overflow without also raising inexact. */
+ unsigned int fpcsr;
+ temp1 = FLT_MAX;
+ asm volatile(
+ "fmfcsr\t %0\n\t"
+ "fmtsr\t %1, $fs0\n\t"
+ "fadds\t $fs0, $fs0, $fs0\n\t"
+ "ori\t %0,%0,0x10\n\t"
+ "fmtcsr\t %0\n\t"
+ :"=&r"(fpcsr)
+ :"r"(temp1)
+ :"$fs0"
+ );
+ }
+ if (FE_UNDERFLOW & excepts)
+ {
+ /* There's no way to raise underflow without also raising inexact. */
+ unsigned int fpcsr;
+ temp1 = FLT_MIN;
+ temp2 = 3.0;
+ asm volatile(
+ "fmfcsr\t %0\n\t"
+ "fmtsr\t %1, $fs0\n\t"
+ "fmtsr\t %2, $fs1\n\t"
+ "fdivs\t $fs1, $fs0, $fs1\n\t"
+ "ori\t %0,%0,0x20\n\t"
+ "fmtcsr\t %0\n\t"
+ :"=&r"(fpcsr)
+ :"r"(temp1),"r"(temp2)
+ :"$fs0","$fs1"
+ );
+ }
+ if (FE_INEXACT & excepts)
+ {
+ temp1 = 1.0;
+ temp2 = 3.0;
+ asm volatile(
+ "fmtsr\t %0, $fs0\n\t"
+ "fmtsr\t %1, $fs1\n\t"
+ "fdivs\t $fs1, $fs0, $fs1\n\t"
+ :
+ :"r"(temp1),"r"(temp2)
+ :"$fs0","$fs1"
+ );
+ }
+
+ return 0;
+}
+libm_hidden_def (__feraiseexcept)
+weak_alias (__feraiseexcept, feraiseexcept)
+libm_hidden_weak (feraiseexcept)
diff --git a/sysdeps/nds32/fpu/fsetexcptflg.c b/sysdeps/nds32/fpu/fsetexcptflg.c
new file mode 100644
index 0000000..d13365b
--- /dev/null
+++ b/sysdeps/nds32/fpu/fsetexcptflg.c
@@ -0,0 +1,39 @@
+/* Set floating-point environment exception handling.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public License as
+ published by the Free Software Foundation; either version 2.1 of the
+ License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <fenv.h>
+#include <fpu_control.h>
+
+int
+fesetexceptflag (const fexcept_t *flagp, int excepts)
+{
+ fexcept_t temp;
+
+ /* Get the current environment. */
+ _FPU_GETCW (temp);
+
+ /* Set the desired exception mask. */
+ temp &= ~(excepts & FE_ALL_EXCEPT);
+ temp |= (*flagp & excepts & FE_ALL_EXCEPT);
+
+ /* Save state back to the FPU. */
+ _FPU_SETCW (temp);
+
+ /* Success. */
+ return 0;
+}
diff --git a/sysdeps/nds32/fpu/ftestexcept.c b/sysdeps/nds32/fpu/ftestexcept.c
new file mode 100644
index 0000000..287685d
--- /dev/null
+++ b/sysdeps/nds32/fpu/ftestexcept.c
@@ -0,0 +1,27 @@
+/* Test exception in current environment. Andes nds32 version.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public License as
+ published by the Free Software Foundation; either version 2.1 of the
+ License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <fenv.h>
+#include <fenv_private.h>
+
+int
+fetestexcept (int excepts)
+{
+ return libc_fetestexcept_nds32 (excepts);
+}
+libm_hidden_def (fetestexcept)
diff --git a/sysdeps/nds32/fpu/get-rounding-mode.h b/sysdeps/nds32/fpu/get-rounding-mode.h
new file mode 100644
index 0000000..c0d25d9
--- /dev/null
+++ b/sysdeps/nds32/fpu/get-rounding-mode.h
@@ -0,0 +1,39 @@
+/* Determine floating-point rounding mode within libc.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef _NDS32_GET_ROUNDING_MODE_H
+#define _NDS32_GET_ROUNDING_MODE_H 1
+
+#include <fenv.h>
+#include <fpu_control.h>
+
+/* Return the floating-point rounding mode. */
+
+static inline int
+get_rounding_mode (void)
+{
+ unsigned int temp;
+
+ /* Get the current environment. */
+ _FPU_GETCW (temp);
+
+ return temp & 0x3;
+
+}
+
+#endif /* _NDS32_GET_ROUNDING_MODE_H. */
diff --git a/sysdeps/nds32/fpu/libm-test-ulps b/sysdeps/nds32/fpu/libm-test-ulps
new file mode 100644
index 0000000..e596401
--- /dev/null
+++ b/sysdeps/nds32/fpu/libm-test-ulps
@@ -0,0 +1,1643 @@
+# Begin of automatic generation
+
+# Maximal error of functions:
+Function: "acos":
+float: 1
+ifloat: 1
+
+Function: "acos_downward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "acos_towardzero":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "acos_upward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "acosh":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "acosh_downward":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "acosh_towardzero":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "acosh_upward":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "asin":
+float: 1
+ifloat: 1
+
+Function: "asin_downward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "asin_towardzero":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "asin_upward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "asinh":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "asinh_downward":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: "asinh_towardzero":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "asinh_upward":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: "atan":
+float: 1
+ifloat: 1
+
+Function: "atan2":
+float: 1
+ifloat: 1
+
+Function: "atan2_downward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: "atan2_towardzero":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: "atan2_upward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: "atan_downward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: "atan_towardzero":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "atan_upward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: "atanh":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "atanh_downward":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: "atanh_towardzero":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "atanh_upward":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: "cabs":
+double: 1
+idouble: 1
+
+Function: "cabs_downward":
+double: 1
+idouble: 1
+
+Function: "cabs_towardzero":
+double: 1
+idouble: 1
+
+Function: "cabs_upward":
+double: 1
+idouble: 1
+
+Function: Real part of "cacos":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Imaginary part of "cacos":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Real part of "cacos_downward":
+double: 3
+float: 2
+idouble: 3
+ifloat: 2
+
+Function: Imaginary part of "cacos_downward":
+double: 5
+float: 3
+idouble: 5
+ifloat: 3
+
+Function: Real part of "cacos_towardzero":
+double: 3
+float: 2
+idouble: 3
+ifloat: 2
+
+Function: Imaginary part of "cacos_towardzero":
+double: 4
+float: 2
+idouble: 4
+ifloat: 2
+
+Function: Real part of "cacos_upward":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Imaginary part of "cacos_upward":
+double: 5
+float: 7
+idouble: 5
+ifloat: 7
+
+Function: Real part of "cacosh":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Imaginary part of "cacosh":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Real part of "cacosh_downward":
+double: 4
+float: 2
+idouble: 4
+ifloat: 2
+
+Function: Imaginary part of "cacosh_downward":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: Real part of "cacosh_towardzero":
+double: 4
+float: 2
+idouble: 4
+ifloat: 2
+
+Function: Imaginary part of "cacosh_towardzero":
+double: 3
+float: 2
+idouble: 3
+ifloat: 2
+
+Function: Real part of "cacosh_upward":
+double: 4
+float: 3
+idouble: 4
+ifloat: 3
+
+Function: Imaginary part of "cacosh_upward":
+double: 3
+float: 2
+idouble: 3
+ifloat: 2
+
+Function: "carg":
+float: 1
+ifloat: 1
+
+Function: "carg_downward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: "carg_towardzero":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: "carg_upward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Real part of "casin":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Imaginary part of "casin":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Real part of "casin_downward":
+double: 3
+float: 2
+idouble: 3
+ifloat: 2
+
+Function: Imaginary part of "casin_downward":
+double: 5
+float: 3
+idouble: 5
+ifloat: 3
+
+Function: Real part of "casin_towardzero":
+double: 3
+float: 1
+idouble: 3
+ifloat: 1
+
+Function: Imaginary part of "casin_towardzero":
+double: 4
+float: 2
+idouble: 4
+ifloat: 2
+
+Function: Real part of "casin_upward":
+double: 3
+float: 2
+idouble: 3
+ifloat: 2
+
+Function: Imaginary part of "casin_upward":
+double: 5
+float: 7
+idouble: 5
+ifloat: 7
+
+Function: Real part of "casinh":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Imaginary part of "casinh":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "casinh_downward":
+double: 5
+float: 3
+idouble: 5
+ifloat: 3
+
+Function: Imaginary part of "casinh_downward":
+double: 3
+float: 2
+idouble: 3
+ifloat: 2
+
+Function: Real part of "casinh_towardzero":
+double: 4
+float: 2
+idouble: 4
+ifloat: 2
+
+Function: Imaginary part of "casinh_towardzero":
+double: 3
+float: 1
+idouble: 3
+ifloat: 1
+
+Function: Real part of "casinh_upward":
+double: 5
+float: 7
+idouble: 5
+ifloat: 7
+
+Function: Imaginary part of "casinh_upward":
+double: 3
+float: 2
+idouble: 3
+ifloat: 2
+
+Function: Real part of "catan":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Imaginary part of "catan":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "catan_downward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Imaginary part of "catan_downward":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Real part of "catan_towardzero":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Imaginary part of "catan_towardzero":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Real part of "catan_upward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Imaginary part of "catan_upward":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Real part of "catanh":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Imaginary part of "catanh":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "catanh_downward":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Imaginary part of "catanh_downward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Real part of "catanh_towardzero":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Imaginary part of "catanh_towardzero":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Real part of "catanh_upward":
+double: 4
+float: 4
+idouble: 4
+ifloat: 4
+
+Function: Imaginary part of "catanh_upward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "cbrt":
+double: 3
+float: 1
+idouble: 3
+ifloat: 1
+
+Function: "cbrt_downward":
+double: 4
+float: 1
+idouble: 4
+ifloat: 1
+
+Function: "cbrt_towardzero":
+double: 3
+float: 1
+idouble: 3
+ifloat: 1
+
+Function: "cbrt_upward":
+double: 5
+float: 1
+idouble: 5
+ifloat: 1
+
+Function: Real part of "ccos":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Imaginary part of "ccos":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "ccos_downward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Imaginary part of "ccos_downward":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: Real part of "ccos_towardzero":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Imaginary part of "ccos_towardzero":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: Real part of "ccos_upward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Imaginary part of "ccos_upward":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Real part of "ccosh":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Imaginary part of "ccosh":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "ccosh_downward":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Imaginary part of "ccosh_downward":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: Real part of "ccosh_towardzero":
+double: 2
+float: 3
+idouble: 2
+ifloat: 3
+
+Function: Imaginary part of "ccosh_towardzero":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: Real part of "ccosh_upward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Imaginary part of "ccosh_upward":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Real part of "cexp":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+
+Function: Imaginary part of "cexp":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Real part of "cexp_downward":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Imaginary part of "cexp_downward":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: Real part of "cexp_towardzero":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Imaginary part of "cexp_towardzero":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: Real part of "cexp_upward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Imaginary part of "cexp_upward":
+double: 3
+float: 2
+idouble: 3
+ifloat: 2
+
+Function: Real part of "clog":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: Imaginary part of "clog":
+float: 1
+ifloat: 1
+
+Function: Real part of "clog10":
+double: 3
+float: 4
+idouble: 3
+ifloat: 4
+
+Function: Imaginary part of "clog10":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Real part of "clog10_downward":
+double: 5
+float: 5
+idouble: 5
+ifloat: 5
+
+Function: Imaginary part of "clog10_downward":
+double: 2
+float: 4
+idouble: 2
+ifloat: 4
+
+Function: Real part of "clog10_towardzero":
+double: 5
+float: 5
+idouble: 5
+ifloat: 5
+
+Function: Imaginary part of "clog10_towardzero":
+double: 2
+float: 4
+idouble: 2
+ifloat: 4
+
+Function: Real part of "clog10_upward":
+double: 6
+float: 5
+idouble: 6
+ifloat: 5
+
+Function: Imaginary part of "clog10_upward":
+double: 2
+float: 4
+idouble: 2
+ifloat: 4
+
+Function: Real part of "clog_downward":
+double: 4
+float: 3
+idouble: 4
+ifloat: 3
+
+Function: Imaginary part of "clog_downward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Real part of "clog_towardzero":
+double: 4
+float: 4
+idouble: 4
+ifloat: 4
+
+Function: Imaginary part of "clog_towardzero":
+double: 1
+float: 3
+idouble: 1
+ifloat: 3
+
+Function: Real part of "clog_upward":
+double: 4
+float: 3
+idouble: 4
+ifloat: 3
+
+Function: Imaginary part of "clog_upward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: "cos":
+double: 1
+idouble: 1
+
+Function: "cos_downward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "cos_towardzero":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "cos_upward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "cosh":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "cosh_downward":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+
+Function: "cosh_towardzero":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+
+Function: "cosh_upward":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Real part of "cpow":
+double: 2
+float: 5
+idouble: 2
+ifloat: 5
+
+Function: Imaginary part of "cpow":
+float: 2
+ifloat: 2
+
+Function: Real part of "cpow_downward":
+double: 5
+float: 8
+idouble: 5
+ifloat: 8
+
+Function: Imaginary part of "cpow_downward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Real part of "cpow_towardzero":
+double: 5
+float: 8
+idouble: 5
+ifloat: 8
+
+Function: Imaginary part of "cpow_towardzero":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Real part of "cpow_upward":
+double: 4
+float: 1
+idouble: 4
+ifloat: 1
+
+Function: Imaginary part of "cpow_upward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Real part of "csin":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "csin_downward":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: Imaginary part of "csin_downward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "csin_towardzero":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: Imaginary part of "csin_towardzero":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "csin_upward":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Imaginary part of "csin_upward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Real part of "csinh":
+float: 1
+ifloat: 1
+
+Function: Imaginary part of "csinh":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "csinh_downward":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+
+Function: Imaginary part of "csinh_downward":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: Real part of "csinh_towardzero":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Imaginary part of "csinh_towardzero":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: Real part of "csinh_upward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Imaginary part of "csinh_upward":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Real part of "csqrt":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Imaginary part of "csqrt":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Real part of "csqrt_downward":
+double: 5
+float: 4
+idouble: 5
+ifloat: 4
+
+Function: Imaginary part of "csqrt_downward":
+double: 4
+float: 3
+idouble: 4
+ifloat: 3
+
+Function: Real part of "csqrt_towardzero":
+double: 4
+float: 3
+idouble: 4
+ifloat: 3
+
+Function: Imaginary part of "csqrt_towardzero":
+double: 4
+float: 3
+idouble: 4
+ifloat: 3
+
+Function: Real part of "csqrt_upward":
+double: 5
+float: 4
+idouble: 5
+ifloat: 4
+
+Function: Imaginary part of "csqrt_upward":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: Real part of "ctan":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Imaginary part of "ctan":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Real part of "ctan_downward":
+double: 6
+float: 5
+idouble: 6
+ifloat: 5
+
+Function: Imaginary part of "ctan_downward":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Real part of "ctan_towardzero":
+double: 5
+float: 3
+idouble: 5
+ifloat: 3
+
+Function: Imaginary part of "ctan_towardzero":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Real part of "ctan_upward":
+double: 2
+float: 4
+idouble: 2
+ifloat: 4
+
+Function: Imaginary part of "ctan_upward":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+
+Function: Real part of "ctanh":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Imaginary part of "ctanh":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Real part of "ctanh_downward":
+double: 4
+float: 2
+idouble: 4
+ifloat: 2
+
+Function: Imaginary part of "ctanh_downward":
+double: 6
+float: 5
+idouble: 6
+ifloat: 5
+
+Function: Real part of "ctanh_towardzero":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Imaginary part of "ctanh_towardzero":
+double: 5
+float: 3
+idouble: 5
+ifloat: 3
+
+Function: Real part of "ctanh_upward":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Imaginary part of "ctanh_upward":
+double: 2
+float: 3
+idouble: 2
+ifloat: 3
+
+Function: "erf":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "erf_downward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "erf_towardzero":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "erf_upward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "erfc":
+double: 3
+float: 2
+idouble: 3
+ifloat: 2
+
+Function: "erfc_downward":
+double: 5
+float: 6
+idouble: 5
+ifloat: 6
+
+Function: "erfc_towardzero":
+double: 3
+float: 4
+idouble: 3
+ifloat: 4
+
+Function: "erfc_upward":
+double: 5
+float: 6
+idouble: 5
+ifloat: 6
+
+Function: "exp10":
+double: 2
+idouble: 2
+
+Function: "exp10_downward":
+double: 3
+float: 1
+idouble: 3
+ifloat: 1
+
+Function: "exp10_towardzero":
+double: 3
+float: 1
+idouble: 3
+ifloat: 1
+
+Function: "exp10_upward":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+
+Function: "exp2":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "exp2_downward":
+double: 1
+idouble: 1
+
+Function: "exp2_towardzero":
+double: 1
+idouble: 1
+
+Function: "exp2_upward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "exp_downward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "exp_towardzero":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "exp_upward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "expm1":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "expm1_downward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "expm1_towardzero":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: "expm1_upward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "gamma":
+double: 4
+float: 3
+idouble: 4
+ifloat: 3
+
+Function: "gamma_downward":
+double: 5
+float: 4
+idouble: 5
+ifloat: 4
+
+Function: "gamma_towardzero":
+double: 5
+float: 4
+idouble: 5
+ifloat: 4
+
+Function: "gamma_upward":
+double: 5
+float: 5
+idouble: 5
+ifloat: 5
+
+Function: "hypot":
+double: 1
+float: 1
+idouble: 1
+
+Function: "hypot_downward":
+double: 1
+idouble: 1
+
+Function: "hypot_towardzero":
+double: 1
+idouble: 1
+
+Function: "hypot_upward":
+double: 1
+idouble: 1
+
+Function: "j0":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "j0_downward":
+double: 2
+float: 4
+idouble: 2
+ifloat: 4
+
+Function: "j0_towardzero":
+double: 3
+float: 2
+idouble: 3
+ifloat: 2
+
+Function: "j0_upward":
+double: 3
+float: 2
+idouble: 3
+ifloat: 2
+
+Function: "j1":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: "j1_downward":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: "j1_towardzero":
+double: 3
+float: 2
+idouble: 3
+ifloat: 2
+
+Function: "j1_upward":
+double: 3
+float: 5
+idouble: 3
+ifloat: 5
+
+Function: "jn":
+double: 4
+float: 4
+idouble: 4
+ifloat: 4
+
+Function: "jn_downward":
+double: 5
+float: 5
+idouble: 5
+ifloat: 5
+
+Function: "jn_towardzero":
+double: 5
+float: 5
+idouble: 5
+ifloat: 5
+
+Function: "jn_upward":
+double: 5
+float: 5
+idouble: 5
+ifloat: 5
+
+Function: "lgamma":
+double: 4
+float: 3
+idouble: 4
+ifloat: 3
+
+Function: "lgamma_downward":
+double: 5
+float: 4
+idouble: 5
+ifloat: 4
+
+Function: "lgamma_towardzero":
+double: 5
+float: 4
+idouble: 5
+ifloat: 4
+
+Function: "lgamma_upward":
+double: 5
+float: 5
+idouble: 5
+ifloat: 5
+
+Function: "log10":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "log10_downward":
+double: 2
+float: 3
+idouble: 2
+ifloat: 3
+
+Function: "log10_towardzero":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+
+Function: "log10_upward":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "log1p":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "log1p_downward":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "log1p_towardzero":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "log1p_upward":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "log2":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+
+Function: "log2_downward":
+double: 3
+idouble: 3
+
+Function: "log2_towardzero":
+double: 2
+idouble: 2
+
+Function: "log2_upward":
+double: 3
+idouble: 3
+
+Function: "pow":
+double: 1
+idouble: 1
+
+Function: "pow_downward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "pow_towardzero":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "pow_upward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "sin":
+double: 1
+idouble: 1
+
+Function: "sin_downward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "sin_towardzero":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "sin_upward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "sincos":
+double: 1
+idouble: 1
+
+Function: "sincos_downward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "sincos_towardzero":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "sincos_upward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "sinh":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "sinh_downward":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: "sinh_towardzero":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "sinh_upward":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: "tan":
+float: 1
+ifloat: 1
+
+Function: "tan_downward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: "tan_towardzero":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "tan_upward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "tanh":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "tanh_downward":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: "tanh_towardzero":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "tanh_upward":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: "tgamma":
+double: 5
+float: 4
+idouble: 5
+ifloat: 4
+
+Function: "tgamma_downward":
+double: 5
+float: 5
+idouble: 5
+ifloat: 5
+
+Function: "tgamma_towardzero":
+double: 5
+float: 4
+idouble: 5
+ifloat: 4
+
+Function: "tgamma_upward":
+double: 4
+float: 4
+idouble: 4
+ifloat: 4
+
+Function: "y0":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+
+Function: "y0_downward":
+double: 3
+float: 4
+idouble: 3
+ifloat: 4
+
+Function: "y0_towardzero":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: "y0_upward":
+double: 3
+float: 5
+idouble: 3
+ifloat: 5
+
+Function: "y1":
+double: 3
+float: 2
+idouble: 3
+ifloat: 2
+
+Function: "y1_downward":
+double: 3
+float: 2
+idouble: 3
+ifloat: 2
+
+Function: "y1_towardzero":
+double: 3
+float: 2
+idouble: 3
+ifloat: 2
+
+Function: "y1_upward":
+double: 7
+float: 2
+idouble: 7
+ifloat: 2
+
+Function: "yn":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: "yn_downward":
+double: 3
+float: 4
+idouble: 3
+ifloat: 4
+
+Function: "yn_towardzero":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: "yn_upward":
+double: 4
+float: 5
+idouble: 4
+ifloat: 5
+
+# end of automatic generation
diff --git a/sysdeps/nds32/fpu/libm-test-ulps-name b/sysdeps/nds32/fpu/libm-test-ulps-name
new file mode 100644
index 0000000..14413f6
--- /dev/null
+++ b/sysdeps/nds32/fpu/libm-test-ulps-name
@@ -0,0 +1 @@
+nds32
diff --git a/sysdeps/nds32/fpu/math-barriers.h b/sysdeps/nds32/fpu/math-barriers.h
new file mode 100644
index 0000000..aba7ff0
--- /dev/null
+++ b/sysdeps/nds32/fpu/math-barriers.h
@@ -0,0 +1,27 @@
+/* Control when floating-point expressions are evaluated.
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef NDS32_MATH_BARRIERS_H
+#define NDS32_MATH_BARRIERS_H 1
+
+#define math_opt_barrier(x) \
+ ({ __typeof (x) __x = (x); __asm ("" : "+f" (__x)); __x; })
+#define math_force_eval(x) \
+ ({ __typeof (x) __x = (x); __asm __volatile__ ("" : : "f" (__x)); })
+
+#endif
diff --git a/sysdeps/nds32/nofpu/libm-test-ulps b/sysdeps/nds32/nofpu/libm-test-ulps
new file mode 100644
index 0000000..d753dbe
--- /dev/null
+++ b/sysdeps/nds32/nofpu/libm-test-ulps
@@ -0,0 +1,390 @@
+# Begin of automatic generation
+
+# Maximal error of functions:
+Function: "acos":
+float: 1
+ifloat: 1
+
+Function: "acosh":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "asin":
+float: 1
+ifloat: 1
+
+Function: "asinh":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "atan":
+float: 1
+ifloat: 1
+
+Function: "atan2":
+float: 1
+ifloat: 1
+
+Function: "atanh":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "cabs":
+double: 1
+idouble: 1
+
+Function: Real part of "cacos":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Imaginary part of "cacos":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Real part of "cacosh":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Imaginary part of "cacosh":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: "carg":
+float: 1
+ifloat: 1
+
+Function: Real part of "casin":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Imaginary part of "casin":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Real part of "casinh":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Imaginary part of "casinh":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "catan":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Imaginary part of "catan":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "catanh":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Imaginary part of "catanh":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "cbrt":
+double: 3
+float: 1
+idouble: 3
+ifloat: 1
+
+Function: Real part of "ccos":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Imaginary part of "ccos":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "ccosh":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Imaginary part of "ccosh":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "cexp":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+
+Function: Imaginary part of "cexp":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Real part of "clog":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+Function: Imaginary part of "clog":
+float: 1
+ifloat: 1
+
+Function: Real part of "clog10":
+double: 3
+float: 4
+idouble: 4
+ifloat: 4
+
+Function: Imaginary part of "clog10":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "cos":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "cosh":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "cpow":
+double: 2
+float: 5
+idouble: 2
+ifloat: 5
+
+Function: Imaginary part of "cpow":
+float: 2
+ifloat: 2
+
+Function: Real part of "csin":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "csinh":
+float: 1
+ifloat: 1
+
+Function: Imaginary part of "csinh":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "csqrt":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Imaginary part of "csqrt":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Real part of "ctan":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Imaginary part of "ctan":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Real part of "ctanh":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Imaginary part of "ctanh":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "erf":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "erfc":
+double: 3
+float: 2
+idouble: 3
+ifloat: 2
+
+Function: "exp10":
+double: 2
+idouble: 2
+
+Function: "exp2":
+double: 1
+idouble: 1
+
+Function: "expm1":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "gamma":
+double: 4
+float: 3
+idouble: 4
+ifloat: 3
+
+Function: "hypot":
+double: 1
+idouble: 1
+
+Function: "j0":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "j1":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: "jn":
+double: 4
+float: 4
+idouble: 4
+ifloat: 4
+
+Function: "lgamma":
+double: 4
+float: 3
+idouble: 4
+ifloat: 3
+
+Function: "log10":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "log1p":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "log2":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+
+Function: "pow":
+double: 1
+idouble: 1
+
+Function: "sin":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "sincos":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "sinh":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "tan":
+float: 1
+ifloat: 1
+
+Function: "tanh":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "tgamma":
+double: 5
+float: 4
+idouble: 5
+ifloat: 4
+
+Function: "y0":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+
+Function: "y1":
+double: 3
+float: 2
+idouble: 3
+ifloat: 2
+
+Function: "yn":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+# end of automatic generation
diff --git a/sysdeps/nds32/nofpu/libm-test-ulps-name b/sysdeps/nds32/nofpu/libm-test-ulps-name
new file mode 100644
index 0000000..e136775
--- /dev/null
+++ b/sysdeps/nds32/nofpu/libm-test-ulps-name
@@ -0,0 +1 @@
+nds32 soft-fp
diff --git a/sysdeps/nds32/sfp-machine.h b/sysdeps/nds32/sfp-machine.h
new file mode 100644
index 0000000..4db8a9c
--- /dev/null
+++ b/sysdeps/nds32/sfp-machine.h
@@ -0,0 +1,68 @@
+/* Andes nds32 softfloat definitions
+ Copyright (C) 2018-2019 Free Software Foundation, Inc.
+ This file is part of GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define _FP_W_TYPE_SIZE 32
+#define _FP_W_TYPE unsigned long
+#define _FP_WS_TYPE signed long
+#define _FP_I_TYPE long
+
+#define _FP_MUL_MEAT_S(R,X,Y) \
+ _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_D(R,X,Y) \
+ _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_Q(R,X,Y) \
+ _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_MUL_MEAT_DW_S(R,X,Y) \
+ _FP_MUL_MEAT_DW_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_DW_D(R,X,Y) \
+ _FP_MUL_MEAT_DW_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_DW_Q(R,X,Y) \
+ _FP_MUL_MEAT_DW_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_loop(S,R,X,Y)
+#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y)
+#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y)
+
+#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)
+#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1
+#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
+#define _FP_NANSIGN_S 0
+#define _FP_NANSIGN_D 0
+#define _FP_NANSIGN_Q 0
+
+#define _FP_KEEPNANFRACP 1
+#define _FP_QNANNEGATEDP 0
+
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
+ do { \
+ if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs) \
+ && !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)) \
+ { \
+ R##_s = Y##_s; \
+ _FP_FRAC_COPY_##wc(R,Y); \
+ } \
+ else \
+ { \
+ R##_s = X##_s; \
+ _FP_FRAC_COPY_##wc(R,X); \
+ } \
+ R##_c = FP_CLS_NAN; \
+ } while (0)
+
+#define _FP_TININESS_AFTER_ROUNDING 1
diff --git a/sysdeps/nds32/tininess.h b/sysdeps/nds32/tininess.h
new file mode 100644
index 0000000..1db3779
--- /dev/null
+++ b/sysdeps/nds32/tininess.h
@@ -0,0 +1 @@
+#define TININESS_AFTER_ROUNDING 1
--
1.9.5