Re: [PATCH] Remove support for PowerPC e500 / SPE ISA extension.

[Joseph Myers <joseph at codesourcery dot com>]

On Thu, 16 May 2019, Segher Boessenkool wrote:

> It didn't.  It removed support for the SPE vector extensions only.

And -mfloat-gprs=*, which goes along with them (support for having one but 
not the other in GCC was always more or less theoretical and tended to 
produce strangely broken ABIs if you tried such option combinations, 
especially -mfloat-gprs=* without -mabi=spe).

> In glibc, e500 might be pretty much equal to SPE, of course.

The support in glibc was both for the 64-bit registers, in functions such 
as setjmp/longjmp, and for the (scalar) e500 FPU (which has many 
peculiarities, including at least one documented erratum resulting in some 
glibc tests failing with wrong signs of zero results, at least one 
undocumented issue resulting in wrong exceptions in certain cases without 
kernel trap handlers being called to fix things up, and at least one 
design issue in the interface to trap handlers meaning that for certain 
instructions the kernel simply doesn't always have the information 
available in trap handlers to be able to fix up results for IEEE 
semantics).  The vector extensions themselves aren't of much relevance to 
glibc.

The ABI in the glibc port was, by design, the same ABI as for non-e500 
soft-float (same symbols and symbol versions, same function-calling ABI, 
same FE_* constants - which soft-float takes from classic hard-float - 
complete with logic to map between those and the different layout used in 
the SPEFSCR), so a program built for e500 and not relying on the hardware 
floating-point environment should be able to run with a normal soft-float 
glibc.

(Aldy's old SPE add-on c. 2003/4 did have some extra functions and ABI 
differences, but those weren't in the support integrated into glibc.)

-- 
Joseph S. Myers
joseph@codesourcery.com