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Re: [PATCH 1/4] glibc: Perform rseq(2) registration at C startup and thread creation (v7)
- From: Mathieu Desnoyers <mathieu dot desnoyers at efficios dot com>
- To: Alan Modra <amodra at gmail dot com>
- Cc: Michael Ellerman <mpe at ellerman dot id dot au>, Carlos O'Donell <codonell at redhat dot com>, Tulio Magno Quites Machado Filho <tuliom at ascii dot art dot br>, Florian Weimer <fweimer at redhat dot com>, Michael Meissner <meissner at linux dot ibm dot com>, Peter Bergner <bergner at vnet dot ibm dot com>, Paul Burton <paul dot burton at mips dot com>, Will Deacon <will dot deacon at arm dot com>, Boqun Feng <boqun dot feng at gmail dot com>, heiko carstens <heiko dot carstens at de dot ibm dot com>, gor <gor at linux dot ibm dot com>, schwidefsky <schwidefsky at de dot ibm dot com>, "Russell King, ARM Linux" <linux at armlinux dot org dot uk>, Benjamin Herrenschmidt <benh at kernel dot crashing dot org>, Paul Mackerras <paulus at samba dot org>, carlos <carlos at redhat dot com>, Joseph Myers <joseph at codesourcery dot com>, Szabolcs Nagy <szabolcs dot nagy at arm dot com>, libc-alpha <libc-alpha at sourceware dot org>, Thomas Gleixner <tglx at linutronix dot de>, Ben Maurer <bmaurer at fb dot com>, Peter Zijlstra <peterz at infradead dot org>, "Paul E. McKenney" <paulmck at linux dot vnet dot ibm dot com>, Dave Watson <davejwatson at fb dot com>, Paul Turner <pjt at google dot com>, Rich Felker <dalias at libc dot org>, linux-kernel <linux-kernel at vger dot kernel dot org>, linux-api <linux-api at vger dot kernel dot org>
- Date: Thu, 18 Apr 2019 11:31:56 -0400 (EDT)
- Subject: Re: [PATCH 1/4] glibc: Perform rseq(2) registration at C startup and thread creation (v7)
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----- On Apr 9, 2019, at 5:29 AM, Alan Modra email@example.com wrote:
> On Tue, Apr 09, 2019 at 02:23:53PM +1000, Michael Ellerman wrote:
>> I'd much rather we use a trap with a specific immediate value. Otherwise
>> someone's going to waste time one day puzzling over why userspace is
>> doing mtmsr.
> It's data. We have other data in executable sections. Anyone who
> wonders about odd disassembly just hasn't realized they are
> disassembling data.
>> It would also complicate things if we ever wanted to emulate mtmsr.
> No, because it won't be executed. If I understand correctly, the only
> reason to choose an illegal, trap or privileged insn is to halt
> execution earlier rather than later when a program goes off in the
>> If we want something that is a trap rather than a nop then use 0x0fe50553.
>> That's "compare the value in r5 with 0x553 and then trap unconditionally".
>> It shows up in objdump as:
>> 10000000: 53 05 e5 0f twui r5,1363
>> The immediate can be anything, I chose that value to mimic the x86 value
>> Mathieu mentioned.
>> There's no reason that instruction would ever be generated because the
>> immediate value serves no purpose. So it satisfies the "very unlikely
>> to appear" criteria AFAICS.
> Yes, looks fine to me, except that in VLE mode (do we care?)
> ".long 0x0fe50553" disassembles as
> 0: 0f e5 se_cmphl r5,r30
> 2: 05 53 se_mullw r3,r5
> No illegal/trap/privileged insn there.
> ".long 0x0fe5000b" might be better to cover VLE.
Can you share with us the objdump output of ".long 0x0fe5000b" in
VLE mode ? VLE mode support does not appear to be available in typical
toolchains. Also, is VLE mode only for powerpc 32 be, or also for
powerpc 64 be/le ?