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Re: [PATCH 1/4] glibc: Perform rseq(2) registration at C startup and thread creation (v7)
- From: Carlos O'Donell <codonell at redhat dot com>
- To: Tulio Magno Quites Machado Filho <tuliom at ascii dot art dot br>, Florian Weimer <fweimer at redhat dot com>, Michael Meissner <meissner at linux dot ibm dot com>, Alan Modra <amodra at gmail dot com>, Peter Bergner <bergner at vnet dot ibm dot com>, Michael Ellerman <mpe at ellerman dot id dot au>, Mathieu Desnoyers <mathieu dot desnoyers at efficios dot com>
- Cc: Paul Burton <paul dot burton at mips dot com>, Will Deacon <will dot deacon at arm dot com>, Boqun Feng <boqun dot feng at gmail dot com>, Heiko Carstens <heiko dot carstens at de dot ibm dot com>, Vasily Gorbik <gor at linux dot ibm dot com>, Martin Schwidefsky <schwidefsky at de dot ibm dot com>, Russell King <linux at armlinux dot org dot uk>, Benjamin Herrenschmidt <benh at kernel dot crashing dot org>, Paul Mackerras <paulus at samba dot org>, carlos <carlos at redhat dot com>, Joseph Myers <joseph at codesourcery dot com>, Szabolcs Nagy <szabolcs dot nagy at arm dot com>, libc-alpha <libc-alpha at sourceware dot org>, Thomas Gleixner <tglx at linutronix dot de>, Ben Maurer <bmaurer at fb dot com>, Peter Zijlstra <peterz at infradead dot org>, "Paul E. McKenney" <paulmck at linux dot vnet dot ibm dot com>, Dave Watson <davejwatson at fb dot com>, Paul Turner <pjt at google dot com>, Rich Felker <dalias at libc dot org>, linux-kernel <linux-kernel at vger dot kernel dot org>, linux-api <linux-api at vger dot kernel dot org>
- Date: Mon, 8 Apr 2019 17:45:41 -0400
- Subject: Re: [PATCH 1/4] glibc: Perform rseq(2) registration at C startup and thread creation (v7)
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On 4/8/19 3:20 PM, Tulio Magno Quites Machado Filho wrote:
That seems good to me.
Carlos O'Donell <firstname.lastname@example.org> writes:
On 4/5/19 5:16 AM, Florian Weimer wrote:
* Carlos O'Donell:
It is valuable that it be a trap, particularly for constant pools because
it means that a jump into the constant pool will trap.
Sorry, I don't understand why this matters in this context. Would you
Sorry, I wasn't very clear.
My point is only that any accidental jumps, either with off-by-one (like you
fixed in gcc/glibc's signal unwinding most recently), result in a process fault
rather than executing RSEQ_SIG as a valid instruction *and then* continuing
onwards to the handler.
A process fault is achieved either by a trap, or an invalid instruction, or
a privileged insn (like suggested for MIPS in this thread).
In that case, mtmsr (Move to Machine State Register) seems a good candidate.
mtmsr is available both on 32 and 64 bits since their first implementations.
It's a privileged instruction and should never appear in userspace
code (causes SIGILL).
What's required to move this forward for POWER?