This is the mail archive of the libc-alpha@sourceware.org mailing list for the glibc project.

Index Nav:	[Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav:	[Date Prev] [Date Next]	[Thread Prev] [Thread Next]
Other format:	[Raw text]

Re: [PATCH 24/24] Intel CET: Document --enable-cet

From: Florian Weimer <fweimer at redhat dot com>
To: "H.J. Lu" <hjl dot tools at gmail dot com>, Joseph Myers <joseph at codesourcery dot com>
Cc: GNU C Library <libc-alpha at sourceware dot org>, Carlos O'Donell <carlos at redhat dot com>
Date: Mon, 14 May 2018 19:44:38 +0200
Subject: Re: [PATCH 24/24] Intel CET: Document --enable-cet
References: <CAMe9rOozenqLwj6okaGYMvUmf6qDxwhtxOZo_OTawyk+DscBNQ@mail.gmail.com>

On 05/09/2018 11:31 PM, H.J. Lu wrote:

+* The GNU C Library can now be compiled with support for Intel CET, AKA
+  Intel Control-flow Enforcement Technology.  When the library is built
+  with --enable-cet, the resulting glibc is protected with indirect
+  branch tracking (IBT) and shadow stack (SHSTK).  This feature is
+  currently supported on i386, x86_64 and x32 with GCC 8 and binutils
+  2.29 or later.

Both texts should say something about compatibility. AFAIK, an--enable-cet glibc supports all existing binaries, but requires CPUswhich support long NOPs (so AMD Geode is out, for example).


Thanks,
Florian

Follow-Ups:
- Re: [PATCH 24/24] Intel CET: Document --enable-cet
  - From: H.J. Lu

References:
- [PATCH 24/24] Intel CET: Document --enable-cet
  - From: H.J. Lu

Index Nav:	[Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav:	[Date Prev] [Date Next]	[Thread Prev] [Thread Next]